On Fri, May 13, 2016 at 02:22:37PM +0800, Jike Song wrote:
> On 05/13/2016 10:41 AM, Tian, Kevin wrote:
> >> From: Neo Jia [mailto:c...@nvidia.com]
> >> Sent: Friday, May 13, 2016 3:49 AM
> >>
> >>>
> Perhaps one possibility would be to allow the vgpu driver to register
> map and unmap ca
On Fri, May 13, 2016 at 02:08:36PM +0800, Jike Song wrote:
> On 05/13/2016 03:49 AM, Neo Jia wrote:
> > On Thu, May 12, 2016 at 12:11:00PM +0800, Jike Song wrote:
> >> On Thu, May 12, 2016 at 6:06 AM, Alex Williamson
> >> wrote:
> >>> On Wed, 11 May 2016 17:15:15 +0800
> >>> Jike Song wrote:
> >>
On 05/13/2016 10:41 AM, Tian, Kevin wrote:
>> From: Neo Jia [mailto:c...@nvidia.com]
>> Sent: Friday, May 13, 2016 3:49 AM
>>
>>>
Perhaps one possibility would be to allow the vgpu driver to register
map and unmap callbacks. The unmap callback might provide the
invalidation interfac
On 05/13/2016 03:49 AM, Neo Jia wrote:
> On Thu, May 12, 2016 at 12:11:00PM +0800, Jike Song wrote:
>> On Thu, May 12, 2016 at 6:06 AM, Alex Williamson
>> wrote:
>>> On Wed, 11 May 2016 17:15:15 +0800
>>> Jike Song wrote:
>>>
On 05/11/2016 12:02 AM, Neo Jia wrote:
> On Tue, May 10, 2016
On 05/05/2016 11:31 AM, Alexey Kardashevskiy wrote:
7532d3cbf "vfio: Fix 128 bit handling" added support for 64bit IOMMU
memory regions when those are added to VFIO address space; however
removing code cannot cope with these as int128_get64() will fail on
1<<64.
This copies 128bit handling from
On Fri, 13 May 2016 14:54:52 +1000
Alexey Kardashevskiy wrote:
> Alex W,
>
> could you please review VFIO-related chunks? Thanks!
https://lists.nongnu.org/archive/html/qemu-devel/2016-05/msg00744.html
https://lists.nongnu.org/archive/html/qemu-devel/2016-05/msg00745.html
> On 05/04/2016 04:5
Alex W,
could you please review VFIO-related chunks? Thanks!
On 05/04/2016 04:52 PM, Alexey Kardashevskiy wrote:
Each Partitionable Endpoint (IOMMU group) has an address range on a PCI bus
where devices are allowed to do DMA. These ranges are called DMA windows.
By default, there is a single D
Drop the old SysBus init function and use instance_init
Reviewed-by: Paolo Bonzini
Signed-off-by: xiaoqiang zhao
---
hw/audio/cs4231.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/hw/audio/cs4231.c b/hw/audio/cs4231.c
index caf97c1..30690f9 100644
--- a/hw/au
* Drop the old SysBus init function and use instance_init
* Move AUD_open_in / AUD_open_out function into realize stage
Acked-by: Michael Walle
Tested-by: Michael Walle
Signed-off-by: xiaoqiang zhao
---
hw/audio/milkymist-ac97.c | 26 +++---
1 file changed, 15 insertions(+)
drop the DO_UPCAST macro
Signed-off-by: xiaoqiang zhao
---
hw/audio/intel-hda.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c
index d372d4a..5b1e760 100644
--- a/hw/audio/intel-hda.c
+++ b/hw/audio/intel-hda
* use DeviceClass::realize instead of DeviceClass::init
Signed-off-by: xiaoqiang zhao
---
hw/audio/intel-hda.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c
index 5b1e760..93d7669 100644
--- a/hw/audio/intel-hda.c
+++
On 2016年05月12日 17:19, Zhang Chen wrote:
This function is from net/socket.c, move it to net.c and net.h.
Add SocketReadState to make others reuse net_fill_rstate().
suggestion from jason.
v2:
- rename ReadState to SocketReadState
- add SocketReadState init and finalize callback
v1:
- ini
> From: Alex Williamson [mailto:alex.william...@redhat.com]
> Sent: Friday, May 13, 2016 3:06 AM
>
> > >
> >
> > Based on above thought I'm thinking whether below would work:
> > (let's use gpa to replace existing iova in type1 driver, while using iova
> > for the one actually used in vGPU driver.
On 2016年05月12日 16:16, Zhang Chen wrote:
On 05/12/2016 04:01 PM, Jason Wang wrote:
On 2016年05月12日 14:49, Zhang Chen wrote:
On 05/09/2016 06:49 PM, Zhang Chen wrote:
+
+s->chr_sec_in = qemu_chr_find(s->sec_indev);
+if (s->chr_sec_in == NULL) {
+error_setg(errp, "Seconda
This patch set QOM'ify some files under hw/audio directory.
See each patch's commit message for details.
Changes in v3:
* fix code style errors
* refine error_setg message format
Changes in v2:
Move AUD_open_in/out function into device realize stage
xiaoqiang zhao (4):
hw/audio: QOM'ify cs4
* Drop the old SysBus init function and use instance_init
* Call qemu_chr_add_handlers in the realize callback
* Use qdev chardev prop instead of qemu_char_get_next_serial
Signed-off-by: xiaoqiang zhao
---
hw/char/lm32_uart.c | 28 +---
1 file changed, 17 insertions(+), 1
This patch set trys to QOM'ify hw/char files, see commit messages
for more details
Note: patches
hw/char: QOM'ify sclpconsole-lm.c
hw/char: QOM'ify sclpconsole.c
of v2 has been taken by Cornelia Huck
Thanks Paolo for your suggestions.
Changes in v3:
* use chardev property instead of qemu_c
* Drop the old SysBus init function
* Call qemu_chr_add_handlers in the realize callback
* Use qdev chardev prop instead of qemu_char_get_next_serial
Signed-off-by: xiaoqiang zhao
---
hw/char/lm32_juart.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/hw/ch
* Drop the old SysBus init function and use instance_init
* Call qemu_chr_add_handlers in the realize callback
Signed-off-by: xiaoqiang zhao
---
hw/char/escc.c | 30 +++---
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/hw/char/escc.c b/hw/char/escc.c
ind
* Drop the old SysBus init function and use instance_init
* Call qemu_chr_add_handlers in the realize callback
* Use qdev chardev prop instead of qemu_char_get_next_serial
Signed-off-by: xiaoqiang zhao
---
hw/char/etraxfs_ser.c | 27 +--
1 file changed, 17 insertions(+),
> From: Neo Jia [mailto:c...@nvidia.com]
> Sent: Friday, May 13, 2016 3:49 AM
>
> >
> > > Perhaps one possibility would be to allow the vgpu driver to register
> > > map and unmap callbacks. The unmap callback might provide the
> > > invalidation interface that we're so far missing. The combinat
From: Sergey Fedorov
Ensure direct jump patching in MIPS is atomic by using
atomic_read()/atomic_set() for code patching.
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Message-Id: <1461341333-19646-11-git-send-email-sergey.fedo...@linaro.org>
Signed-off-by: Richard Henderson
[rt
From: Sergey Fedorov
This comment should have been deleted by commit 0ac087f1f3ae ("removed
unused code") but somehow it is still here. There's no point to keep it.
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Message-Id: <1462286050-21778-1-git-send-email-sergey.fedo...@linaro.
From: Sergey Fedorov
Unify the code of this function with tb_jmp_remove_from_list(). Making
these functions similar improves their readability. Also this could be a
step towards making this function thread-safe.
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Reviewed-by: Alex Benn
From: Sergey Fedorov
These fields do not contain pure pointers to a TranslationBlock
structure. So uintptr_t is the most appropriate type for them.
Also put some asserts to assure that the two least significant bits of
the pointer are always zero before assigning it to jmp_list_first.
Signed-off
From: Sergey Fedorov
We don't take care of direct jumps when address mapping changes. Thus we
must be sure to generate direct jumps so that they always keep valid
even if address mapping changes. Luckily, we can only allow to execute a
TB if it was generated from the pages which match with curren
From: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Reviewed-by: Richard Henderson
Message-Id: <1462962111-32237-6-git-send-email-sergey.fedo...@linaro.org>
Signed-off-by: Richard Henderson
---
cpu-exec.c | 12
1 file changed, 12 deletions(-)
diff -
From: Sergey Fedorov
This field was used for telling cpu_interrupt() to unlink a chain of TBs
being executed when it worked that way. Now, cpu_interrupt() don't do
this anymore. So we don't need this field anymore.
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Message-Id: <146227
From: Sergey Fedorov
'tb_invalidated_flag' was meant to catch two events:
* some TB has been invalidated by tb_phys_invalidate();
* the whole translation buffer has been flushed by tb_flush().
Then it was checked:
* in cpu_exec() to ensure that the last executed TB can be safely
linked to
> From: Gerd Hoffmann [mailto:kra...@redhat.com]
> Sent: Thursday, May 12, 2016 9:38 PM
> To: Gonglei (Arei)
> Cc: qemu-devel@nongnu.org
> Subject: Re: [PATCH v2 0/2] fix coverity complaint
>
> On Do, 2016-05-12 at 17:57 +0800, Gonglei wrote:
> > Rebase on the latest master brunch.
>
From: Paolo Bonzini
Signed-off-by: Paolo Bonzini
[Sergey Fedorov: eliminate the field entirely in user-mode]
Signed-off-by: Sergey Fedorov
Reviewed-by: Richard Henderson
Reviewed-by: Alex Bennée
[rth: merged followup fixup]
Message-Id: <1462982777-4513-1-git-send-email-sergey.fedo...@linaro.
From: Sergey Fedorov
Move tb_add_jump() call and surrounding code from cpu_exec() into
tb_find_fast(). That simplifies cpu_exec() a little by hiding the direct
chaining optimization details into tb_find_fast(). It also allows to
move tb_lock()/tb_unlock() pair into tb_find_fast(), putting it clos
From: Sergey Fedorov
Simplify cpu_exec() by extracting TB execution code outside of
cpu_exec() into a new static inline function cpu_loop_exec_tb().
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Reviewed-by: Richard Henderson
Message-Id: <1462962111-32237-5-git-send-email-sergey
From: Paolo Bonzini
Signed-off-by: Paolo Bonzini
[Alex Bennée: #ifndef replay code to match elided functions]
Signed-off-by: Alex Bennée
Signed-off-by: Sergey Fedorov
Signed-off-by: Richard Henderson
---
cpu-exec.c | 8
1 file changed, 8 insertions(+)
diff --git a/cpu-exec.c b/cpu-
From: Sergey Fedorov
The check is to make sure that another thread hasn't already done the
same while we were outside of tb_lock. Mention this in a comment.
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
include/exec
From: Sergey Fedorov
Suggested-by: Richard Henderson
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Message-Id: <1463071937-26607-1-git-send-email-sergey.fedo...@linaro.org>
Reviewed-by: Richard Henderson
Signed-off-by: Richard Henderson
---
cpu-exec.c | 7 ---
1 file chang
From: Sergey Fedorov
tb_jmp_remove() was only used to remove the TB from a list of all TBs
jumping to the same TB which is n-th jump destination of the given TB.
Put a comment briefly describing the function behavior and rename it to
better reflect its purpose.
Signed-off-by: Sergey Fedorov
Sig
From: Sergey Fedorov
Simplify cpu_exec() by extracting interrupt handling code outside of
cpu_exec() into a new static inline function cpu_handle_interrupt().
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Reviewed-by: Richard Henderson
Message-Id: <1462962111-32237-4-git-send-e
From: Sergey Fedorov
In user mode, there's only a static address translation, TBs are always
invalidated properly and direct jumps are reset when mapping change.
Thus the destination address is always valid for direct jumps and
there's no need to restrict it to the pages the TB resides in.
Signe
From: Sergey Fedorov
Simplify cpu_exec() by extracting exception handling code out of
cpu_exec() into a new static inline function cpu_handle_exception().
Also make cpu_handle_debug_exception() inline as it is used only once.
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Reviewed
From: Alex Bennée
Put some comments and improve code structure. This should help reading
the code.
Signed-off-by: Alex Bennée
[Sergey Fedorov: provide commit message; bring back resetting of
tb_invalidated_flag]
Signed-off-by: Sergey Fedorov
Reviewed-by: Richard Henderson
Signed-off-by: Rich
From: Sergey Fedorov
Briefly describe in a comment how direct block chaining is done. It
should help in understanding of the following data fields.
Rename some fields in TranslationBlock and TCGContext structures to
better reflect their purpose (dropping excessive 'tb_' prefix in
TranslationBloc
From: Sergey Fedorov
Move the code for removing jumps to a TB out of tb_phys_invalidate() to
a separate static inline function tb_jmp_unlink(). This simplifies
tb_phys_invalidate() and improves code structure.
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Reviewed-by: Alex Bennée
From: Sergey Fedorov
Simplify cpu_exec() by extracting CPU halt state handling code out of
cpu_exec() into a new static inline function cpu_handle_halt().
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Reviewed-by: Richard Henderson
Message-Id: <1462962111-32237-2-git-send-email-
From: "Emilio G. Cota"
Signed-off-by: Emilio G. Cota
Message-Id: <1461283314-2353-2-git-send-email-c...@braap.org>
Signed-off-by: Richard Henderson
---
translate-all.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/translate-all.c b/translate-all.c
index 6b0ecb4..93b91
Make sure we preserve the high 32-bits when masking for mips64.
Signed-off-by: Richard Henderson
---
translate-all.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/translate-all.c b/translate-all.c
index 93b91ba..79a515d 100644
--- a/translate-all.c
+++ b/translate-all.c
From: Sergey Fedorov
Initialize TB's direct jump list data fields and reset the jumps before
tb_link_page() puts it into the physical hash table and the physical
page list. So TB is completely initialized before it becomes visible.
This is pure rearrangement of code to a more suitable place, tho
From: Sergey Fedorov
Ensure direct jump patching in SPARC is atomic by using
atomic_read()/atomic_set() for code patching.
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Reviewed-by: Alex Bennée
Message-Id: <1461341333-19646-10-git-send-email-sergey.fedo...@linaro.org>
Signed-off
From: Sergey Fedorov
The value returned from tcg_qemu_tb_exec() is the value passed to the
corresponding tcg_gen_exit_tb() at translation time of the last TB
attempted to execute. It is a little confusing to store it in a variable
named 'next_tb'. In fact, it is a combination of 4-byte aligned po
From: Sergey Fedorov
Ensure direct jump patching in AArch64 is atomic by using
atomic_read()/atomic_set() for code patching.
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Message-Id: <1461341333-19646-9-git-send-email-sergey.fedo...@linaro.org>
Signed-off-by: Richard Henderson
-
From: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
translate-all.c | 204
1 file changed, 101 insertions(+), 103 deletions(-)
diff --git a/tra
From: "Emilio G. Cota"
The setting of tcg_ctx.code_gen_buffer_size is done by the only caller of
size_code_gen_buffer(), which is code_gen_alloc():
$ git grep size_code_gen_buffer
translate-all.c:static inline size_t size_code_gen_buffer(size_t tb_size)
translate-all.c:tcg_ctx.code_gen
From: Sergey Fedorov
Ensure direct jump patching in TCI is atomic by:
* naturally aligning a location of direct jump address;
* using atomic_read()/atomic_set() to load/store the address.
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Message-Id: <1461341333-19646-4-git-send-ema
From: Sergey Fedorov
Ensure direct jump patching in ARM is atomic by using
atomic_read()/atomic_set() for code patching.
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Message-Id: <1461341333-19646-8-git-send-email-sergey.fedo...@linaro.org>
Signed-off-by: Richard Henderson
---
From: "Emilio G. Cota"
We are inconsistent with the type of tb->flags: usage varies loosely
between int and uint64_t. Settle to uint32_t everywhere, which is
superior to both: at least one target (aarch64) uses the most significant
bit in the u32, and uint64_t is wasteful.
Compile-tested for all
From: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Reviewed-by: Alex Bennée
Message-Id: <1461341333-19646-12-git-send-email-sergey.fedo...@linaro.org>
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Sergey Fedorov
Ensure direct jump patching in PPC is atomic by:
* limiting translation buffer size in 32-bit mode to be addressable by
Branch I-form instruction;
* using atomic_read()/atomic_set() for code patching.
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Reviewe
From: Sergey Fedorov
Ensure direct jump patching in i386 is atomic by:
* naturally aligning a location of direct jump address;
* using atomic_read()/atomic_set() for code patching.
tcg_out_nopn() implementation:
Suggested-by: Richard Henderson .
Signed-off-by: Sergey Fedorov
Signed-off-by: S
From: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Message-Id: <1461341333-19646-2-git-send-email-sergey.fedo...@linaro.org>
Signed-off-by: Richard Henderson
---
include/qemu/osdep.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/qemu/osdep.h b/in
From: Sergey Fedorov
Ensure direct jump patching in s390 is atomic by:
* naturally aligning a location of direct jump address;
* using atomic_read()/atomic_set() for code patching.
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Message-Id: <1461341333-19646-7-git-send-email-serg
From: Sergey Fedorov
These macros provide a convenient way to n-byte align pointers up and
down and check if a pointer is n-byte aligned.
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Message-Id: <1461341333-19646-3-git-send-email-sergey.fedo...@linaro.org>
Signed-off-by: Richard
at:
git://github.com/rth7680/qemu.git tags/pull-tcg-20160512
for you to fetch changes up to 8b1fe3f439eaa2f0a6ee7737942bb6c405725867:
cpu-exec: Clean up 'interrupt_request' reloading in cpu_handle_interrupt()
(2016-
Hey folks,
I'm planning to add a couple fw_cfg files for vfio IGD (Intel
Graphics Device) assignment, but since this does represent a QEMU-BIOS
ABI and since most of the vfio code is committed with only my own
sign-off and review, I'd like to pull this out for discussion separate
from the patches
From: Peter Crosthwaite
IOU = I/O Unit
SLCR = System Level Control Registers
This IP is a misc collections of control registers that switch various
properties of system IPs. Currently the only thing implemented is the
SD_SLOTTYPE control (implemented as a GPIO output).
Signed-off-by: Peter Cros
From: Peter Crosthwaite
Add a routine to set or override the opaque data of an IRQ.
Qdev currently always initialises IRQ opaque as the device itself.
This allows you to override to a custom opaque in the case where
there is extra or different data needed.
Signed-off-by: Peter Crosthwaite
Sign
From: Peter Crosthwaite
Add a helper that will scan a static RegisterAccessInfo Array
and populate a container MemoryRegion with registers as defined.
Signed-off-by: Peter Crosthwaite
Signed-off-by: Alistair Francis
---
The reason that I'm not using GArray is because the array needs to store
t
Add a minimal model for the devcfg device which is part of Zynq.
This model supports DMA capabilities and interrupt generation.
Signed-off-by: Peter Crosthwaite
Signed-off-by: Alistair Francis
---
V5:
- Corrections to the device model logic
default-configs/arm-softmmu.mak | 1 +
hw/dma/Ma
From: Peter Crosthwaite
An API similar to the existing qdev_get_gpio_in() except gets outputs.
Useful for:
1: Implementing lightweight devices that don't want to keep pointers
to their own GPIOs. They can get their GPIO pointers at runtime from
QOM using this API.
2: testing or debugging code w
From: Peter Crosthwaite
QOMify registers as a child of TYPE_DEVICE. This allows registers to
define GPIOs.
Define an init helper that will do QOM initialisation.
Signed-off-by: Peter Crosthwaite
Signed-off-by: Alistair Francis
Reviewed-by: KONRAD Frederic
---
V5:
- Convert to using only one
Add memory io handlers that glue the register API to the memory API.
Just translation functions at this stage. Although it does allow for
devices to be created without all-in-one mmio r/w handlers.
This patch also adds the RegisterInfoArray struct, which allows all of
the individual RegisterInfo s
Add a macro that creates a 64bit value which has length number of ones
shifted acrros by the value of shift.
Signed-off-by: Alistair Francis
Reviewed-by: Alex Bennée
---
V5:
- Re-write to a 64-bit mask instead of ONES()
- Re-order this patch in the series
include/qemu/bitops.h | 3 +++
1 fil
From: Peter Crosthwaite
Signed-off-by: Peter Crosthwaite
Signed-off-by: Alistair Francis
---
V4:
- Small corrections to the device model logic
hw/arm/xilinx_zynq.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 98b17c9..ffea3be 1
Add GPIO functionality to the register API. This allows association
and automatic connection of GPIOs to bits in registers. GPIO inputs
will attach to handlers that automatically set read-only bits in
registers. GPIO outputs will be updated to reflect their field value
when their respective registe
From: Peter Crosthwaite
Define some macros that can be used for defining registers and fields.
The REG32 macro will define A_FOO, for the byte address of a register
as well as R_FOO for the uint32_t[] register number (A_FOO / 4).
The FIELD macro will define FOO_BAR_MASK, FOO_BAR_SHIFT and
FOO_B
This patch series is based on Peter C's original register API. His
original cover letter is below.
Future work: Allow support for memory attributes.
V6:
- Small changes to the API based on Alex's comments
- Remove 'register: Add support for decoding information' patch
- Move prefix and debug i
This API provides some encapsulation of registers and factors our some
common functionality to common code. Bits of device state (usually MMIO
registers), often have all sorts of access restrictions and semantics
associated with them. This API allow you to define what those
restrictions are on a bi
On 05/12/2016 09:50 AM, Eric Blake wrote:
>> This breaks qemu-iotests 136 for raw. It's pretty obvious that this is a
>> test case problem (uses unaligned requests to test error accounting), so
>> I'm not dropping the patch, but please do send a follow-up.
>
> ...which explains why I missed this f
Commit 770e0e0e [*] forgot to implement 'writev -f'. Likewise,
commit c3e001c forgot to implement 'aio_write -u -z'.
[*] does it sound "ech0e" in here? :)
Signed-off-by: Eric Blake
---
qemu-io-cmds.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/qemu-io-cmds.c b/qemu-
Commit 093ea232 removed the ability for aio_read and aio_write
to artificially inflate the invalid statistics counters for
block devices, since it no longer flags unaligned offset or
length. Add 'aio_read -i' and 'aio_write -i' to restore
the ability, and update test 136 to use it.
Reported-by: K
For some time now, qemu-img compare has been able to compare
unaligned images. So we no longer need test 109's hack of
resizing to sector boundaries before invoking compare.
Signed-off-by: Eric Blake
---
Note that qemu-img compare on unaligned images is still a bit
underwhelming on message qual
I introduced a couple of bugs in my recent qemu-io enhancements;
time to fix them back up now that the broken patches are already
part of mainline.
Eric Blake (3):
qemu-io: Fix missing getopt() updates
qemu-iotests: Simplify 109 with unaligned qemu-img compare
qemu-iotests: Fix regression in
Hi!
Now that qemu 2.6.0 has been released, what about making Laurent the
maintainer for the orphaned M68K target so that the 680x0 emulation
support can be merged?
What do the qemu maintainers think? Is there anything which speaks
against my suggestion?
Thanks,
Adrian
On 05/06/2016 11:54 AM, La
On 05/12/2016 11:29 PM, Alexander Graf wrote:
> Rest assured that we're all happy to see m68k finally going back to
> maintained state ;).
Glad to hear that. Laurent has been doing a fantastic job on m68k and
so far it has been a pleasure to helm him improve the code with tests
and patches.
qem
On 05/12/2016 11:23 PM, Alexander Graf wrote:
> I expect he'll send a v2 of the patch set that fixes all review comments
> and includes the patch to MAINTAINERS. I don't see how applying only the
> MAINTAINERS patch would help anyone? Would it speed up his work to get v2
> out? :)
Oh, sorry, I mu
On 05/12/2016 08:35 AM, Kevin Wolf wrote:
> From: Eric Blake
>
> Make it easier to test block drivers with BDRV_REQ_FUA in
> .supported_write_flags, by adding the '-f' flag to qemu-io to
> conditionally pass the flag through to specific writes ('write',
> 'write -z', 'writev', 'aio_write', 'aio_w
On 02/29/2016 05:00 AM, Daniel P. Berrange wrote:
> Now that qcow & qcow2 are wired up to get encryption keys
> via the QCryptoSecret object, nothing is relying on the
> interactive prompting for passwords. All the code related
> to password prompting can thus be ripped out.
>
> Signed-off-by: Dan
On 04/27/2016 07:20 AM, Kevin Wolf wrote:
> Since virtio-blk implements request merging itself these days, the only
> remaining users are test cases for the function. That doesn't make the
> function exactly useful any more.
>
> Signed-off-by: Kevin Wolf
> Reviewed-by: Max Reitz
> ---
> +++ b/t
On Thu, May 12, 2016 at 01:05:52PM -0600, Alex Williamson wrote:
> On Thu, 12 May 2016 08:00:36 +
> "Tian, Kevin" wrote:
>
> > > From: Alex Williamson [mailto:alex.william...@redhat.com]
> > > Sent: Thursday, May 12, 2016 6:06 AM
> > >
> > > On Wed, 11 May 2016 17:15:15 +0800
> > > Jike Song
On Thu, May 12, 2016 at 12:11:00PM +0800, Jike Song wrote:
> On Thu, May 12, 2016 at 6:06 AM, Alex Williamson
> wrote:
> > On Wed, 11 May 2016 17:15:15 +0800
> > Jike Song wrote:
> >
> >> On 05/11/2016 12:02 AM, Neo Jia wrote:
> >> > On Tue, May 10, 2016 at 03:52:27PM +0800, Jike Song wrote:
> >>
On 11/05/16 16:46, Paolo Bonzini wrote:
> On 11/05/2016 15:36, Sergey Fedorov wrote:
>> On 11/05/16 15:58, Paolo Bonzini wrote:
>>> On 06/05/2016 20:22, Sergey Fedorov wrote:
However, there's no sensible description of what is protected by tb_lock
and mmap_lock. I think we need to have a
On Thu, May 12, 2016 at 02:20:25PM -0500, Corey Minyard wrote:
> On 05/12/2016 08:35 AM, Michael S. Tsirkin wrote:
> >On Thu, May 12, 2016 at 08:32:51AM -0500, Corey Minyard wrote:
> >>On 05/12/2016 02:36 AM, Michael S. Tsirkin wrote:
> >>>On Wed, May 11, 2016 at 02:46:06PM -0500, miny...@acm.org w
On 05/12/2016 08:35 AM, Michael S. Tsirkin wrote:
On Thu, May 12, 2016 at 08:32:51AM -0500, Corey Minyard wrote:
On 05/12/2016 02:36 AM, Michael S. Tsirkin wrote:
On Wed, May 11, 2016 at 02:46:06PM -0500, miny...@acm.org wrote:
From: Corey Minyard
Signed-off-by: Corey Minyard
---
hw/ipmi/
On Thu, 12 May 2016 08:00:36 +
"Tian, Kevin" wrote:
> > From: Alex Williamson [mailto:alex.william...@redhat.com]
> > Sent: Thursday, May 12, 2016 6:06 AM
> >
> > On Wed, 11 May 2016 17:15:15 +0800
> > Jike Song wrote:
> >
> > > On 05/11/2016 12:02 AM, Neo Jia wrote:
> > > > On Tue, Ma
From: Timothy E Baldwin
If DEBUG_ERESTARTSYS is set restart all system calls once. This
is pure debug code for exercising the syscall restart code paths
in the per-architecture cpu main loops.
Signed-off-by: Timothy Edward Baldwin
Message-id: 1441497448-32489-10-git-send-email-t.e.baldwi...@mem
Paolo Bonzini writes:
> On 11/05/2016 21:55, Lluís Vilanova wrote:
>>
>> diff --git a/translate-all.c b/translate-all.c
>> index 8329ea6..1c16b14 100644
>> --- a/translate-all.c
>> +++ b/translate-all.c
>> @@ -1092,6 +1092,8 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
>> ti = profile_getclock
On Thu, May 12, 2016 at 9:24 AM, Eric Blake wrote:
> On 05/12/2016 10:13 AM, Alistair Francis wrote:
>> Signed-off-by: Alistair Francis
>> ---
>> V4:
>> - Re-write to be more comprehensive
>>
>> docs/generic-loader.txt | 56
>> +
>> 1 file change
From: Timothy E Baldwin
Update the Alpha main loop and sigreturn code:
* on TARGET_ERESTARTSYS, wind guest PC backwards to repeat syscall insn
* handle TARGET_QEMU_ESIGRETURN in the main loop as the indication
that the main loop should not touch any guest CPU state
Signed-off-by: Timothy Ed
Use the safe_syscall wrapper for the futex syscall.
In particular, this fixes hangs when using programs that link
against the Boehm garbage collector, including the Mono runtime.
(We don't change the sys_futex() call in the implementation of
the exit syscall, because as the FIXME comment there no
From: Timothy E Baldwin
Update the OpenRISC main loop code:
* on TARGET_ERESTARTSYS, wind guest PC backwards to repeat syscall insn
* handle TARGET_QEMU_ESIGRETURN in the main loop as the indication
that the main loop should not touch any guest CPU state
(We don't implement sigreturn on thi
From: Timothy E Baldwin
Update the SPARC main loop and sigreturn code:
* on TARGET_ERESTARTSYS, wind guest PC backwards to repeat syscall insn
* set all guest CPU state within signal.c code on sigreturn
* handle TARGET_QEMU_ESIGRETURN in the main loop as the indication
that the main loop sh
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