Re: [Qemu-devel] [PATCH v5 5/6] acpi: Add IPMI table entries

Thanks for all the comments. I didn't know about stubs, as there's nothing that currently uses it in hw directory, but it's easy enough to add. I did have two comment below: On 05/20/2016 04:53 AM, Igor Mammedov wrote: On Thu, 19 May 2016 10:24:01 -0500 miny...@acm.org wrote: . . . +

Re: [Qemu-devel] [Nbd] [PULL 23/28] nbd: always query export list in fixed new style protocol

On Tue, May 17, 2016 at 10:50:01AM -0600, Eric Blake wrote: > Option 2: An alternative solution would be to allow nbdkit to fail > NBD_OPT_LIST with NBD_REP_ERR_UNSUP, at which point qemu client of 2.6 > should just ignore the failure and proceed on to NBD_OPT_EXPORT_NAME. > It is the fact that it

[Qemu-devel] [PATCH 1/2] atomics: do not use __atomic primitives for RCU atomics

Commit a0aa44b4 ("include/qemu/atomic.h: default to __atomic functions") set all atomics to default (on recent GCC versions) to __atomic primitives. In the process, the atomic_rcu_read/set were converted to implement consume/release semantics, respectively. This is inefficient; for correctness

[Qemu-devel] [PATCH 0/2] atomics: fix small RCU perf. regression + update documentation

Patch 1 fixes a small performance regression introduced when moving our atomics to __atomic primitives. The regression can be measured on RMO architectures (I used aarch64); the effect is very small but consistently measurable: for instance, rcutorture performance degraded by about 0.3%. Patch 2

[Qemu-devel] [PATCH 2/2] docs/atomics: update atomic_read/set comparison with Linux

Recently Linux did a mass conversion of its atomic_read/set calls so that they at least are READ/WRITE_ONCE. See Linux's commit 62e8a325 ("atomic, arch: Audit atomic_{read,set}()"). It seems though that their documentation hasn't been updated to reflect this. The appended updates our

Re: [Qemu-devel] [PATCH v5 12/18] qht: QEMU's fast, resizable and scalable Hash Table

On 21/05/16 05:48, Emilio G. Cota wrote: > Thanks for taking a look! If you have time, please check patch 13 out. > That patch should eventually be merged onto this one. Actually, I was reviewing the final code with all the series applied :) I'd like to spend some time and review all the series

[Qemu-devel] [PATCH] hw/arm/virt: fix limit of 64-bit ACPI/ECAM PCI MMIO range

Set the MMIO range limit field to 'base + size - 1' as required. Signed-off-by: Ard Biesheuvel --- hw/arm/virt-acpi-build.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index

Re: [Qemu-devel] [PATCH v5 12/18] qht: QEMU's fast, resizable and scalable Hash Table

On Fri, May 20, 2016 at 22:48:11 -0400, Emilio G. Cota wrote: > On Sat, May 21, 2016 at 01:13:20 +0300, Sergey Fedorov wrote: > > > +static inline > > > +void *qht_do_lookup(struct qht_bucket *head, qht_lookup_func_t func, > > > +const void *userp, uint32_t hash) > > > +{ > > >

Re: [Qemu-devel] [PATCH v3 1/3] IOMMU: add VTD_CAP_CM to vIOMMU capability exposed to guest

On 2016-05-21 18:19, Aviv B.D wrote: > From: "Aviv Ben-David" > > This flag tells the guest to invalidate tlb cache also after unmap operations. > > Signed-off-by: Aviv Ben-David > --- > hw/i386/intel_iommu.c | 3 ++- >

[Qemu-devel] [PATCH v3 2/3] IOMMU: change iommu_op->translate's is_write to flags, add support to NO_FAIL flag mode

From: "Aviv Ben-David" Supports translation trials without reporting error to guest on translation failures. Signed-off-by: Aviv Ben-David --- exec.c| 2 +- hw/i386/intel_iommu.c | 65 ---

[Qemu-devel] [PATCH v3 1/3] IOMMU: add VTD_CAP_CM to vIOMMU capability exposed to guest

From: "Aviv Ben-David" This flag tells the guest to invalidate tlb cache also after unmap operations. Signed-off-by: Aviv Ben-David --- hw/i386/intel_iommu.c | 3 ++- hw/i386/intel_iommu_internal.h | 1 + 2 files changed, 3 insertions(+), 1

[Qemu-devel] [PATCH v3 3/3] IOMMU: Integrate between VFIO and vIOMMU to support device assignment

From: "Aviv Ben-David" Signed-off-by: Aviv Ben-David --- hw/i386/intel_iommu.c | 69 -- hw/i386/intel_iommu_internal.h | 2 ++ hw/vfio/common.c | 11 +-- include/hw/i386/intel_iommu.h |

[Qemu-devel] [PATCH v3 0/3] IOMMU: Add Support to VFIO devices with vIOMMU present

From: "Aviv Ben-David" * Advertize Cache Mode capability in iommu cap register. * Register every VFIO device with IOMMU state. * On page cache invalidation in vIOMMU, check if the domain belong to VFIO device and mirror the guest requests to host. Changes from v1 to v2: *

Re: [Qemu-devel] [PATCH 5/9] virtio-blk: multiqueue batch notify

On 21/05/2016 01:40, Stefan Hajnoczi wrote: > +while ((i = find_next_bit(s->batch_notify_vqs, nvqs, i)) < nvqs) { > +VirtQueue *vq = virtio_get_queue(vdev, i); > + > +bitmap_clear(s->batch_notify_vqs, i, 1); clear_bit? > +if (s->dataplane_started &&

Re: [Qemu-devel] [PATCH 7/9] virtio-blk: live migrate s->rq with multiqueue

On 21/05/2016 01:40, Stefan Hajnoczi wrote: > while (req) { > qemu_put_sbyte(f, 1); Could you just put an extra 32-bit queue id here if num_queues > 1? A guest with num_queues > 1 cannot be started on pre-2.7 QEMU, so you can change the migration format (if virtio were using

Re: [Qemu-devel] undefined symbol _nettle_cast5_set_key

On May 21, 2016, at 9:14 AM, Peter Maydell wrote: > On 20 May 2016 at 23:43, Eric Blake wrote: >> What version of nettle are you compiling against? Obviously it's an >> older version, but is it one that we need to work around at configure >> time, or one that you should just

Re: [Qemu-devel] undefined symbol _nettle_cast5_set_key

On 20 May 2016 at 23:43, Eric Blake wrote: > What version of nettle are you compiling against? Obviously it's an > older version, but is it one that we need to work around at configure > time, or one that you should just update locally? I think in general if we can't build

[Qemu-devel] [PATCH v5 06/10] i.MX: reset TX/RX descriptors when FEC is disabled.

According to the FEC chapter of i.MX25 reference manual RX adn TX descriptors are reseted when the FEC device is disabled through ECR. Signed-off-by: Jean-Christophe Dubois --- Changes since v1: * Not present on v1 Changes since v2: * Not present on v2 Changes since

[Qemu-devel] [PATCH v5 10/10] Add ENET device to i.MX6 SOC.

This adds the ENET device to the i.MX6 SOC. This was tested by booting Linux on an Qemu i.MX6 instance and accessing the internet from the linux guest. Reviewed-by: Peter Maydell Signed-off-by: Jean-Christophe Dubois --- Changes since v1: * Not

[Qemu-devel] [PATCH v5 08/10] i.MX: move FEC device to a register array structure.

This is to prepare for the ENET Gb device of the i.MX6. Signed-off-by: Jean-Christophe Dubois --- Changes since v1: * Not present on v1. Changes since v2: * The patch was split in 2 parts: - a "port" to a reg array based device (this patch). - the addition of the

[Qemu-devel] [PATCH v5 09/10] Add ENET/Gbps Ethernet support to FEC device

The ENET device (present in i.MX6) is "derived" from FEC and backward compatible with it. This patch adds the necessary support of the added feature in the ENET device to allow Linux to use it (on supported processors). Signed-off-by: Jean-Christophe Dubois --- Changes

[Qemu-devel] [PATCH v5 03/10] i.MX: Fix FEC code for MDIO operation selection

According to the FEC chapter of i.MX25 reference manual When writing the MMFR register, bit 29 and 28 select the requested operation. * 10 means read operation with valid MII mgmt frame * 11 means read operation with non compliant MII mgmt frame * 01 means write operation with valid MII mgmt

[Qemu-devel] [PATCH v5 02/10] net: handle optional VLAN header in checksum computation.

Signed-off-by: Jean-Christophe Dubois --- Changes since v1: * Not present on v1 Changes since v2: * Not present on v2 Changes since v3: * local variable name change. Changes since v4: * None net/checksum.c | 35 +++ 1 file changed,

[Qemu-devel] [PATCH v5 05/10] i.MX: Fix FEC code for ECR register reset value.

According to the FEC chapter of i.MX25 reference manual ECR register is initialized at 0xf000 at reset time. We fix the value. Signed-off-by: Jean-Christophe Dubois --- Changes since v1: * Not present on v1 Changes since v2: * Not present on v2 Changes since v3:

[Qemu-devel] [PATCH v5 07/10] i.MX: Rename i.MX FEC defines to ENET_XXX

Signed-off-by: Jean-Christophe Dubois --- Changes since v1: * Not present on v1 Changes since v2: * Not present on v2 Changes since v3: * Not present on v3 Changes since v4: * Not present on v4 hw/net/imx_fec.c | 54

[Qemu-devel] [PATCH v5 00/10] Add Ethernet device for i.MX6 SOC

This patch series adds Gb ENET Ethernet device to the i.MX6 SOC. The ENET device is an evolution of the FEC device present on the i.MX25 SOC and is backward compatible with it. Therefore the ENET support has been added to the actual Qemu FEC device ( rather than adding a new device). The Patch

[Qemu-devel] [PATCH v5 01/10] net: improve UDP/TCP checksum computation.

* based on Eth, UDP, TCP struct present in eth.h instead of hardcoded indexes and sizes. * based on various macros present in eth.h. Signed-off-by: Jean-Christophe Dubois --- Changes since v1: * None Changes since v2: * The patch was split in 2 parts: - a

[Qemu-devel] [PATCH v5 04/10] i.MX: Fix FEC code for MDIO address selection

According to the FEC chapter of i.MX25 reference manual When writing to MMFR register, the MDIO device and adress are selected by bit 27 to 23 and bit 22 to 18 respectively. This is a total of 10 bits that need to be used by the Phy chip/address decoding function. This patch fixes the number of