We fail to pass to AS all of the different flags that
may be required for a given set of CFLAGS. Rather than
figuring out the host-specific mapping, it's better to
allow the compiler driver to do that.
This fixes e.g. ../configure --cpu=i686, but would also
be required for ppc and sparc.
Signed-
2016-06-18 14:57 GMT+09:00 Liviu Ionescu :
>
> > On 18 Jun 2016, at 01:22, Tsung-Han Lin wrote:
> >
> > ... It seems like to me that the issue is the default address assumed by
> qemu, which is 0x0.
> > (since Eclipse QEMU uses the same code, I believe they have the same
> problem.)
>
> it uses t
> On 18 Jun 2016, at 01:22, Tsung-Han Lin wrote:
>
> ... It seems like to me that the issue is the default address assumed by
> qemu, which is 0x0.
> (since Eclipse QEMU uses the same code, I believe they have the same problem.)
it uses the same main code, but with many improvements.
if I re
On 06/17/2016 09:03 PM, Pranith Kumar wrote:
case 0xe8 ... 0xef: /* lfence */
+tcg_gen_mb(TCG_MO_LD_LD | TCG_BAR_SC);
+break;
case 0xf0 ... 0xf7: /* mfence */
if (!(s->cpuid_features & CPUID_SSE2)
|| (prefixes & PREFIX_LOCK))
On 06/17/2016 05:13 PM, Aaron Larson wrote:
> When e500 PPC is booted multi-core, the non-boot cores are started via
> the spin table. ppce500_spin.c:spin_kick() calls
> mmubooke_create_initial_mapping() to allocate a 64MB TLB entry, but
> the created TLB entry is only 256KB.
>
> The root cause i
This patch adds ability to reload ceph configuration for an attached RBD
block device. This is necessary for the cases where rebooting a VM and/or
detaching-reattaching a RBD drive is not an easy option.
The reload mechanism relies on the bdrv_reopen_* calls to provide a
transactional
guarantee (
When e500 PPC is booted multi-core, the non-boot cores are started via
the spin table. ppce500_spin.c:spin_kick() calls
mmubooke_create_initial_mapping() to allocate a 64MB TLB entry, but
the created TLB entry is only 256KB.
The root cause is that the function computing the size of the TLB
entry,
In 63ae0915f8ec, I arranged to use a 32-bit rotate, without
considering the effect of a mask value that wraps around to
the high bits of the word.
Signed-off-by: Richard Henderson
---
target-ppc/translate.c | 73 +++---
1 file changed, 51 insertions(+)
On 06/17/2016 09:02 PM, Anton Blanchard wrote:
lis r4,0x7fff@h
ori r4,r4,0x7fff@l
rlwinm r3,r4,0,25,1
Ah, with zero rotate. I see. New patch coming up.
r~
When the number of available registers is low, we need to be
prepared for TS to overlap MEM_BASE.
This fixes the Sparc64 OpenBIOS boot on i686.
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 68 +++
1 file changed, 47 insertions(+),
There's a minor typo here that affects dumping of 64-bit
registers on 32-bit hosts. Kind of embarrasing that this
hasn't been seen previously.
The main change takes care of cases wherein there's overlap
between the indirect base register and the main global, which
can happen in conditions of very
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 254427b..154ffe8 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -557,7 +557,7 @@ int tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
ts2->mem
Signed-off-by: Pranith Kumar
---
target-i386/translate.c | 4
1 file changed, 4 insertions(+)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index bf33e6b..32b0f5c 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -8012,13 +8012,17 @@ static target_ulong
Signed-off-by: Pranith Kumar
---
target-arm/translate-a64.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index ce8141a..fa24bf2 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64
Hello,
The following series adds fence instruction generation support to
TCG. Based on feedback to the last series, I added the four
combinations of orderings modeled after Sparc membar.
This has been tested and confirmed to fix ordering issues on
x86/armv7/aarch64 hosts with MTTCG enabled for an
Signed-off-by: Pranith Kumar
Signed-off-by: Richard Henderson
---
target-arm/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index e525f1e..012e450 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
Cc: Stefan Weil
Signed-off-by: Richard Henderson
Signed-off-by: Pranith Kumar
---
tcg/tci/tcg-target.inc.c | 3 +++
tci.c| 3 +++
2 files changed, 6 insertions(+)
diff --git a/tcg/tci/tcg-target.inc.c b/tcg/tci/tcg-target.inc.c
index fa74d52..8e950df 100644
--- a/tcg/tci/tc
Signed-off-by: Richard Henderson
Signed-off-by: Pranith Kumar
---
target-alpha/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 76dab15..f0bba40 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/t
Cc: Claudio Fontana
Signed-off-by: Richard Henderson
Signed-off-by: Pranith Kumar
---
tcg/aarch64/tcg-target.inc.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index 1447f7c..bc8ac9c 100644
--- a/tcg/a
Cc: Andrzej Zaborowski
Cc: Peter Maydell
Signed-off-by: Pranith Kumar
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.inc.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index f9f54c6..1447aa8 100644
--- a/tc
Cc: Aurelien Jarno
Signed-off-by: Richard Henderson
Signed-off-by: Pranith Kumar
---
tcg/ia64/tcg-target.inc.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/tcg/ia64/tcg-target.inc.c b/tcg/ia64/tcg-target.inc.c
index 395223e..7b220a7 100644
--- a/tcg/ia64/tcg-target.inc.c
+++ b/tcg/i
Cc: Alexander Graf
Signed-off-by: Richard Henderson
Signed-off-by: Pranith Kumar
---
tcg/s390/tcg-target.inc.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c
index e0a60e6..b83b65b 100644
--- a/tcg/s390/tcg-target.inc.c
+++ b/t
Cc: Blue Swirl
Signed-off-by: Richard Henderson
Signed-off-by: Pranith Kumar
---
tcg/sparc/tcg-target.inc.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/tcg/sparc/tcg-target.inc.c b/tcg/sparc/tcg-target.inc.c
index 9938a50..af8a300 100644
--- a/tcg/sparc/tcg-ta
Signed-off-by: Richard Henderson
Signed-off-by: Pranith Kumar
---
tcg/ppc/tcg-target.inc.c | 24
1 file changed, 24 insertions(+)
diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c
index da10052..766848e 100644
--- a/tcg/ppc/tcg-target.inc.c
+++ b/tcg/ppc/
Signed-off-by: Richard Henderson
Signed-off-by: Pranith Kumar
---
tcg/mips/tcg-target.inc.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
index 50e98ea..fb6cb3e 100644
--- a/tcg/mips/tcg-target.inc.c
+++ b/tcg/mips/tcg-target.inc.
Generate mfence/sfence/lfence instruction on SSE2 enabled
processors. For older processors, generate a 'lock orl $0,0(%esp)'
instruction which has full ordering semantics.
Signed-off-by: Pranith Kumar
[rth: Check for sse2, fallback to locked memory op otherwise.]
Signed-off-by: Richard Henderson
This commit introduces the TCGOpcode for memory barrier instruction.
This opcode takes an argument which is the type of memory barrier
which should be generated.
Signed-off-by: Pranith Kumar
Signed-off-by: Richard Henderson
---
tcg/README| 17 +
tcg/tcg-op.c | 11 +
Hi,
> > > Bother. I've tentatively put a revert into ppc-for-2.7. Richard,
> > > do you have a better idea how to fix it?
> >
> > Please try the following.
>
> Thanks! This passes my tests. Feel free to add:
>
> Tested-by: Anton Blanchard
Actually I think I've found a problem:
When I change qemu version from 2.1.2 to 2.6.0. The vcpu0 will return 0 qemu.
I got strace like this:
strace -p 1180
Process 1180 attached - interrupt to quit
rt_sigtimedwait([BUS USR1], 0x7f719b5fa960, {0, 0}, 8) = -1 EAGAIN (Resource
temporarily unavailable)
rt_sigpending([])
Thanks for your advice. I got newer version of OVMF from
https://www.kraxel.org/repos/. And compile from source
code(git://github.com/tianocore/edk2.git).
With these OVMF, it really works well on only 1 vcpu domain. But still failed
with multi-vcpus.
The vcpu0 runnig in an endless loop, and ot
The OVMF build you use (SVN r15214) is from Feb 2014 -- it is completely
obsolete. I suggest you use the packages from
https://www.kraxel.org/repos/ .
I'm marking this as "invalid" because supporting 2+ year old OVMF builds
is unthinkable.
** Changed in: qemu
Status: New => Invalid
--
Yo
When e500 PPC is booted multi-core, the non-boot cores are started via
the spin table. ppce500_spin.c:spin_kick() calls
mmubooke_create_initial_mapping() to allocate a 64MB TLB entry, but
the created TLB entry is only 256KB.
The root cause is that the function computing the size of the TLB
entry,
My recollection is fuzzy but it would probably amount to something like
this on any platform currently:
- download rust-1.10 beta source https://static.rust-lang.org/dist
/rustc-beta-src.tar.gz
- download this stage0 snapshot
https://www.dropbox.com/s/01ywl9mwwo6xojw/rust-stage0-2016-04-18-b324fa
Note change of subject from "Determining interest in PPC e500spin,
yield".
Thomas Huth wrote on 06/16/2016 01:47:05 AM:
Aaron Larson wrote on 15.06.2016 22:12
in ppce500_spin.c
AL> @@ -104,6 +108,16 @@
AL>
AL> cpu_synchronize_state(cpu);
AL> stl_p(&curspin->pir, env->spr[SPR_PIR]);
2016-06-18 1:22 GMT+09:00 Liviu Ionescu :
>
> > On 17 Jun 2016, at 05:37, Tsung-Han Lin wrote:
> >
> > Hi, I made some changes to TRY TO fix the ARM semihosting issue ...
> > This problem has been bothering me for quite a while.
>
> semihosting was the first thing I fixed in GNU ARM Eclipse QEMU,
So after some further debugging effort it turns out while the page
allocator is unaware of the mapping (looks like the x86_64 NPTL
implementation never maps the thread ID memory?), g2h() does work on the
address, and in this case they map to the same value. I'll probably
submit a patch using g2h i
Thomas Huth wrote on 06/16/2016 01:25:45 AM:
> Thanks for your patch! However, patches have to follow certain rules
> before they can be included in QEMU. Please read through
Sorry for the broken patch, and the long delay. I'm not a git user
so its taken a while to climb the curve. I didn't ge
On 06/17/16 22:55, Raj, Ashok wrote:
> On Fri, Jun 17, 2016 at 10:48:17PM +0200, Laszlo Ersek wrote:
>> On 06/17/16 22:21, Raj, Ashok wrote:
>>> On Fri, Jun 17, 2016 at 07:31:08PM +0200, Laszlo Ersek wrote:
>>
>> On 16/06/2016 08:06, Haozhong Zhang wrote:
>>> It's a prerequisite that ce
On Fri, Jun 17, 2016 at 10:48:17PM +0200, Laszlo Ersek wrote:
> On 06/17/16 22:21, Raj, Ashok wrote:
> > On Fri, Jun 17, 2016 at 07:31:08PM +0200, Laszlo Ersek wrote:
>
> On 16/06/2016 08:06, Haozhong Zhang wrote:
> > It's a prerequisite that certain bits of MSR_IA32_FEATURE_CONTROL s
On 06/17/16 22:21, Raj, Ashok wrote:
> On Fri, Jun 17, 2016 at 07:31:08PM +0200, Laszlo Ersek wrote:
On 16/06/2016 08:06, Haozhong Zhang wrote:
> It's a prerequisite that certain bits of MSR_IA32_FEATURE_CONTROL should
> be set before some features (e.g. VMX and LMCE) can be used,
On Fri, Jun 17, 2016 at 07:31:08PM +0200, Laszlo Ersek wrote:
> >>
> >> On 16/06/2016 08:06, Haozhong Zhang wrote:
> >>> It's a prerequisite that certain bits of MSR_IA32_FEATURE_CONTROL should
> >>> be set before some features (e.g. VMX and LMCE) can be used, which is
> >>> usually done by the fir
Stefan Hajnoczi writes:
> On Tue, Jun 14, 2016 at 03:11:12PM +0200, Lluís Vilanova wrote:
>> @@ -1116,6 +1117,7 @@ int main(int argc, char **argv)
>> gdbserver_start (gdbstub_port);
>> gdb_handlesig(cpu, 0);
>> }
>> +trace_init_vcpu_events();
> Do vcpu events make sense in *-user builds? I t
Using gcc 6.1 for alpha-linux-user target we see the following build error:
.../target-alpha/translate.c: In function ‘in_superpage’:
.../target-alpha/translate.c:454:52: error: self-comparison always evaluates to
true [-Werror=tautological-compare]
&& addr >> TARGET_VIRT_ADDR_SPACE_
On 06/17/16 14:55, Peter Maydell wrote:
> On 17 June 2016 at 13:41, Mark Cave-Ayland
> wrote:
>> Thank you looking into this. I know that some workarounds have been
>> applied for similar bugs in Peter's setup, but in general should I
>> assume that out-of-the-box Debian oldstable is now no longer
On Fri, Jun 17, 2016 at 2:04 PM, Paolo Bonzini wrote:
>
>
> On 16/06/2016 21:07, Richard Henderson wrote:
>>> && ((addr >> 41) & 3) == 2
>>> -&& addr >> TARGET_VIRT_ADDR_SPACE_BITS == addr >> 63);
>>> +&& addr >> TARGET_VIRT_ADDR_SPACE_BITS == 1);
>
> What you
On 16/06/2016 21:07, Richard Henderson wrote:
>> && ((addr >> 41) & 3) == 2
>> -&& addr >> TARGET_VIRT_ADDR_SPACE_BITS == addr >> 63);
>> +&& addr >> TARGET_VIRT_ADDR_SPACE_BITS == 1);
What you want here is
+ addr >> TARGET_VIRT_ADDR_SPACE_BITS
On Wed, Jun 15, 2016 at 01:55:45PM +0530, Prasanna Kumar Kalever wrote:
> unified coding styles of multiline function arguments and other error
> functions
> moved random declarations of structures and other list variables
>
> Signed-off-by: Prasanna Kumar Kalever
> Reviewed-by: Eric Blake
Rev
On 17/06/2016 19:20, Eduardo Habkost wrote:
>> >
>> > What will be the conclusion? Do we still need this check?
>> >
>> > I'm fine to remove this check if we normally didn't make such kind of
>> > checks and require users to avoid configuration mismatch.
>
> I don't know yet if Paolo is convin
On Fri, Jun 17, 2016 at 2:09 PM, Richard Henderson wrote:
> On 06/17/2016 11:07 AM, Pranith Kumar wrote:
>> On Fri, Jun 17, 2016 at 2:04 PM, Paolo Bonzini wrote:
>>>
>>>
>>> On 16/06/2016 21:07, Richard Henderson wrote:
> && ((addr >> 41) & 3) == 2
> -&& addr >> T
On Fri, Jun 17, 2016 at 10:01:05AM +0800, Haozhong Zhang wrote:
> On 06/16/16 14:58, Eduardo Habkost wrote:
> > On Thu, Jun 16, 2016 at 07:40:20PM +0200, Paolo Bonzini wrote:
> > >
> > >
> > > On 16/06/2016 19:36, Eduardo Habkost wrote:
> > > >> >
> > > >> > Eduardo said nice for this part in pr
On 17/06/2016 18:33, Alex Bennée wrote:
> +wp = g_array_index(cpu->watchpoints, CPUWatchpoint *, index);
Worth adding macros or inline functions cpu_breakpoint_at(cpu, index)
and cpu_watchpoint_at(cpu, index)? This will also be less churn in
patch 4, because the macros will always return CP
On 17 June 2016 at 18:27, Richard Henderson wrote:
> On 06/17/2016 09:36 AM, Peter Maydell wrote:
>> And
>> most architectures except x86-64 won't honour PT_GNU_STACK=non-exec
>> unless the parent process also had nonexec stack (because they
>> let the READ_IMPLIES_EXEC personality flag be inherit
On 17/06/2016 18:33, Alex Bennée wrote:
> @@ -807,18 +807,17 @@ int cpu_watchpoint_insert_with_ref(CPUState *cpu, vaddr
> addr, vaddr len,
> wp->flags = flags;
> wp->ref = ref;
> } else {
> -wp = g_malloc(sizeof(*wp));
> -
> -wp->vaddr = addr;
> -wp
On Wed, Jun 15, 2016 at 01:55:44PM +0530, Prasanna Kumar Kalever wrote:
> A future patch will add support for multiple gluster servers. Existing
> terminology is a bit unusual in relation to what names are used by
> other networked devices, and doesn't map very well to the terminology
> we expect t
On 06/17/2016 11:07 AM, Pranith Kumar wrote:
> On Fri, Jun 17, 2016 at 2:04 PM, Paolo Bonzini wrote:
>>
>>
>> On 16/06/2016 21:07, Richard Henderson wrote:
&& ((addr >> 41) & 3) == 2
-&& addr >> TARGET_VIRT_ADDR_SPACE_BITS == addr >> 63);
+&& add
On 06/16/2016 10:17 AM, Peter Maydell wrote:
> This patchset converts a handful of network devices to use
> ld*_p() and st*_p() instead of cpu_to_*w() and *_to_cpup().
>
> This is the last lot of conversion patches; I have the "delete
> the implementations from bswap.h" patch, and will send that o
On 17/06/2016 18:33, Alex Bennée wrote:
> The watchpoint code is stubbed out for CONFIG_USER_ONLY so there is no
> point attempting to copy the data here. Lets remove the code before the
> RCU protection goes in.
>
> Signed-off-by: Alex Bennée
> ---
> linux-user/main.c | 8
> 1 file c
We've now overhauled the signal handling code in upstream QEMU, and it
has its own implementation of the basic idea in the patch from comment 1
(which is "don't let the guest block SIGSEGV").
** Changed in: qemu
Status: New => Fix Committed
--
You received this bug notification because y
This works for me so I think we must have fixed this problem at some
point between 2.3 and current master. If you still have this problem
with a QEMU build from head of git please reopen with instructions for
how to reproduce.
** Changed in: qemu
Status: New => Fix Released
--
You receiv
Each time breakpoints are added/removed from the array it's done using
an read-copy-update cycle. Simultaneous writes are protected by the
debug_update_lock.
Signed-off-by: Alex Bennée
---
cpus.c| 3 +
exec.c| 167 --
qemu can locate the guest page with that address but it has a flags
field of all zero (no access, invalid). Any ideas?
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1591611
Title:
chroot using qem
Hi Haozhong,
On 06/16/16 13:19, Haozhong Zhang wrote:
> On 06/16/16 11:52, Paolo Bonzini wrote:
>>
>>
>> On 16/06/2016 08:06, Haozhong Zhang wrote:
>>> It's a prerequisite that certain bits of MSR_IA32_FEATURE_CONTROL should
>>> be set before some features (e.g. VMX and LMCE) can be used, which is
In preparation for the conversion to an RCU controlled list of
breakpoints I've removed all $ARCH local references to breakpoint
structures. They can be accessed with cpu_breakpoint_get_by_ref() which
will eventually offer them for the lifetime of the rcu_read_lock().
Instead of using pointers as
Each time watchpoints are added/removed from the array it's done using
an read-copy-update cycle. Simultaneous writes are protected by the
debug_update_lock.
Signed-off-by: Alex Bennée
---
cpu-exec.c | 7 ++-
exec.c | 193 -
2 fil
On 06/17/2016 09:36 AM, Peter Maydell wrote:
> On 17 June 2016 at 17:12, Richard Henderson wrote:
>> What about using dl_iterate_phdr, looking for PT_GNU_STACK?
>> That interface is present on a few other hosts besides Linux.
>
> We could do that. I note that the MIPS kernel is buggy in that
> it
Commit 9d29cdeaaca3a0383af764000b71492c4fc67c6e (rtl8139: port
TallyCounters to vmstate) introduced in incompatibility in the v4
format as it omitted the RxOkMul counter.
There are presumably no users that were impacted by the v4 to v4'
breakage, so increase the save version to 5 and re-add the fi
On Fri, Jun 17, 2016 at 05:31:20PM +0100, Peter Maydell wrote:
> On 17 June 2016 at 17:10, Richard W.M. Jones wrote:
> > On Fri, Jun 17, 2016 at 03:49:38PM +0100, Peter Maydell wrote:
> >> > I agree that we really need to do better here (thinking about
> >> > the problem is on my todo list but gen
On 17 June 2016 at 17:10, Richard W.M. Jones wrote:
> On Fri, Jun 17, 2016 at 03:49:38PM +0100, Peter Maydell wrote:
>> > I agree that we really need to do better here (thinking about
>> > the problem is on my todo list but generally other more pressing
>> > issues intervene). I'd welcome suggesti
> On 17 Jun 2016, at 05:37, Tsung-Han Lin wrote:
>
> Hi, I made some changes to TRY TO fix the ARM semihosting issue ...
> This problem has been bothering me for quite a while.
semihosting was the first thing I fixed in GNU ARM Eclipse QEMU, and since then
I use it constantly.
I don't know if
On 17/06/2016 18:33, Alex Bennée wrote:
> First we move the break/watchpoints into an array which is more
> amenable to RCU control that the QLIST. We then control the life time
> of references to break/watchpoint data by removing long held
> references in the target code and getting information
On Thu, Jun 16, 2016 at 8:43 PM, Laurent Vivier wrote:
>
>
> Le 16/06/2016 à 21:15, Pranith Kumar a écrit :
>> On Thu, Jun 16, 2016 at 3:07 PM, Richard Henderson wrote:
>>> On 06/16/2016 11:56 AM, Pranith Kumar wrote:
Using gcc 6.1 for alpha-linux-user target we see the following build
On 06/17/16 13:20, Gerd Hoffmann wrote:
> Hi,
>
>>> Not sure whenever qemu adds some extra space for hotplug to the 64bit
>>> hole and if so how it calculates the size then. But the guest os should
>>> stick to those ranges when configuring hotplugged devices.
>
>> currently firmware would ass
On Fri, 17 Jun 2016, Paul Durrant wrote:
> > -Original Message-
> > From: Juergen Gross [mailto:jgr...@suse.com]
> > Sent: 17 June 2016 11:40
> > To: Paul Durrant; Jan Beulich
> > Cc: Anthony Perard; xen-devel; sstabell...@kernel.org; qemu-
> > de...@nongnu.org; kra...@redhat.com
> > Subjec
The patches to block signals on entry to the signal handler have now
been applied to master.
** Changed in: qemu
Status: In Progress => Fix Committed
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/
On Fri, Jun 17, 2016 at 09:26:57AM +0800, Haozhong Zhang wrote:
[...]
> > > static void mce_init(X86CPU *cpu)
> > > {
> > > CPUX86State *cenv = &cpu->env;
> > > unsigned int bank;
> > > +Error *local_err = NULL;
> > >
> > > if (((cenv->cpuid_version >> 8) & 0xf) >= 6
> > >
On 17/06/2016 18:33, Alex Bennée wrote:
> Each time watchpoints are added/removed from the array it's done using
> an read-copy-update cycle. Simultaneous writes are protected by the
> debug_update_lock.
>
> Signed-off-by: Alex Bennée
> ---
> cpu-exec.c | 7 ++-
> exec.c | 193
> +++
On Thu, 16 Jun 2016, Juergen Gross wrote:
> On 16/06/16 15:07, Stefano Stabellini wrote:
> > On Thu, 16 Jun 2016, Juergen Gross wrote:
> >> On 16/06/16 12:54, Jan Beulich wrote:
> >> On 16.06.16 at 12:02, wrote:
> In case the word size of the domU and qemu running the qdisk backend
>
The watchpoint code is stubbed out for CONFIG_USER_ONLY so there is no
point attempting to copy the data here. Lets remove the code before the
RCU protection goes in.
Signed-off-by: Alex Bennée
---
linux-user/main.c | 8
1 file changed, 8 deletions(-)
diff --git a/linux-user/main.c b/l
On 06/17/2016 07:11 AM, Peter Maydell wrote:
> Some architectures require the stack to be executable; notably
> this includes MIPS, because the kernel's floating point emulator
> may try to put trampoline code on the stack to handle some cases.
> (See https://bugs.debian.org/cgi-bin/bugreport.cgi?b
On 17/06/2016 18:33, Alex Bennée wrote:
> Before we can protect the lists we need a structure a little more
> amenable to RCU protection. This moves all the lists into a re-sizeable
> array. The array still only points to allocated structures because a
> number of the architectures still need to
This patch adds the specification of the Signal Dristribution Module virtio
device to the current virtio specification document.
Signed-off-by: Christian Pinto
---
virtio-sdm.tex | 126 +
1 file changed, 126 insertions(+)
create mode 10064
On 17/06/2016 18:33, Alex Bennée wrote:
> Each time breakpoints are added/removed from the array it's done using
> an read-copy-update cycle. Simultaneous writes are protected by the
> debug_update_lock.
>
> Signed-off-by: Alex Bennée
> ---
> cpus.c| 3 +
> exec.c| 16
The test program works fine with current git master, so I think we have
fixed this bug at some point in the last two years.
** Changed in: qemu
Status: New => Fix Released
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https
In preparation for the conversion to an RCU controlled list of
watchpoints I've removed all $ARCH local copies of the watchpoint
structures. They can be accessed with cpu_watchpoint_get_by_ref() which
will eventually offer them for the lifetime of the rcu_read_lock().
Instead of using pointers as
Hi all,
This patch series proposes the specification of a new virtio device on which we
are working on, namely the Signal Distribution Module (SDM).
The SDM routes inter-processor signals intra and inter QEMU
instances, using a user-defined communication channel. At the current state the
SDM pro
On Fri, Jun 17, 2016 at 03:49:38PM +0100, Peter Maydell wrote:
> On 26 May 2016 at 15:53, Peter Maydell wrote:
> > On 26 May 2016 at 15:46, Richard W.M. Jones wrote:
> >> The problem with this is if I'm using TCG fallback mode, how
> >> can I specify the right gic-version? ie:
> >>
> >> -M vir
Before we can protect the lists we need a structure a little more
amenable to RCU protection. This moves all the lists into a re-sizeable
array. The array still only points to allocated structures because a
number of the architectures still need to look at the results of a hit
by examining the fiel
This test case now works for me, so I think we have resolved the bug
that was showing up here.
** Changed in: qemu
Status: New => Fix Committed
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https://bugs.launchpad.net/bugs/1
From: "Daniel P. Berrange"
Move all trace-events for files in the qom/ directory to
their own file.
Signed-off-by: Daniel P. Berrange
Message-id: 1466066426-16657-40-git-send-email-berra...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
Makefile.objs| 1 +
qom/trace-events | 5 +
trace
On 17 June 2016 at 17:12, Richard Henderson wrote:
> What about using dl_iterate_phdr, looking for PT_GNU_STACK?
> That interface is present on a few other hosts besides Linux.
We could do that. I note that the MIPS kernel is buggy in that
it will assume the stack is executable even if the binary
Hi,
Last time I went through the MTTCG code the access to the
break/watchpoint code was annotated with "RCU?". The code currently
gets away with avoiding locks for the gdbstub as the guest execution
state is usually halted. However when used for modelling architectural
debug registers there is no
On 06/17/16 11:52, Igor Mammedov wrote:
> On Fri, 17 Jun 2016 11:17:54 +0200
> Gerd Hoffmann wrote:
>
>> On Fr, 2016-06-17 at 10:43 +0200, Paolo Bonzini wrote:
>>>
>>> On 17/06/2016 10:15, Dr. David Alan Gilbert wrote:
Larger is a problem if the guest tries to map something to a high
From: "Daniel P. Berrange"
Move all trace-events for files in the hw/acpi/ directory to
their own file.
Signed-off-by: Daniel P. Berrange
Message-id: 1466066426-16657-31-git-send-email-berra...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
Makefile.objs| 1 +
hw/acpi/trace-events | 1
This bug was fixed by commit aa07f5ecf9828 in 2014 and has been released
in QEMU.
** Changed in: qemu
Status: New => Fix Released
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https://bugs.launchpad.net/bugs/1299190
Title:
Recent changes to QEMU's handling of signals fix this hang trying to run
mono under QEMU; they should be out in QEMU 2.7.
** Changed in: qemu
Status: New => Fix Committed
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https:
Instead of dynamically allocating each break/watchpoint just include in
the array. This will make it easier to use RCU to update the array as
well as make the scanning of the current list more cache-line friendly.
Signed-off-by: Alex Bennée
---
cpu-exec.c | 2 +-
exec.c
From: "Daniel P. Berrange"
Move all trace-events for files in the hw/9pfs/ directory to
their own file.
Signed-off-by: Daniel P. Berrange
Message-id: 1466066426-16657-26-git-send-email-berra...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
Makefile.objs| 1 +
hw/9pfs/trace-events | 4
From: "Daniel P. Berrange"
Move all trace-events for files in the linux-user/ directory to
their own file.
Signed-off-by: Daniel P. Berrange
Reviewed-by: Laurent Vivier
Message-id: 1466066426-16657-41-git-send-email-berra...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
Makefile.objs
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