Paolo Bonzini writes:
>> > struct QmpOutputVisitor
>> > {
>> > Visitor visitor;
>> > -QStack stack; /* Stack of containers that haven't yet been finished */
>> > +QSLIST_HEAD(, QStackEntry) stack; /* Stack of containers that haven't
>> > yet been finished */
>>
>> Long line. I'll
On Fri, Jul 08, 2016 at 03:24:13PM +1000, David Gibson wrote:
> On Thu, Jul 07, 2016 at 08:20:23PM +0530, Bharata B Rao wrote:
> > Conditonally set stable_cpu_id for CPU threads that are created as part
> > of spapr CPU cores. The use of stable_cpu_id is enabled for pseries-2.7
> > onwards.
> >
>
On Fri, 8 Jul 2016 11:57:07 +1000
David Gibson wrote:
> On Thu, Jul 07, 2016 at 10:55:02AM +0200, Greg Kurz wrote:
> > On Thu, 7 Jul 2016 12:01:51 +1000
> > David Gibson wrote:
> >
> > > On Wed, Jul 06, 2016 at 02:14:36PM +0200, Greg Kurz wrote:
> > > > This patch switches machine types to
On Tue, 06/28 16:42, Alex Bennée wrote:
> This is the latest iteration of my qemu-user support inside Docker.
> They apply directly on top of master. I've made the changes suggested
> in the last review and split apart another patch. I've also added a
> new update command so a tagged image can be u
On Thu, Jul 07, 2016 at 08:20:24PM +0530, Bharata B Rao wrote:
> xics maintains an array of ICPState structures which is indexed
> by cpu_index. Optionally change this to index the ICPState array by
> stable_cpu_id. When the use of stable_cpu_id is enabled from pseries-2.7
> onwards, this allows mi
On Thu, Jul 07, 2016 at 06:04:10PM +0200, Greg Kurz wrote:
> On Thu, 7 Jul 2016 20:20:20 +0530
> Bharata B Rao wrote:
>
> > device_add/del based CPU hotplug and unplug support is upstream for
> > sPAPR PowerPC and is under development for x86. Both of these will
> > support CPU device removal in
On Thu, Jul 07, 2016 at 08:20:23PM +0530, Bharata B Rao wrote:
> Conditonally set stable_cpu_id for CPU threads that are created as part
> of spapr CPU cores. The use of stable_cpu_id is enabled for pseries-2.7
> onwards.
>
> Signed-off-by: Bharata B Rao
> ---
> hw/ppc/spapr_cpu_core.c | 7 +
On Thu, Jul 07, 2016 at 08:20:22PM +0530, Bharata B Rao wrote:
> Add CPUState::stable_cpu_id and use that as instance_id in
> vmstate_register() call.
>
> Introduce has-stable_cpu_id property that allows target machines to
> optionally switch to using stable_cpu_id instead of cpu_index.
> This wil
On Thu, Jul 07, 2016 at 06:11:31PM +0200, Greg Kurz wrote:
> On Thu, 7 Jul 2016 20:20:23 +0530
> Bharata B Rao wrote:
>
> > Conditonally set stable_cpu_id for CPU threads that are created as part
> > of spapr CPU cores. The use of stable_cpu_id is enabled for pseries-2.7
> > onwards.
> >
>
> T
On Thu, Jul 07, 2016 at 07:52:32PM +0200, Greg Kurz wrote:
> On Thu, 7 Jul 2016 20:20:22 +0530
> Bharata B Rao wrote:
>
> > Add CPUState::stable_cpu_id and use that as instance_id in
> > vmstate_register() call.
> >
> > Introduce has-stable_cpu_id property that allows target machines to
> > opt
On 07/07/2016 08:00 PM, Emilio G. Cota wrote:
On Fri, Jul 01, 2016 at 10:04:36 -0700, Richard Henderson wrote:
Force the use of cmpxchg16b on x86_64.
Wikipedia suggests that only very old AMD64 (circa 2004) did not have
this instruction. Further, it's required by Windows 8 so no new cpus
will
On Fri, Jul 08, 2016 at 10:20:32AM +0530, Nikunj A Dadhania wrote:
> David Gibson writes:
>
> > [ Unknown signature status ]
> > On Thu, Jul 07, 2016 at 11:24:15PM +0530, Nikunj A Dadhania wrote:
> >> From: Benjamin Herrenschmidt
> >>
> >> Instead of an array of fixed sized blocks, use a list,
Clang insists that "cmp" is ambiguous with a memory destination,
requiring an explicit size suffix.
There was a true error in the use of .cfi_def_cfa_offset in the
epilogue, but changing to use the proper .cfi_adjust_cfa_offset
runs afoul of a clang bug wrt .cfi_restore_state. Better to
fold the
For clang before 3.5, -fno-integrated-as does not exist,
so the workaround in 5f6f0e27fb24 fails to build.
Use clang's default assembler for linux-user/safe-syscall.S,
and explicitly change to use the system assembler for the
option roms.
Signed-off-by: Richard Henderson
---
configure
Alex pointed out that my last attempt to get things all working
falls afoul of old clang, in use by our Travis CI.
This is tested with clang 3.7, but with examination of the build
logs to see that the system assembler is used for the optionroms.
r~
Richard Henderson (2):
linux-user: Fix i386
On Thu, Jul 07, 2016 at 11:24:18PM +0530, Nikunj A Dadhania wrote:
> From: Benjamin Herrenschmidt
>
> The existing implementation remains same and ics-base is introduced. The
> type name "ics" is retained, and all the related functions renamed as
> ics_simple_*
>
> This will allow different impl
On Thu, Jul 07, 2016 at 11:24:16PM +0530, Nikunj A Dadhania wrote:
> From: Benjamin Herrenschmidt
>
> This will make life easier for dealing with dynamically configured
> ICSes such as PHB3
>
> Signed-off-by: Benjamin Herrenschmidt
> Reviewed-by: David Gibson
> Signed-off-by: Nikunj A Dadhania
David Gibson writes:
> [ Unknown signature status ]
> On Thu, Jul 07, 2016 at 11:24:15PM +0530, Nikunj A Dadhania wrote:
>> From: Benjamin Herrenschmidt
>>
>> Instead of an array of fixed sized blocks, use a list, as we will need
>> to have sources with variable number of interrupts. SPAPR only
On 2016年06月23日 19:34, Zhang Chen wrote:
if packets are same, we send primary packet and drop secondary
packet, otherwise notify COLO do checkpoint.
More verbose please, e.g how to handle each case of exception (or maybe
comment in the code).
Signed-off-by: Zhang Chen
Signed-off-by: Li Z
On Thu, Jul 07, 2016 at 11:24:15PM +0530, Nikunj A Dadhania wrote:
> From: Benjamin Herrenschmidt
>
> Instead of an array of fixed sized blocks, use a list, as we will need
> to have sources with variable number of interrupts. SPAPR only uses
> a single entry. Native will create more. If performa
On 2016年06月23日 19:34, Zhang Chen wrote:
In this patch we use kernel jhash table to track
connection, and then enqueue net packet like this:
+ CompareState ++
| |
+---+ +---+ +---+
|conn list +--->conn +->conn
On Thu, Jul 07, 2016 at 04:33:42PM -0700, Andrey Smirnov wrote:
> Convert target_memory_rw_debug to use MMUAccessType as to follow similar
> conversion of cpu_memory_rw_debug.
Apart from previously mentioned concerns with the confusingly named
MMU_* tokens,
Reviewed-by: David Gibson
>
> Signed
On Thu, Jul 07, 2016 at 04:33:41PM -0700, Andrey Smirnov wrote:
> Convert address_space_rw() to use MMUAccessType following the conversion
> of cpu_memory_rw_debug().
Same concerns as the previous patch. These paths don't actually have
anything to do with the MMU, which makes the constants oddly
On Thu, Jul 07, 2016 at 04:33:39PM -0700, Andrey Smirnov wrote:
> Change signature of cpu_memory_rw_debug() to expectet void * as a buffer
> instead of uint8_t * to avoid forcing the caller of the function to do a
> type cast.
>
> Signed-off-by: Andrey Smirnov
Seems reasonable.
Reviewed-by: Dav
On 2016年06月23日 19:34, Zhang Chen wrote:
Packets coming from the primary char indev will be sent to outdev
Packets coming from the secondary char dev will be dropped
usage:
primary:
-netdev tap,id=hn0,vhost=off,script=/etc/qemu-ifup,downscript=/etc/qemu-ifdown
-device e1000,id=e0,netdev=hn0,ma
On Thu, Jul 07, 2016 at 04:33:40PM -0700, Andrey Smirnov wrote:
> Convert cpu_memory_rw_debug() to use MMUAccessType as a way of
> specifying memory reads/writes. This makes caller code be more obvious
> in what it does (previously one had to interpret 0 or 1 and remember the
> semantics of the las
On Thu, Jul 07, 2016 at 04:33:35PM -0700, Andrey Smirnov wrote:
> Avoid calling address_space_rw() when direction of the transfer is
> constant and known at compile time and replace them with explicit calls
> to address_space_read()/address_space_write().
>
> Signed-off-by: Andrey Smirnov
Review
vs->disconnecting is set to TRUE and vs->ioc is closed, but
vs->ioc isn't set to NULL, so that the vnc_disconnect_finish()
isn't invoked when you update client in vnc_update_client()
after vnc_disconnect_start invoked. Let's using change the checking
condition to avoid resource leak.
Signed-off-by
On Thu, Jul 07, 2016 at 04:33:36PM -0700, Andrey Smirnov wrote:
> Change signature of address_space_read() to expectet void * as a buffer
> instead of uint8_t * to avoid forcing the caller of the function to do a
> type cast.
>
> Signed-off-by: Andrey Smirnov
Seems reasonable.
Reviewed-by: Davi
On Thu, Jul 07, 2016 at 04:33:38PM -0700, Andrey Smirnov wrote:
> Move call to memory_region_dispatch_write() outside of swtich statement
> since the only thing that is different about all of those call is
> "length" argument and that matches value in "l". Also collapse switch
> statement to occupy
On Thu, Jul 07, 2016 at 04:33:37PM -0700, Andrey Smirnov wrote:
> Change signature of address_space_write() to expectet void * as a buffer
> instead of uint8_t * to avoid forcing the caller of the function to do a
> type cast.
>
> Signed-off-by: Andrey Smirnov
Reviewed-by: David Gibson
> ---
>
On Fri, Jul 01, 2016 at 10:04:50 -0700, Richard Henderson wrote:
(snip)
> [rth: Rearrange 128-bit cmpxchg helper. Enforce alignment on LL.]
>
> Signed-off-by: Emilio G. Cota
> Message-Id: <1467054136-10430-28-git-send-email-c...@braap.org>
> Signed-off-by: Richard Henderson
> ---
> target-arm/
On 07/07/2016 07:49 PM, Eduardo Habkost wrote:
On Thu, Jul 07, 2016 at 01:44:48PM -0300, Eduardo Habkost wrote:
Hi,
Sorry for taking so long to review it.
The patch in general looks good, except for:
On Fri, Jun 24, 2016 at 01:49:36PM +0300, Denis V. Lunev wrote:
[...]
+if (MACHINE_GET_C
On Thu, Jul 07, 2016 at 23:08:17 -0400, Emilio G. Cota wrote:
> On Fri, Jul 01, 2016 at 10:04:37 -0700, Richard Henderson wrote:
> > From: "Emilio G. Cota"
> >
> > The diff here is uglier than necessary. All this does is to turn
> >
> > FOO
> >
> > into:
> >
> > if (s->prefix & PREFIX_LOCK) {
On Fri, Jul 01, 2016 at 10:04:37 -0700, Richard Henderson wrote:
> From: "Emilio G. Cota"
>
> The diff here is uglier than necessary. All this does is to turn
>
> FOO
>
> into:
>
> if (s->prefix & PREFIX_LOCK) {
> BAR
> } else {
> FOO
> }
>
> where FOO is the original implementation of an
On Fri, Jul 01, 2016 at 10:04:36 -0700, Richard Henderson wrote:
> Force the use of cmpxchg16b on x86_64.
>
> Wikipedia suggests that only very old AMD64 (circa 2004) did not have
> this instruction. Further, it's required by Windows 8 so no new cpus
> will ever omit it.
>
> If we truely care ab
On Tue, 07/05 15:37, Kevin Wolf wrote:
> Am 17.06.2016 um 11:23 hat Kevin Wolf geschrieben:
> > Am 03.06.2016 um 10:48 hat Fam Zheng geschrieben:
> > > Respect the locking mode from CLI or QMP, and set the open flags
> > > accordingly.
> > >
> > > Signed-off-by: Fam Zheng
> > > Reviewed-by: Max R
On Fri, Jul 01, 2016 at 10:04:26 -0700, Richard Henderson wrote:
> I spent a couple evenings this week tweaking Emilio's patch set.
>
> The first major change is to "qemu/int128.h", so that we can use
> that type in the context of a 16-byte cmpxchg. I have yet to teach
> TCG code generation about
On 07/07/16 14:10, Eduardo Habkost wrote:
> On Wed, Jun 22, 2016 at 02:56:24PM +0800, Haozhong Zhang wrote:
> > ... to avoid guest errors due to LMCE configurations changes when
> > migrating from LMCE-enabled QEMU to LMCE-disabled QEMU.
> >
> > Signed-off-by: Haozhong Zhang
>
> Paolo doesn't li
On 07/07/2016 09:16 AM, Alex Bennée wrote:
+if echo | $ccas -dM -E - | grep __clang__ > /dev/null 2>&1 ; then
+ ccas="$ccas -fno-integrated-as"
+fi
Hi Richard,
This looks like it breaks the Travis clang:
https://travis-ci.org/qemu/qemu/builds/142825178
We get the error:
ASoptio
On Thu, 7 Jul 2016 17:17:14 +0200
Peter Krempa wrote:
> Add a helper that looks up the NUMA node for a given CPU and use it to
> fill the node_id in the PPC and X86 impls of query-hotpluggable-cpus.
IIUC how the query thing works this means that the node id issued by
query-hotpluggable-cpus wi
On Thu, 7 Jul 2016 17:17:13 +0200
Peter Krempa wrote:
> Add 'vcpu index' to the output of query hotpluggable cpus. This output
> is identical to the linear cpu index taken by the 'cpus' attribute
> passed to -numa.
The problem is, the vcpu index of what? Each entry in the hotpluggable
cpus ta
On 07/08/2016 09:48 AM, Fam Zheng wrote:
On Wed, 06/22 18:49, Zhang Chen wrote:
We want to poll and handle chardev in another thread
other than main loop. But qemu_chr_add_handlers() can only
work for global default context other than thread default context.
So we use g_source_attach(xx, g_mai
On Thu, Jul 07, 2016 at 10:55:02AM +0200, Greg Kurz wrote:
> On Thu, 7 Jul 2016 12:01:51 +1000
> David Gibson wrote:
>
> > On Wed, Jul 06, 2016 at 02:14:36PM +0200, Greg Kurz wrote:
> > > This patch switches machine types to provide device-tree cpu ids.
> > >
> > > We have three cases to handle:
On Wed, 06/22 18:49, Zhang Chen wrote:
> We want to poll and handle chardev in another thread
> other than main loop. But qemu_chr_add_handlers() can only
> work for global default context other than thread default context.
> So we use g_source_attach(xx, g_main_context_get_thread_default())
> repl
Hi Alex,
The following code will be modified.
1. vfio_pci_ioctl
add a flag in vfio_device_info for workable_state support
return workable_state in "struct vfio_pci_device" when user get info
Seems like two flags are required, one to indicate the presence of this
feature and another to in
On 06/29/2016 02:46 PM, Zhang Chen wrote:
On 06/22/2016 06:49 PM, Zhang Chen wrote:
Hi~ Paolo~
Just a ping...no news for a week~
Ping...again...
CC Fam
This patch about main loop.
Thanks
Zhang Chen
We want to poll and handle chardev in another thread
other than main loop. But qemu
Laurent,
Seems to work well for my specific case – select no longer returns EFAULT on
x86_64 linux user mode, and the arguments are passed correctly.
Thank you!
Cheers,
Allan
On 7/7/16, 7:17 PM, "Laurent Vivier" wrote:
>TARGET_NR_select can have three different implementations:
>
> 1- to al
TARGET_NR_select can have three different implementations:
1- to always return -ENOSYS
microblaze, ppc, ppc64
-> TARGET_WANT_NI_OLD_SELECT
2- to take parameters from a structure pointed by arg1
(kernel sys_old_select)
i386, arm, m68k
-> TARGET_WANT_OLD_SYS_SELECT
On 07/04/2016 08:38 AM, Denis V. Lunev wrote:
> From: Evgeny Yakovlev
>
> Some guests (win2008 server for example) do a lot of unnecessary
> flushing when underlying media has not changed. This adds additional
> overhead on host when calling fsync/fdatasync.
>
> This change introduces a write ge
On 07/07/2016 06:11 AM, Kevin Wolf wrote:
> In order to remove the necessity to use BlockBackend names in the
> external API, we want to allow node-names everywhere. This converts
> block-commit to accept a node-name without lifting the restriction that
> we're operating at a root node.
>
> As lib
On 07/07/2016 06:11 AM, Kevin Wolf wrote:
> In order to remove the necessity to use BlockBackend names in the
> external API, we want to allow node-names everywhere. This converts
> block-stream to accept a node-name without lifting the restriction that
> we're operating at a root node.
>
> In cas
On 07/04/2016 10:53 AM, Paolo Bonzini wrote:
> On 04/07/2016 16:38, Denis V. Lunev wrote:
>> Changes from v4:
>> - Moved to write generation scheme instead of dirty flag
>> - Added retry setup to IDE PIO and FLUSH requests
>>
>> Changes from v3:
>> - Fixed a typo in commit message
>> - Rebased on
Oh, that is interesting. Using lscpi -v on my computer reveals that
Linux tends to default to enabling MSI on my PCIe devices that support
it (since the common opinion is that it's better for PCIe), including
all my graphics cards, so the fact that vfio-pci and Windows 10 both
default to disabling
(Forgot to clarify: yes, vfio-pci devices disable MSI by default for me
just like for Clif Houck, but all other PCIe devices have it enabled.)
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1580459
Ti
Sergey Fedorov writes:
> On 07/07/16 22:46, Sergey Fedorov wrote:
>> On 07/07/16 22:36, Alex Bennée wrote:
>>> Sergey Fedorov writes:
>>>
From: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
---
cpu-exec.c | 15 +--
On Thu, Jul 07, 2016 at 04:53:44PM -0400, Jeff Cody wrote:
> On Thu, Jul 07, 2016 at 06:22:37PM +0100, Mark Cave-Ayland wrote:
> > On 07/07/16 04:12, Jeff Cody wrote:
> >
> > > Alright, here is what I think will work to switch over relatively
> > > painlessly, and move master over to the github ha
This update should preserve git history, and switches over to the official
openbios git repo, rather than pulling from the svn mirror. All prior history
from the svn repository should still be preserved (i.e., commit hashes are the
same for historical commits).
The origin/master tag now follows t
On 06/22/2016 08:53 AM, Fam Zheng wrote:
> v2: Fix patch 1 #else branch, and "r" => "ret". [Kevin]
> Add Kevin's r-b line in patch 2.
>
> This is an independent tiny change extracted from the image locking series,
> which can be processed separately.
>
> Improved according to Kevin's sugges
On Thu, 07 Jul 2016 20:34:15 -
Clif Houck wrote:
> I was also experiencing the host hard locking when shutting down a
> Windows 10 guest with a Nvidia GPU passed-through, but the issue appears
> to be completely solved after switching the card to MSI mode in the
> Windows guest.
>
> However,
On Thu, Jul 07, 2016 at 06:22:37PM +0100, Mark Cave-Ayland wrote:
> On 07/07/16 04:12, Jeff Cody wrote:
>
> > Alright, here is what I think will work to switch over relatively
> > painlessly, and move master over to the github hashes for the submodule.
> >
> > I haven't done it yet on the serve
I was also experiencing the host hard locking when shutting down a
Windows 10 guest with a Nvidia GPU passed-through, but the issue appears
to be completely solved after switching the card to MSI mode in the
Windows guest.
However, I would be interested in understanding *why* using the card in
lin
On 07/07/16 22:46, Sergey Fedorov wrote:
> On 07/07/16 22:36, Alex Bennée wrote:
>> Sergey Fedorov writes:
>>
>>> From: Sergey Fedorov
>>>
>>> Signed-off-by: Sergey Fedorov
>>> Signed-off-by: Sergey Fedorov
>>> ---
>>> cpu-exec.c | 15 +--
>>> 1 file changed, 9 insertions(+), 6 del
On 07/06/2016 04:24 AM, Kevin Wolf wrote:
> Am 05.07.2016 um 22:50 hat John Snow geschrieben:
>>
>>
>> On 07/05/2016 11:49 AM, Daniel P. Berrange wrote:
>>> On Tue, Jul 05, 2016 at 11:24:04AM -0400, Colin Lord wrote:
This puts the bochs probe function into its own separate file as part of
On 07/05/2016 11:24 AM, Colin Lord wrote:
> This is the next version of this patch series. The first three patches
> in the series are mostly the same as they were last time, but with the
> issues mentioned in the reviews fixed. Most notably this means much less
> copy-paste happening in block.c.
On 07/07/16 00:15, Sergey Fedorov wrote:
> From: Sergey Fedorov
>
> Use async_safe_run_on_cpu() to make tb_flush() thread safe.
I've just realized that this allows to remove CPUState::tb_flushed as well.
Regards,
Sergey
From: Haozhong Zhang
It's a prerequisite that certain bits of MSR_IA32_FEATURE_CONTROL should
be set before some features (e.g. VMX and LMCE) can be used, which is
usually done by the firmware. This patch adds a fw_cfg file
"etc/msr_feature_control" which contains the advised value of
MSR_IA32_FE
Improve the TSC frequency mismatch warning to show the host and
VM TSC frequencies.
Reviewed-by: Dr. David Alan Gilbert
Reviewed-by: Marcelo Tosatti
Signed-off-by: Eduardo Habkost
---
target-i386/kvm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target-i386/kvm.c b/t
From: Ashok Raj
This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they
are injected to only one VCPU rather than broadcast to all VCPUs. As KVM
reports LMCE support on Intel platforms, this features is only available
on Intel platforms.
LMCE is disabled by default and can be enab
From: Evgeny Yakovlev
This change adds hyperv feature words report through qom rpc.
When VM is configured with hyperv features enabled
libvirt will check that required feature words are set
in cpuid leaf 4003 through qom request.
Currently qemu does not report hyperv feature words
which pre
Use the new GlobalProperty.errp field to handle compat_props
errors.
Example output before this change:
(with an intentionally broken entry added to PC_COMPAT_1_3 just
for testing)
$ qemu-system-x86_64 -machine pc-1.3
qemu-system-x86_64: hw/core/qdev-properties.c:1091:
qdev_prop_set_globals_
From: Igor Mammedov
Considering that features are converted to global properties and
global properties are automatically applied to every new instance
of created CPU (at object_new() time), there is no point in
parsing cpu_model string every time a CPU created. So move
parsing outside CPU creatio
From: Haozhong Zhang
If -cpu host is used, LMCE will be automatically enabled when it's
supported by host.
Signed-off-by: Haozhong Zhang
Reviewed-by: Eduardo Habkost
Signed-off-by: Eduardo Habkost
---
target-i386/cpu.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/targ
The function is just a helper to handle the -global options, it
can stay in vl.c like most qemu_opts_foreach() calls.
Reviewed-by: Igor Mammedov
Reviewed-by: Markus Armbruster
Signed-off-by: Eduardo Habkost
---
hw/core/qdev-properties-system.c | 21 +
include/qemu/config-fi
From: Igor Mammedov
Considering that features are converted to global properties and
global properties are automatically applied to every new instance
of created CPU (at object_new() time), there is no point in
parsing cpu_model string every time a CPU created. So move
parsing outside CPU creatio
From: Paolo Bonzini
x86_cpu_parse_featurestr has a "val = num;" assignment just before num
goes out of scope. Push num up to fix the issue.
Signed-off-by: Paolo Bonzini
Reviewed-by: Igor Mammedov
Reviewed-by: Eduardo Habkost
Signed-off-by: Eduardo Habkost
---
target-i386/cpu.c | 2 +-
1 fi
From: Igor Mammedov
Currently CPUClass->parse_features() is used to parse -cpu
features string and set properties on created CPU instances.
But considering that features specified by -cpu apply to every
created CPU instance, it doesn't make sense to parse the same
features string for every CPU c
From: Igor Mammedov
Make SPARC target use sparc_cpu_parse_features() directly
so it won't get in the way of switching other propertified
targets to handling features as global properties.
Signed-off-by: Igor Mammedov
Reviewed-by: Eduardo Habkost
Signed-off-by: Eduardo Habkost
---
target-spar
qdev_prop_set_globals_for_type() stops applying global properties
on the first error. It is a leftover from when QEMU exited on any
error when applying global property. Commit 25f8dd9 changed the
fatal error to a warning, but neglected to drop the stopping.
Fix that.
For example, the following com
The new field will allow error handling to be configured by
qdev_prop_register_global() callers: &error_fatal and
&error_abort can be used to make QEMU exit or abort if any errors
are reported when applying the properties.
While doing it, change the error message from "global %s.%s=%s
ignored" to
The following changes since commit 4f4a9ca4a4386c137301b3662faba076455ff15a:
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160707'
into staging (2016-07-07 14:49:38 +0100)
are available in the git repository at:
git://github.com/ehabkost/qemu.git tag
From: Paolo Bonzini
ERMS just says "rep movsb" and "rep stosb" are fast. It does not
imply any new instruction, so we can support it easily.
Signed-off-by: Paolo Bonzini
Reviewed-by: Eduardo Habkost
Signed-off-by: Eduardo Habkost
---
target-i386/cpu.c | 5 +++--
1 file changed, 3 insertions
Move the compat_props handling to core machine code.
Reviewed-by: Marcel Apfelbaum
Reviewed-by: Markus Armbruster
Signed-off-by: Eduardo Habkost
---
hw/core/machine.c | 16
include/hw/boards.h | 1 +
vl.c| 9 ++---
3 files changed, 19 insertions(+), 7 d
On 07/07/16 22:36, Alex Bennée wrote:
> Sergey Fedorov writes:
>
>> From: Sergey Fedorov
>>
>> Signed-off-by: Sergey Fedorov
>> Signed-off-by: Sergey Fedorov
>> ---
>> cpu-exec.c | 15 +--
>> 1 file changed, 9 insertions(+), 6 deletions(-)
>>
>> diff --git a/cpu-exec.c b/cpu-exec.c
Emilio G. Cota writes:
> On Tue, Jul 05, 2016 at 17:18:10 +0100, Alex Bennée wrote:
>> Well this is the first re-spin of the series posted last week. I've
>> added a bunch of additional patches to be more aggressive with
>> avoiding bouncing locks but to be honest the numbers don't seem to
>> ma
Sergey Fedorov writes:
> From: Sergey Fedorov
>
> Signed-off-by: Sergey Fedorov
> Signed-off-by: Sergey Fedorov
> ---
> cpu-exec.c | 15 +--
> 1 file changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/cpu-exec.c b/cpu-exec.c
> index dd0bd5007701..54c935039592 100644
> ---
Paolo Bonzini writes:
> On 07/07/2016 18:04, Emilio G. Cota wrote:
>>> > I think the first 3 patches are ready to take if the TCG maintainers
>>> > want to:
>>> >
>>> > tcg: Ensure safe tb_jmp_cache lookup out of 'tb_lock'
>>> > tcg: set up tb->page_addr before insertion
>>> > tcg: c
On Thu, Jul 07, 2016 at 03:44:43PM +0100, Peter Maydell wrote:
> If userspace specifies a short buffer for a target sockaddr,
> the kernel will only copy in as much as it has space for
> (or none at all if the length is zero) -- see the kernel
> move_addr_to_user() function. Mimic this in QEMU's
>
On 7/7/16, 3:09 PM, "Laurent Vivier" wrote:
>
>
>Le 07/07/2016 à 21:04, Wirth, Allan a écrit :
>>
>>
>> On 7/7/16, 3:02 PM, "Laurent Vivier" wrote:
>>
>>>
>>>
>>> Le 07/07/2016 à 20:49, Riku Voipio a écrit :
On Sat, Jul 02, 2016 at 09:12:09PM +0100, Peter Maydell wrote:
> On 2 July
Le 07/07/2016 à 21:04, Wirth, Allan a écrit :
>
>
> On 7/7/16, 3:02 PM, "Laurent Vivier" wrote:
>
>>
>>
>> Le 07/07/2016 à 20:49, Riku Voipio a écrit :
>>> On Sat, Jul 02, 2016 at 09:12:09PM +0100, Peter Maydell wrote:
On 2 July 2016 at 17:41, Laurent Vivier wrote:
> Sadly, this can
On 7/7/16, 3:02 PM, "Laurent Vivier" wrote:
>
>
>Le 07/07/2016 à 20:49, Riku Voipio a écrit :
>> On Sat, Jul 02, 2016 at 09:12:09PM +0100, Peter Maydell wrote:
>>> On 2 July 2016 at 17:41, Laurent Vivier wrote:
Sadly, this can't work:
sparc/sparc64/cris use sys_select for NR_sel
On Wed, 6 Jul 2016 10:01:28 +0800
Zhou Jie wrote:
> Hi Alex,
>
> > Due to weekend and holiday in my country, there were zero regular
> > working hours between your emails.
> I wish you had a good time.
>
> >>> The following code will be modified.
> >>> 1. vfio_pci_ioctl
> >>>add a flag in
Le 07/07/2016 à 20:49, Riku Voipio a écrit :
> On Sat, Jul 02, 2016 at 09:12:09PM +0100, Peter Maydell wrote:
>> On 2 July 2016 at 17:41, Laurent Vivier wrote:
>>> Sadly, this can't work:
>>>
>>> sparc/sparc64/cris use sys_select for NR_select AND NR_newselect.
>>
>>> Not sure all is correct, bu
On 07/07/2016 01:33 AM, Stanislav Shmarov wrote:
In user-mode emulation Translation Block can consist of 2 guest pages.
In that case QEMU also mprotects 2 host pages that are dedicated for
guest memory, containing instructions. QEMU detects self-modifying code
with SEGFAULT signal processing.
In
On Sat, Jul 02, 2016 at 09:12:09PM +0100, Peter Maydell wrote:
> On 2 July 2016 at 17:41, Laurent Vivier wrote:
> > Sadly, this can't work:
> >
> > sparc/sparc64/cris use sys_select for NR_select AND NR_newselect.
>
> > Not sure all is correct, but it's what I've found:
> >
> > | __NR
* Eduardo Habkost (ehabk...@redhat.com) wrote:
> On Tue, Jul 05, 2016 at 08:03:18PM +0100, Dr. David Alan Gilbert (git) wrote:
> > From: "Dr. David Alan Gilbert"
> >
> > A special case based on the previous phys-bits property; if it's
> > the magic value 0 then use the hosts capabilities.
> >
>
* Eduardo Habkost (ehabk...@redhat.com) wrote:
> On Thu, Jul 07, 2016 at 05:39:14PM +0100, Dr. David Alan Gilbert wrote:
> [...]
> > * Eduardo Habkost (ehabk...@redhat.com) wrote:
> > > On Tue, Jul 05, 2016 at 08:03:15PM +0100, Dr. David Alan Gilbert (git)
> > > wrote:
> > > > From: "Dr. David Ala
On 07/07/2016 09:53 AM, Paolo Bonzini wrote:
> This saves a lot of memory compared to a statically-sized array,
> or at least 24kb could be considered a lot on an Atari ST.
> It also makes the code more similar to QmpOutputVisitor.
>
> This removes the limit on the depth of a QObject that can be p
On Thu, Jul 07, 2016 at 05:39:14PM +0100, Dr. David Alan Gilbert wrote:
[...]
> * Eduardo Habkost (ehabk...@redhat.com) wrote:
> > On Tue, Jul 05, 2016 at 08:03:15PM +0100, Dr. David Alan Gilbert (git)
> > wrote:
> > > From: "Dr. David Alan Gilbert"
> > >
> > > Currently QEMU sets the x86 number
From: Benjamin Herrenschmidt
The existing implementation remains same and ics-base is introduced. The
type name "ics" is retained, and all the related functions renamed as
ics_simple_*
This will allow different implementations for the source controllers
such as the MSI support of PHB3 on Power8
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