MIN_NON_ZERO(0, 1) is evaluated to 0. Rewrite the macro to fix it.
Reported-by: Miroslav Rezanina
Signed-off-by: Fam Zheng
---
include/qemu/osdep.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
index e63da28..e4c6ae6 100644
---
Hello Mark,
On 07/11/2016 08:11 PM, Mark Cave-Ayland wrote:
> On 11/07/16 08:51, Cédric Le Goater wrote:
>
>>> Hmmm if that's the same 9.2.1 image we were using for last year's GSoC
>>> then it has been working fine here? From what I've seen both 9.2.1 and
>>> 9.2.2 now boot fine, but please test
Hi all block maintainers, ping...
@kevin & jeff, do you have time to review these patchsets?
Thanks
-Wang WeiWei
在 2016年07月06日 01:45, Changlong Xie 写道:
Block replication is a very important feature which is used for
continuous checkpoints(for example: COLO).
You can get the detailed infor
On 12/07/16 15:26, David Gibson wrote:
> This ioctl() call to VFIO_IOMMU_SPAPR_TCE_REMOVE was left over from an
> earlier version of the code and has since been folded into
> vfio_spapr_remove_window().
>
> It wasn't caught because although the argument structure has been removed,
> the libc funct
On 07/11/2016 01:41 PM, Jason Wang wrote:
On 2016年07月08日 17:56, Zhang Chen wrote:
On 07/08/2016 12:07 PM, Jason Wang wrote:
On 2016年06月23日 19:34, Zhang Chen wrote:
In this patch we use kernel jhash table to track
connection, and then enqueue net packet like this:
+ CompareState ++
|
On Mon, Jul 11, 2016 at 03:51:44PM +0200, Paolo Bonzini wrote:
>
>
> On 05/07/2016 07:31, David Gibson wrote:
> > +ret = ioctl(container->fd, VFIO_IOMMU_SPAPR_TCE_CREATE, &create);
> > +if (ret) {
> > +error_report("Failed to create a window, ret = %d (%m)", ret);
> > +ret
This ioctl() call to VFIO_IOMMU_SPAPR_TCE_REMOVE was left over from an
earlier version of the code and has since been folded into
vfio_spapr_remove_window().
It wasn't caught because although the argument structure has been removed,
the libc function remove() means this didn't trigger a compile fa
AIO based handler is more appropriate here because it will then
cooperate with bdrv_drained_begin/end. It is needed by the coming
revert patch.
Signed-off-by: Fam Zheng
---
hw/scsi/virtio-scsi.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/hw/scsi/virtio-scsi.c b/
Using this function instead of virtio_add_queue marks the vq as aio
based. This differentiation will be useful in later patches.
Distinguish between virtqueue processing in the iohandler context and main loop
AioContext. iohandler context is isolated from AioContexts and therefore does
not run du
On Mon, Jul 11, 2016 at 05:27:50PM +0100, Peter Maydell wrote:
> On 11 July 2016 at 03:24, David Gibson wrote:
> > On Sun, Jul 10, 2016 at 08:32:32PM +0100, Peter Maydell wrote:
> >> On 8 July 2016 at 04:42, David Gibson wrote:
> >> > My only concern here is that the constants are named
> >> > *M
On Mon, Jul 11, 2016 at 04:21:29PM +0200, Paolo Bonzini wrote:
>
>
> On 05/07/2016 07:31, David Gibson wrote:
> >
> > -if (tcet && tcet->nb_table) {
> > -spapr_tce_table_disable(tcet);
> > +if (tcet && tcet->nb_table) {
> > +spapr_tce_table_disable(tcet);
> > +
This reverts commit ab27c3b5e7408693dde0b565f050aa55c4a1bcef.
The virtio storage device host notifiers now work with
bdrv_drained_begin/end, so we don't need this hack any more.
Signed-off-by: Fam Zheng
---
block/mirror.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/block/mirror.
The function pointer signature has been repeated a few times, using a
typedef may make coding easier.
Signed-off-by: Fam Zheng
Reviewed-by: Stefan Hajnoczi
---
hw/virtio/virtio.c | 9 -
include/hw/virtio/virtio.h | 5 +++--
2 files changed, 7 insertions(+), 7 deletions(-)
diff
It always equals to assign now.
Signed-off-by: Fam Zheng
Reviewed-by: Stefan Hajnoczi
---
hw/virtio/virtio-bus.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/hw/virtio/virtio-bus.c b/hw/virtio/virtio-bus.c
index a85b7c8..8700de0 100644
--- a/hw/virtio/virtio
v3: Rebase to master.
Squash 4 into 3. [Paolo]
Add comment and commit message. [Stefan]
Add Stefan's r-b in patch 1 and 2.
v2: Only convert virtio-{blk,scsi}. [Paolo]
The benifit of this is we don't use event_notifier_set_handler even in
non-dataplane now, which in turn makes virtio-b
AIO based handler is more appropriate here because it will then
cooperate with bdrv_drained_begin/end. It is needed by the coming
revert patch.
Signed-off-by: Fam Zheng
---
hw/block/virtio-blk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/block/virtio-blk.c b/hw/block/
On Mon, Jul 11, 2016 at 09:58:21AM +0200, Igor Mammedov wrote:
> On Mon, 11 Jul 2016 13:22:37 +1000
> David Gibson wrote:
>
> > On Fri, Jul 08, 2016 at 01:11:02PM +0200, Igor Mammedov wrote:
> > > On Fri, 8 Jul 2016 15:19:58 +1000
> > > David Gibson wrote:
> > >
> > > > On Thu, Jul 07, 2016 a
On Mon, Jul 11, 2016 at 10:15:57AM +0200, Igor Mammedov wrote:
> On Mon, 11 Jul 2016 13:26:01 +1000
> David Gibson wrote:
>
> > On Fri, Jul 08, 2016 at 12:59:59PM +0200, Igor Mammedov wrote:
> > > On Fri, 8 Jul 2016 17:39:52 +1000
> > > David Gibson wrote:
> > >
> > > > On Fri, Jul 08, 2016 a
On Mon, Jul 11, 2016 at 03:42:29PM +0200, Igor Mammedov wrote:
> this approach i I preffer as it uses less per machine migration glue
> and follows typical compat pattern for devices
>
> Signed-off-by: Igor Mammedov
> Signed-off-by: Bharata B Rao
After our IRC discussion last night, I prefer th
Hi,
Let's say we have this chain:
base <--- sn1 <--- sn2 <--- active
Can we shutdown the VM and "qemu-img convert sn2 -O qcow2 sn2_new" and
rebase active to sn2_new like this:
sn2_new <--- active
?
Or is it better practice to blockpull? BTW, is blockpull into an
non-active snapsho
On Jul 11, 2016, at 2:37 PM, Mark Cave-Ayland wrote:
> On 11/07/16 15:42, Programmingkid wrote:
>
>>> Hmmm if that's the same 9.2.1 image we were using for last year's GSoC
>>> then it has been working fine here? From what I've seen both 9.2.1 and
>>> 9.2.2 now boot fine, but please test and rep
On Wed, Jul 06, 2016 at 08:20:45AM +0200, Igor Mammedov wrote:
> currently present CPUs counter in CMOS only contains
> smp_cpus (i.e. initial CPUs specified with -smp X) and
> doesn't account for CPUs created with -device.
> If VM is started with additional CPUs added with
> -device, it will hang
On Fri, 8 Jul 2016 09:46:00 +0200
Peter Krempa wrote:
> On Fri, Jul 08, 2016 at 12:23:08 +1000, David Gibson wrote:
> > On Thu, 7 Jul 2016 17:17:14 +0200
> > Peter Krempa wrote:
> >
> > > Add a helper that looks up the NUMA node for a given CPU and use it to
> > > fill the node_id in the PPC
On Wed, Jul 06, 2016 at 08:20:44AM +0200, Igor Mammedov wrote:
> it returns a list of present/possible to hotplug CPU
> objects with a list of properties to use with
> device_add.
>
> in PC case returned list would looks like:
> -> { "execute": "query-hotpluggable-cpus" }
> <- {"return": [
>
On Wed, Jul 06, 2016 at 08:20:43AM +0200, Igor Mammedov wrote:
> CPU added with device_add help won't have APIC ID set,
> so set it according to socket/core/thread ids provided
> with device_add command.
>
> Signed-off-by: Igor Mammedov
> ---
> v3:
> - use %u for printing topo ids
You didn't ch
On Wed, Jul 06, 2016 at 08:20:42AM +0200, Igor Mammedov wrote:
> these properties will be used by as address where to plug
> CPU with help -device/device_add commands.
>
> Signed-off-by: Igor Mammedov
Reviewed-by: Eduardo Habkost
--
Eduardo
On Wed, Jul 06, 2016 at 08:20:40AM +0200, Igor Mammedov wrote:
[...]
> +static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
> +DeviceState *dev, Error **errp)
> +{
> +int idx;
> +X86CPU *cpu = X86_CPU(dev);
> +PCMachineState *pcms = PC_MACHINE(hotplug_de
On Wed, Jul 06, 2016 at 08:20:39AM +0200, Igor Mammedov wrote:
> it will be reused in the next patch at pre_plug time
>
> Signed-off-by: Igor Mammedov
> ---
> v2:
> - rename pc_find_cpu() into pc_find_cpu_slot() and add comment to it
> Eduardo Habkost
> ---
> hw/i386/pc.c | 29 ++
** Summary changed:
- Failed to build gobject-introspection for qemumips64 on i686 hosts
+ Usermode qemu-mips64 does not run on 32 bit i686 hosts
** Description changed:
Hi,
- This issue happens when building Yocto project on i686 hosts.
+ The usermode qemu-mips64 fails to execute on 32 bit
On Wed, Jul 06, 2016 at 08:20:38AM +0200, Igor Mammedov wrote:
> it's reverse of apicid_from_topo_ids() and will be used in follow up
> patches to fill in data structures for query-hotpluggable-cpus and
> for user friendly error reporting
>
> Signed-off-by: Igor Mammedov
Reviewed-by: Eduardo Hab
On Wed, Jul 06, 2016 at 08:20:37AM +0200, Igor Mammedov wrote:
> Redo 9886e834 (target-i386: Require APIC ID to be explicitly set before
> CPU realize) in another way that doesn't use int64_t to detect
> if apic-id property has been set.
>
> Use the fact that 0x is the broadcast
> value th
Hi Alex,
The variable clearly isn't visible to the user, so the user can know
whether the kernel supports this feature, but not whether the feature
is currently active. Perhaps there's no way to avoid races completely,
but don't you expect that if we define that certain operations are
blocked a
On Mon, 07/11 20:06, Alex Bennée wrote:
>
> Fam Zheng writes:
>
> > Signed-off-by: Fam Zheng
> > ---
> > tests/docker/dockerfiles/debootstrap-arm.docker | 35
> > +
> > 1 file changed, 35 insertions(+)
> > create mode 100644 tests/docker/dockerfiles/debootstrap-arm.do
On 2016/7/12 2:22, Peter Maydell wrote:
> Coverity complains that the GICR_IPRIORITYR case in gicv3_readl()
> can overflow an array, because it doesn't know that the offsets
> passed to that function must be word aligned. Add some assert()s
> which hopefully tell Coverity that this isn't possible
On 2016/7/12 2:09, Peter Maydell wrote:
> Coverity complains that the exit() in gicv3_class_name()
> can be unreachable, because if TARGET_AARCH64 is defined
> then all code paths return before reaching it. Move the
> exit() up to the error_report() that it belongs with.
>
> Signed-off-by: Peter
On Mon, Jul 11, 2016 at 07:30:08PM +0100, Mark Cave-Ayland wrote:
1;4402;0c> On 11/07/16 02:55, David Gibson wrote:
>
> > On Sat, Jul 09, 2016 at 01:41:31PM +1000, Benjamin Herrenschmidt wrote:
> >> MacOS uses an architecturally illegal MSR combination that
> >> seems nonetheless supported by 32-b
No oxford comma in the subject? :)
On 06/23/2016 10:36 AM, Kevin Wolf wrote:
> I am relatively confident to say that everything that should use a
> BlockBackend, does so by now. Almost all users create their own anonymous
> BlockBackend internally and use that. The user configures the BB only
> in
Set the ZynqMP number of priority queues to 2.
Signed-off-by: Alistair Francis
---
hw/arm/xlnx-zynqmp.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 23c7199..0d86ba3 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -332,6
Signed-off-by: Alistair Francis
---
hw/net/cadence_gem.c | 182 +--
1 file changed, 91 insertions(+), 91 deletions(-)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index c80e833..1c09756 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/ca
Signed-off-by: Alistair Francis
---
hw/net/cadence_gem.c | 27 ---
1 file changed, 16 insertions(+), 11 deletions(-)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index 8a4be1e..9d64644 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -1214,24 +
Arrayify the Cadence GEM device to prepare for adding priority queue support.
Signed-off-by: Alistair Francis
---
This patch has no real effect, I used it to help debug some issues so I
figured I would leave it in.
hw/net/cadence_gem.c | 78 +++-
Update the Xilinx maintainers documentation to simplify what we maintain
and cover all of our upstream code.
Signed-off-by: Alistair Francis
---
MAINTAINERS | 30 ++
1 file changed, 14 insertions(+), 16 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 1d0e2
Signed-off-by: Alistair Francis
---
There is a indentation error in this patch in the gem_transmit function.
I have written it like that to make it easier to see the changes. It is
fixed in the next patch.
hw/net/cadence_gem.c | 157 ---
include/h
This patch series adds initial priority queue support to the Cadence GEM
device. This is based on original work by Peter C, that has been ported
to the latest version of QEMU.
There is more GEM work that I'd like to upstream after this, but I
figured this a good place to start. I have done limited
On Jul 11, 2016, at 6:44 PM, Peter Maydell wrote:
> On 11 July 2016 at 23:31, Programmingkid wrote:
>> On Jul 11, 2016, at 6:28 PM, Peter Maydell wrote:
>>> Do we have this feature in any of our other front end UIs?
>>> I don't really want to get into adding features to the Cocoa
>>> UI frontend
On 07/11/2016 10:12 PM, Igor Mammedov wrote:
On Mon, 11 Jul 2016 21:45:10 +0800
Xiao Guangrong wrote:
This patchset is against commit 269fe4c3ab0c (vmw_pvscsi: remove unnecessary
internal msi state flag) on pci branch of Michael's git tree and can be found
at:
https://github.com/xiaog
On 11 July 2016 at 23:31, Programmingkid wrote:
> On Jul 11, 2016, at 6:28 PM, Peter Maydell wrote:
>> Do we have this feature in any of our other front end UIs?
>> I don't really want to get into adding features to the Cocoa
>> UI frontend that don't exist anywhere else. (We've had this
>> discus
On Jul 11, 2016, at 6:28 PM, Peter Maydell wrote:
> On 11 July 2016 at 23:20, Programmingkid wrote:
>> Add a menu called "Send Key". It is populated with options the user supplies
>> at
>> runtime. The option works like this: -sendkeymenu :. The
>> title can be anything you want. The values are
On 11 July 2016 at 23:20, Programmingkid wrote:
> Add a menu called "Send Key". It is populated with options the user supplies
> at
> runtime. The option works like this: -sendkeymenu :. The
> title can be anything you want. The values are the hexadecimal values for the
> keycodes. The title is a
On 11 July 2016 at 22:56, Alistair Francis wrote:
> I still think this is helpful as there are a large number of cases
> where setting a bit in a register propagates through the system to
> somewhere else. We use this functionality to control the VINITI pin
> for the R5 in our tree and many other
Add a menu called "Send Key". It is populated with options the user supplies at
runtime. The option works like this: -sendkeymenu :. The
title can be anything you want. The values are the hexadecimal values for the
keycodes. The title is added to the menu as an menu item. The keycodes are sent
to Q
On Tue, Jul 5, 2016 at 1:37 PM, Peter Maydell wrote:
> On 5 July 2016 at 21:30, Alistair Francis wrote:
>> This patchset adds and connects the Xilinx ZynqmP IPI devices using the
>> register GPIO line.
>>
>> This requires adding the register GPIO API which allows registers to be
>> mapped to GPIO
On 07/11/2016 06:12 AM, Evgeny Yakovlev wrote:
>
>
> On 08.07.2016 21:44, John Snow wrote:
>>
>> On 07/04/2016 10:38 AM, Denis V. Lunev wrote:
>>> From: Evgeny Yakovlev
>>>
>>> Some guests (win2008 server for example) do a lot of unnecessary
>>> flushing when underlying media has not changed.
On Mon, Jul 11, 2016 at 08:46:56PM +0100, Mark Cave-Ayland wrote:
> On 08/07/16 17:02, Mark Cave-Ayland wrote:
>
> > On 08/07/16 11:41, Andreas Färber wrote:
> >
> >> Am 07.07.2016 um 23:22 schrieb Jeff Cody:
> >>> This update should preserve git history, and switches over to the official
> >>> o
Hi,
As I understand, the way to handle PCI FLR is by the function -
void pcie_cap_flr_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, int
len)
which call the function -
/*
* This function is called on #RST and FLR.
* FLR if PCI_EXP_DEVCTL_BCR_FLR is set
*/
void pci_device_reset(PCIDevic
Adds a new iotest for testing that the format probing functions work as
expected. This is done by booting up a vm with a disk image without
specifying the image format. Then the format is checked using a call to
query-block.
For any format specified, at least one check is done with an image of
the
Adds option to test the dmg format.
Signed-off-by: Colin Lord
---
tests/qemu-iotests/common | 7 +++
1 file changed, 7 insertions(+)
diff --git a/tests/qemu-iotests/common b/tests/qemu-iotests/common
index d60ea2c..dc937c7 100644
--- a/tests/qemu-iotests/common
+++ b/tests/qemu-iotests/comm
This series adds a couple simple tests for the block driver format
probes just to make sure that they're getting called correctly and
returning the expected values. This should help verify the correctness
of the other series I've been working on. The tests aren't super
complicated but are a good sa
This adds a python equivalent of the _use_sample_img and _rm_sample_img
testing functions.
Signed-off-by: Colin Lord
---
tests/qemu-iotests/iotests.py | 15 +++
1 file changed, 15 insertions(+)
diff --git a/tests/qemu-iotests/iotests.py b/tests/qemu-iotests/iotests.py
index 1687c33.
On 08/07/16 17:02, Mark Cave-Ayland wrote:
> On 08/07/16 11:41, Andreas Färber wrote:
>
>> Am 07.07.2016 um 23:22 schrieb Jeff Cody:
>>> This update should preserve git history, and switches over to the official
>>> openbios git repo, rather than pulling from the svn mirror. All prior
>>> histo
From: "Dr. David Alan Gilbert"
Add the host-phys-bits boolean property, if true, take phys-bits
from the hosts physical bits value, overriding either the default
or the user specified value.
We can also use the value we read from the host to check the users
explicitly set value and warn them if
From: "Dr. David Alan Gilbert"
This is the last one of the patches in my previous physical address
bits set; all the others are in x86-next and this patch is based
off x86-next.
v5:
Remove error/warning on host-phys-bits in TCG/32bit mode, so letting
a machine type turn host-phys-bits on.
D
On 11 July 2016 at 19:47, Sergey Sorokin wrote:
[re TLBIALLNSNH and TLBIALLNSNHIS]
> Table G4-25 Effect of the TLB maintenance instructions says:
> b. Available only in an implementation that includes EL2.
>
> So seems they should be in el2_cp_reginfo which is exist regardless EL3
> enabled.
> A
Fam Zheng writes:
> Signed-off-by: Fam Zheng
> ---
> tests/docker/dockerfiles/debootstrap-arm.docker | 35
> +
> 1 file changed, 35 insertions(+)
> create mode 100644 tests/docker/dockerfiles/debootstrap-arm.docker
>
> diff --git a/tests/docker/dockerfiles/debootstrap
11.07.2016, 21:36, "Peter Maydell" :
> On 11 July 2016 at 19:23, Sergey Sorokin wrote:
>> 11.07.2016, 20:39, "Peter Maydell" :
+
+ CPU_FOREACH(other_cs) {
+ tlb_flush_page_by_mmuidx(other_cs, pageaddr, ARMMMUIdx_S1E2, -1);
+ }
+}
+
static const
* Eduardo Habkost (ehabk...@redhat.com) wrote:
> On Mon, Jul 11, 2016 at 04:39:22PM +0100, Dr. David Alan Gilbert wrote:
> > * Eduardo Habkost (ehabk...@redhat.com) wrote:
> [...]
> > > > +cpu->phys_bits = TCG_PHYS_ADDR_BITS;
> > > > +}
> > > > } else {
> > > > /*
On Mon, Jul 11, 2016 at 04:39:22PM +0100, Dr. David Alan Gilbert wrote:
> * Eduardo Habkost (ehabk...@redhat.com) wrote:
[...]
> > > +cpu->phys_bits = TCG_PHYS_ADDR_BITS;
> > > +}
> > > } else {
> > > /* For 32 bit systems don't use the user set value, but keep
> >
On 11/07/16 16:18, Marcel Apfelbaum wrote:
> On 07/11/2016 05:42 PM, Leon Alrae wrote:
>> Hi,
>>
>> This commit causes regressions in my MIPS tests. QEMU segfaults when
>> booting Linux on Malta board;
>
> Hi Leon,
>
> Is a good thing you caught it in the pull request, thanks!
> Is a pity we don
On 11/07/16 02:55, David Gibson wrote:
> On Sat, Jul 09, 2016 at 01:41:31PM +1000, Benjamin Herrenschmidt wrote:
>> MacOS uses an architecturally illegal MSR combination that
>> seems nonetheless supported by 32-bit processors, which is
>> to have MSR[PR]=1 and one or more of MSR[DR/IR/EE]=0.
>>
>
On 11/07/16 15:42, Programmingkid wrote:
>> Hmmm if that's the same 9.2.1 image we were using for last year's GSoC
>> then it has been working fine here? From what I've seen both 9.2.1 and
>> 9.2.2 now boot fine, but please test and report if that's not the case.
>>
> I tried the Mac OS 9.2.1 iso
On 11 July 2016 at 19:23, Sergey Sorokin wrote:
> 11.07.2016, 20:39, "Peter Maydell" :
>>> +
>>> + CPU_FOREACH(other_cs) {
>>> + tlb_flush_page_by_mmuidx(other_cs, pageaddr, ARMMMUIdx_S1E2, -1);
>>> + }
>>> +}
>>> +
>>> static const ARMCPRegInfo cp_reginfo[] = {
>>> /* Define the sec
11.07.2016, 20:39, "Peter Maydell" :
>> +
>> + CPU_FOREACH(other_cs) {
>> + tlb_flush_page_by_mmuidx(other_cs, pageaddr, ARMMMUIdx_S1E2, -1);
>> + }
>> +}
>> +
>> static const ARMCPRegInfo cp_reginfo[] = {
>> /* Define the secure and non-secure FCSE identifier CP registers
>> *
Coverity complains that the GICR_IPRIORITYR case in gicv3_readl()
can overflow an array, because it doesn't know that the offsets
passed to that function must be word aligned. Add some assert()s
which hopefully tell Coverity that this isn't possible.
Signed-off-by: Peter Maydell
---
I don't have
On 11/07/16 08:51, Cédric Le Goater wrote:
>> Hmmm if that's the same 9.2.1 image we were using for last year's GSoC
>> then it has been working fine here? From what I've seen both 9.2.1 and
>> 9.2.2 now boot fine, but please test and report if that's not the case.
>
> Hello Mark,
>
> I managed
Coverity complains that the exit() in gicv3_class_name()
can be unreachable, because if TARGET_AARCH64 is defined
then all code paths return before reaching it. Move the
exit() up to the error_report() that it belongs with.
Signed-off-by: Peter Maydell
---
target-arm/machine.c | 3 +--
1 file ch
On 7 July 2016 at 14:04, Krzeminski, Marcin (Nokia - PL/Wroclaw)
wrote:
>
>
>> -Original Message-
>> From: Cédric Le Goater [mailto:c...@kaod.org]
>> On 07/06/2016 02:43 PM, marcin.krzemin...@nokia.com wrote:
>>
>> > break;
>> > case MAN_SPANSION:
>> > s->needed_byt
On 1 July 2016 at 14:02, Andrew Jones wrote:
> In some ways this v2 is more of an RFC then the initial posting, which
> had a different subject, and is here [*]. In this version we point out
> the real [current] goal, which is to get the guest MPIDR consistent
> with KVM. However, what's debatable
On 5 July 2016 at 13:24, Vijay Kilari wrote:
> On Sat, Jul 2, 2016 at 3:37 AM, Richard Henderson wrote:
>> Consider
>>
>> #define VECTYPEuint32x4_t
>> #define ALL_EQ(v1, v2) (vmaxvq_u32((v1) ^ (v2)) == 0)
>>
>>
>> which compiles down to
>>
>> 1c: 6e211c00eor v0.16b, v0.16b
On 07/11/2016 09:22 AM, Max Reitz wrote:
> iotest 157 pretends not to care about the image format used, but in fact
> it does due to the format name not being filtered in its output. This
> patch adds filtering and changes the reference output accordingly.
>
> Signed-off-by: Max Reitz
> ---
>
On 8 July 2016 at 21:38, Richard Henderson wrote:
> Synchronicity? Both changes look good to me.
>
> I took the opportunity to tidy up softmmu_template.h a tiny bit at
> the same time, to avoid too much increase in code size in cold code
> paths. The final is 4k smaller than the original.
>
>
>
On 8 July 2016 at 14:22, Dmitry Osipenko wrote:
> Software should see timer counter wraparound only after IRQ being triggered.
> This fixes regression introduced by the commit 5a50307 ("hw/ptimer: Perform
> counter wrap around if timer already expired"), resulting in monotonic timer
> jumping back
On 7 July 2016 at 17:15, Andrew Jones wrote:
> On Tue, Jul 05, 2016 at 07:23:14PM +0200, Laszlo Ersek wrote:
>> At the moment the following QEMU command line triggers an assertion
>> failure (minimal reproducer by Cole):
>>
>> qemu-system-aarch64 \
>> -machine virt-2.6,accel=tcg \
>> -no
* Igor Mammedov (imamm...@redhat.com) wrote:
> instance_id is generated by last_used_id + 1 for a given device type
> so for QEMU with 3 CPUs instance_id for APICs is a seti of [0, 1, 2]
> When CPU in the middle is hot-removed and migration started
> APICs with instance_ids 0 and 2 are transferred
On 8 July 2016 at 00:17, Laurent Vivier wrote:
> TARGET_NR_select can have three different implementations:
>
> 1- to always return -ENOSYS
>
> microblaze, ppc, ppc64
>
> -> TARGET_WANT_NI_OLD_SELECT
>
> 2- to take parameters from a structure pointed by arg1
> (kernel sys_old_sel
On 8 July 2016 at 20:47, Laurent Vivier wrote:
> NR_lookup_dcookie, NR_fadvise64, NR_fadvise64_64
>
> Signed-off-by: Laurent Vivier
> ---
> linux-user/sparc/syscall_nr.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/linux-user/sparc/syscall_nr.h b/linux-user/sparc/syscall_nr.h
> in
On 07/11/2016 03:07 AM, Peter Lieven wrote:
> the allocated stack will be adjusted to the minimum supported stack size
> by the OS and rounded up to be a multiple of the system pagesize.
> Additionally an architecture dependent guard page is added to the stack
> to catch stack overflows.
>
> Signe
Hello,
On 07/10/2016 01:38 AM, Peter Crosthwaite wrote:
> On Mon, Jul 4, 2016 at 10:57 AM, mar.krzeminski
> wrote:
>>
>>
>> W dniu 04.07.2016 o 14:18, Cédric Le Goater pisze:
>>>
>>> Some SPI controllers, such as the Aspeed AST2400, have a mode in which
>>> accesses to the flash content are no di
On 07/11/2016 02:07 AM, Peter Lieven wrote:
the allocated stack will be adjusted to the minimum supported stack size
by the OS and rounded up to be a multiple of the system pagesize.
Additionally an architecture dependent guard page is added to the stack
to catch stack overflows.
Signed-off-by:
On 11 July 2016 at 03:24, David Gibson wrote:
> On Sun, Jul 10, 2016 at 08:32:32PM +0100, Peter Maydell wrote:
>> On 8 July 2016 at 04:42, David Gibson wrote:
>> > My only concern here is that the constants are named
>> > *MMU*_DATA_... whereas these are physical memory accesses not
>> > involvin
On 07/11/2016 10:14 AM, Peter Maydell wrote:
>
> Format string warning on OSX, I'm afraid:
>
> /Users/pm215/src/qemu-for-merges/qemu-io-cmds.c:393:69: warning:
> format specifies type 'size_t' (aka 'unsigned long') but the argument
> has type 'unsigned long long' [-Wformat]
> printf(
On Sun, 10 Jul 2016 09:28:41 +0800
Zhou Jie wrote:
> Hi Alex,
>
> > The variable clearly isn't visible to the user, so the user can know
> > whether the kernel supports this feature, but not whether the feature
> > is currently active. Perhaps there's no way to avoid races completely,
> > but d
On 8 July 2016 at 18:21, Kevin Wolf wrote:
> The following changes since commit 4f4a9ca4a4386c137301b3662faba076455ff15a:
>
> Merge remote-tracking branch
> 'remotes/pmaydell/tags/pull-target-arm-20160707' into staging (2016-07-07
> 14:49:38 +0100)
>
> are available in the git repository at:
>
The shmat() handling needs to do target-specific handling
of the attach address for shmat():
* if the SHM_RND flag is passed, the address is rounded
down to a SHMLBA boundary
* if SHM_RND is not passed, then the call is failed EINVAL
if the address is not a multiple of SHMLBA
Since SHMLBA
* Eduardo Habkost (ehabk...@redhat.com) wrote:
> On Fri, Jul 08, 2016 at 04:01:39PM +0100, Dr. David Alan Gilbert (git) wrote:
> > From: "Dr. David Alan Gilbert"
> >
> > Add the host-phys-bits boolean property, if true, take phys-bits
> > from the hosts physical bits value, overriding either the
On 07/11/2016 05:42 PM, Leon Alrae wrote:
Hi,
This commit causes regressions in my MIPS tests. QEMU segfaults when
booting Linux on Malta board;
Hi Leon,
Is a good thing you caught it in the pull request, thanks!
Is a pity we don't have a way to run sanity tests on all archs (beyond make
che
On 7 July 2016 at 20:59, Eduardo Habkost wrote:
> The following changes since commit 4f4a9ca4a4386c137301b3662faba076455ff15a:
>
> Merge remote-tracking branch
> 'remotes/pmaydell/tags/pull-target-arm-20160707' into staging (2016-07-07
> 14:49:38 +0100)
>
> are available in the git repository
From: Marc-André Lureau
We would like to move back net_cleanup() at the end of main function,
like it used to be until f30dbae63a46f23116715dff8d130c, but minimum
tap cleanup is necessary regarless at exit() time. Use an exit notifier
to call TAP down_script. If net_cleanup() is called first, the
Hi,
This commit causes regressions in my MIPS tests. QEMU segfaults when
booting Linux on Malta board; this can be easily reproduced with
Aurelien's Debian images:
wget https://people.debian.org/~aurel32/qemu/mipsel/vmlinux-3.2.0-4-5kc-malta
wget
https://people.debian.org/~aurel32/qemu/mipsel/de
On Jul 11, 2016, at 3:04 AM, Mark Cave-Ayland wrote:
> On 10/07/16 23:14, Cédric Le Goater wrote:
>
>> Mark,
>>
>> For OS 9, do you plan to commit these openbios patches soon ?
>>
>> https://lists.nongnu.org/archive/html/qemu-devel/2015-11/msg02824.html
>>
>> as we just gave them a goo
On 11/07/16 17:03, Paolo Bonzini wrote:
>
> On 11/07/2016 15:06, Sergey Fedorov wrote:
>> On 08/07/16 23:52, Paolo Bonzini wrote:
>>> On 08/07/2016 22:24, Sergey Fedorov wrote:
I remember, I've just found that we discussed it in this thread:
http://thread.gmane.org/gmane.comp.emulato
1 - 100 of 220 matches
Mail list logo
