> -Original Messages-
> From: "Li, Liang Z"
> Sent Time: Friday, November 4, 2016
> To: "Chunguang Li"
> Cc: "Dr. David Alan Gilbert" , "Amit Shah"
> , "pbonz...@redhat.com" ,
> "qemu-devel@nongnu.org" , "stefa...@redhat.com"
> , "quint...@redhat.com"
> Subject: RE: RE: [Qemu-devel
On 2016年11月04日 03:49, Michael S. Tsirkin wrote:
On Thu, Nov 03, 2016 at 05:27:19PM +0800, Jason Wang wrote:
>This patches enable the Address Translation Service support for virtio
>pci devices. This is needed for a guest visible Device IOTLB
>implementation and will be required by vhost device
On 2016年11月04日 03:46, Michael S. Tsirkin wrote:
@@ -244,6 +245,7 @@ int virtio_queue_empty(VirtQueue *vq)
> static void virtqueue_unmap_sg(VirtQueue *vq, const VirtQueueElement *elem,
> unsigned int len)
> {
>+AddressSpace *dma_as = virtio_get_dma_as(vq->vd
On 2016年11月04日 01:03, Paolo Bonzini wrote:
On 03/11/2016 10:27, Jason Wang wrote:
This patch introduces a helper to query the iotlb entry for a
possible iova. This will be used by later device IOTLB API to enable
the capability for a dataplane (e.g vhost) to query the IOTLB.
Cc: Paolo Bonzin
On Fri, Nov 4, 2016 at 3:42 AM, Alexey Kardashevskiy wrote:
> On 03/11/16 19:55, Ladi Prosek wrote:
>> The function undoes the effect of virtqueue_pop and doesn't do anything
>> destructive or irreversible so virtqueue_unpop is a more fitting name.
>
> virtqueue_undo_pop() is even better, it was s
On 30/10/16 22:12, David Gibson wrote:
> Server-class POWER CPUs can be put into several compatibility modes. These
> can be specified on the command line, or negotiated by the guest during
> boot.
>
> Currently we don't migrate the compatibility mode, which means after a
> migration the guest wi
On 30/10/16 22:12, David Gibson wrote:
> When vmstate for the ppc cpu was introduced in a90db158 "target-ppc:
> Convert ppc cpu savevm to VMStateDescription", several "sanity check"
> fields were included, verifying that certain cpu parameters matched between
> source and destination.
>
> This tur
On 17/10/16 13:43, David Gibson wrote:
> On real hardware, and under pHyp, the PCI host bridges on Power machines
> typically advertise two outbound MMIO windows from the guest's physical
> memory space to PCI memory space:
> - A 32-bit window which maps onto 2GiB..4GiB in the PCI address space
>
> > > > > > > I think this is "very" wasteful. Assume the workload writes
> > > > > > > the pages
> > > dirty randomly within the guest address space, and the transfer
> > > speed is constant. Intuitively, I think nearly half of the dirty
> > > pages produced in Iteration 1 is not really dirty. Thi
On Fri, Nov 04, 2016 at 06:01:54AM +0200, Michael S. Tsirkin wrote:
> On Fri, Nov 04, 2016 at 11:50:19AM +0800, Xiao Guangrong wrote:
> >
> >
> > On 11/04/2016 02:36 AM, Xiao Guangrong wrote:
> > > Hi Michael,
> > >
> > > This patchset can replace the patches from [PULL 36/47] to [PULL 39/47]
>
On Fri, Nov 04, 2016 at 11:50:19AM +0800, Xiao Guangrong wrote:
>
>
> On 11/04/2016 02:36 AM, Xiao Guangrong wrote:
> > Hi Michael,
> >
> > This patchset can replace the patches from [PULL 36/47] to [PULL 39/47]
> > in your pull request:
> > [PULL 36/47] nvdimm acpi: prebuild nvdimm devices for
On 30/10/16 22:12, David Gibson wrote:
> Once a compatiblity mode is negotiated with the guest,
> h_client_architecture_support() uses run_on_cpu() to update each CPU to
> the new mode. We're going to want this logic somewhere else shortly,
> so make a helper function to do this global update.
>
On 11/04/2016 02:36 AM, Xiao Guangrong wrote:
Hi Michael,
This patchset can replace the patches from [PULL 36/47] to [PULL 39/47]
in your pull request:
[PULL 36/47] nvdimm acpi: prebuild nvdimm devices for available slots
[PULL 37/47] nvdimm acpi: introduce fit buffer
[PULL 38/47] nvdimm acpi:
On 31/10/16 19:39, David Gibson wrote:
> On Mon, Oct 31, 2016 at 04:55:42PM +1100, Alexey Kardashevskiy wrote:
>> On 30/10/16 22:12, David Gibson wrote:
>>> Current ppc_set_compat() will attempt to set any compatiblity mode
>>> specified, regardless of whether it's available on the CPU. The caller
On 30/10/16 22:11, David Gibson wrote:
> To continue consolidation of compatibility mode information, this rewrites
> the ppc_get_compat_smt_threads() function using the table of compatiblity
> modes in target-ppc/compat.c.
>
> It's not a direct replacement, the new ppc_compat_max_threads() functi
> -Original Messages-
> From: "Li, Liang Z"
> Sent Time: Thursday, November 3, 2016
> To: "Chunguang Li" , "Dr. David Alan Gilbert"
>
> Cc: "Amit Shah" , "pbonz...@redhat.com"
> , "qemu-devel@nongnu.org" ,
> "stefa...@redhat.com" , "quint...@redhat.com"
>
> Subject: RE: [Qemu-deve
On 11/03/2016 07:38 PM, Marcel Apfelbaum wrote:
On 11/03/2016 06:06 AM, Cao jin wrote:
[...]
diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index 52a4123..fada834 100644
--- a/hw/scsi/megasas.c
+++ b/hw/scsi/megasas.c
@@ -2360,9 +2360,12 @@ static void megasas_scsi_realize(PCIDevice
On 30/10/16 22:11, David Gibson wrote:
> This rewrites the ppc_set_compat() function so that instead of open coding
> the various compatibility modes, it reads the relevant data from a table.
> This is a first step in consolidating the information on compatibility
> modes scattered across the code
> -Original Message-
> From: Halil Pasic [mailto:pa...@linux.vnet.ibm.com]
> Sent: Thursday, November 03, 2016 1:35 AM
> Subject: Re: [Qemu-devel] [PATCH v9 00/12] virtio-crypto: introduce framework
> and device emulation
>
>
>
> On 10/31/2016 03:52 AM, Gonglei (Arei) wrote:
> >> > Unfo
On 03/11/16 19:55, Ladi Prosek wrote:
> The function undoes the effect of virtqueue_pop and doesn't do anything
> destructive or irreversible so virtqueue_unpop is a more fitting name.
virtqueue_undo_pop() is even better, it was suggested by native english
speaker (i.e. not myself) :)
>
> Sign
On 30/10/16 22:11, David Gibson wrote:
> The 'cpu_version' field in PowerPCCPU is badly named. It's named after the
> 'cpu-version' device tree property where it is advertised, but that meaning
> may not be obvious in most places it appears.
>
> Worse, it doesn't even really correspond to that de
The remote protocol can't handle flipping back and forth
between 32-bit and 64-bit regs. To compensate, pretend "as if"
on 64-bit cpu when in 32-bit mode.
Signed-off-by: Doug Evans
---
target-i386/gdbstub.c | 52
++-
1 file changed, 39 insertio
Hi.
It helps when reading the code to see how the number is arrived at.
Signed-off-by: Doug Evans
---
target-i386/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 14c5186..01f1ab0 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -
On 2016-11-03 15:07, Laurent Vivier wrote:
> Implement real atomic tas:
>
> When (Rn) = 0, 1 -> T
> Otherwise, 0 -> T
> In both cases, 1 -> MSB of (Rn)
>
> using atomic_fetch_or_i32() and setcondi_i32().
>
> Tested with image from:
> http://wiki.qemu.org/download/sh-test-0.2.tar.bz2
On Thu, 3 Nov 2016 22:23:09 +
Peter Maydell wrote:
> On 3 November 2016 at 17:30, Julian Brown
> wrote:
> > This patch improves support for semihosting and debugging with the
> > in-built gdbstub for ARM system-mode emulation in big-endian mode
> > (either BE8 or BE32), after the fairly rece
On Thu, 3 Nov 2016 23:14:05 +
Peter Maydell wrote:
> On 3 November 2016 at 17:30, Julian Brown
> wrote:
> > In BE32 mode, sub-word size watchpoints can fail to trigger because
> > the address of the access is adjusted in the opcode helpers before
> > being compared with the watchpoint regist
On 3 November 2016 at 17:30, Julian Brown wrote:
> In BE32 mode, sub-word size watchpoints can fail to trigger because the
> address of the access is adjusted in the opcode helpers before being
> compared with the watchpoint registers. This patch reversed the address
> adjustment before performin
On 3 November 2016 at 17:30, Julian Brown wrote:
> This patch improves support for semihosting and debugging with the
> in-built gdbstub for ARM system-mode emulation in big-endian mode (either
> BE8 or BE32), after the fairly recent changes to allow a single QEMU
> binary to deal with each of LE,
Hi,
Your series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Type: series
Subject: [Qemu-devel] [PATCH 0/5] ARM BE8/BE32 big-endian system-mode fixes
(semihosting, gdbstub)
Message-id: 1
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH 0/5] ARM BE8/BE32 big-endian system-mode fixes
(semihosting, gdbstub)
Message-id: 1478194258-75276-1-git-send-email-jul...@codesourcery.com
=== TEST SCRIPT
This appears to be a typo in arm_cpu_do_interrupt_aarch32 (OR'ing with ~CPSR_E
instead of CPSR_E).
Signed-off-by: Julian Brown
---
target-arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 25b15dc..b5b65ca 100644
--- a
On 11/03/2016 02:11 PM, Laurent Vivier wrote:
Le 03/11/2016 à 20:47, Richard Henderson a écrit :
On 11/02/2016 03:15 PM, Laurent Vivier wrote:
+if ((insn & 7) + 8 == i &&
+m68k_feature(s->env, M68K_FEATURE_EXT_FULL)) {
+/* M680
Changes since v1:
* writeback_mask initialized
* the two cmpm patches are squashed.
r~
Laurent Vivier (1):
target-m68k: add cmpm
Richard Henderson (2):
target-m68k: Delay autoinc writeback
target-m68k: Split gen_lea and gen_ea
target-m68k/translate.c | 208 +
Signed-off-by: Richard Henderson
---
target-m68k/translate.c | 84 +
1 file changed, 64 insertions(+), 20 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 9ad974f..25ceb2c 100644
--- a/target-m68k/translate.c
+++ b/
Provide gen_lea_mode and gen_ea_mode, where the mode can be
specified manually, rather than taken from the instruction.
Signed-off-by: Richard Henderson
---
target-m68k/translate.c | 112 +---
1 file changed, 59 insertions(+), 53 deletions(-)
diff --g
From: Laurent Vivier
Signed-off-by: Laurent Vivier
Reviewed-by: Richard Henderson
Message-Id: <1477604609-2206-2-git-send-email-laur...@vivier.eu>
Signed-off-by: Richard Henderson
---
target-m68k/translate.c | 16
1 file changed, 16 insertions(+)
diff --git a/target-m68k/tra
On 11/02/2016 03:15 PM, Laurent Vivier wrote:
+for (i = 15; i >= 0; i--, mask >>= 1) {
+if (mask & 1) {
+if ((insn & 7) + 8 == i &&
+m68k_feature(s->env, M68K_FEATURE_EXT_FULL)) {
+/* M68020+: if the a
In BE32 mode, sub-word size watchpoints can fail to trigger because the
address of the access is adjusted in the opcode helpers before being
compared with the watchpoint registers. This patch reversed the address
adjustment before performing the comparison.
Signed-off-by: Julian Brown
---
exec.
Thumb-1 code has some issues in BE32 mode (as currently implemented). In
short, since bytes are swapped within words at load time for BE32
executables, this also swaps pairs of adjacent Thumb-1 instructions.
This patch un-swaps those pairs of instructions again, both for execution,
and for disasse
This patch fixes the arm_semi_flen_cb callback so that it doesn't return
a byte-swapped size in BE32 system mode.
Signed-off-by: Julian Brown
---
target-arm/arm-semi.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/target-arm/arm-semi.c b/target-arm/arm-semi.c
index a9cf5f2..6c5
This patch series contains a few fixes for ARM big-endian system mode
that appear beneficial for our use case of running bare-metal code with
semihosting (for toolchain testing), and running code via the built-in
gdbstub (for debugger testing). The patches are mostly relevant to BE32
mode, but cont
This patch improves support for semihosting and debugging with the
in-built gdbstub for ARM system-mode emulation in big-endian mode (either
BE8 or BE32), after the fairly recent changes to allow a single QEMU
binary to deal with each of LE, BE8 and BE32 modes in one. It's only
currently good for l
Le 03/11/2016 à 20:47, Richard Henderson a écrit :
> On 11/02/2016 03:15 PM, Laurent Vivier wrote:
>> +if ((insn & 7) + 8 == i &&
>> +m68k_feature(s->env, M68K_FEATURE_EXT_FULL)) {
>> +/* M68020+: if the addressing register is the
Lin Ma writes:
> Signed-off-by: Lin Ma
> ---
> backends/hostmem.c | 4
> crypto/secret.c| 4
> crypto/tlscreds.c | 4
> net/filter.c | 4
> 4 files changed, 16 insertions(+)
>
> diff --git a/backends/hostmem.c b/backends/hostmem.c
> index 4256d24..25f303d 100644
>
Lin Ma writes:
> '-object help' prints available user creatable backends.
> '-object $typename,help' prints relevant properties.
>
> Signed-off-by: Lin Ma
> ---
> include/qom/object_interfaces.h | 2 ++
> qemu-options.hx | 7 +-
> qom/object_interfaces.c | 55
> ++
On Thu, Nov 03, 2016 at 05:27:19PM +0800, Jason Wang wrote:
> This patches enable the Address Translation Service support for virtio
> pci devices. This is needed for a guest visible Device IOTLB
> implementation and will be required by vhost device IOTLB API
> implementation for intel IOMMU.
>
>
On 11/02/2016 03:15 PM, Laurent Vivier wrote:
+if ((insn & 7) + 8 == i &&
+m68k_feature(s->env, M68K_FEATURE_EXT_FULL)) {
+/* M68020+: if the addressing register is the
+ * register moved to memory, the va
On Thu, Nov 03, 2016 at 05:27:14PM +0800, Jason Wang wrote:
> Currently, all virtio devices bypass IOMMU completely. This is because
> address_space_memory is assumed and used during DMA emulation. This
> patch converts the virtio core API to use DMA API. This idea is
>
> - introducing a new trans
On Thu, Nov 03, 2016 at 01:05:44PM +0200, Marcel Apfelbaum wrote:
> On 11/03/2016 06:18 AM, Michael S. Tsirkin wrote:
> > On Wed, Nov 02, 2016 at 05:16:42PM +0200, Marcel Apfelbaum wrote:
> > > The shpc component is optional while ACPI hotplug is used
> > > for hot-plugging PCI devices into a PCI-
On 11/03/2016 12:03 PM, Laurent Vivier wrote:
CC_OP_CMPW for cas2w.
It was working because I have used helper_be_ldsw_mmu() to load values,
is it better to use helper_be_lduw_mmu with CC_OP_CMPW?
IIRC, one needs the extra sign-extension here:
case CC_OP_CMPB:
Lin Ma writes:
> Automatically generate enum value strings that containing the acceptable
> values.
> (Borrowed Daniel's code.)
>
> Signed-off-by: Lin Ma
> ---
> scripts/qapi-types.py | 2 ++
> scripts/qapi.py | 9 +
> 2 files changed, 11 insertions(+)
>
> diff --git a/scripts/qa
On Thu, Nov 03, 2016 at 05:54:19PM +0100, Markus Armbruster wrote:
> Radim Krčmář writes:
>
> > This series performs a simple replacement of
> > object_new(object_class_get_name(class)) by object_new_with_class(class)
> > in the spirit of existing object_new_with_type().
>
> Who's going to take
On 11/03/2016 11:52 AM, Paolo Bonzini wrote:
UP kernel = no sane way to implement this in user-mode qemu?
Probably no straight-forward way, no.
Another possibility is to treat the load as a LL and the store as a SC
(implemented in turn with cmpxchg+branch if it fails). cmpxchg spans
two basi
On Thu, Nov 03, 2016 at 06:43:05PM +0200, Marcel Apfelbaum wrote:
> On 11/03/2016 05:24 PM, Laine Stump wrote:
> > On 11/03/2016 07:08 AM, Marcel Apfelbaum wrote:
> > > On 11/02/2016 06:01 PM, Laine Stump wrote:
> > > > On 11/02/2016 11:16 AM, Marcel Apfelbaum wrote:
> > > > > The shpc component is
_FIT is required for hotplug support, guest will inquire the
updated device info from it if a hotplug event is received
As FIT buffer is not completely mapped into guest address space,
Read_FIT method is introduced to read NFIT structures blob from
QEMU, The buffer is concatenated before _FIT retu
For each NVDIMM present or intended to be supported by platform,
platform firmware also exposes an ACPI Namespace Device under
the root device
So it builds nvdimm devices for all slots to support vNVDIMM hotplug
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Xiao Guangrong
---
hw/acpi/nvdimm.c
_GPE.E04 is dedicated for nvdimm device hotplug
Signed-off-by: Xiao Guangrong
---
default-configs/mips-softmmu-common.mak | 1 +
docs/specs/acpi_nvdimm.txt | 5 +
hw/acpi/ich9.c | 8 ++--
hw/acpi/nvdimm.c| 7 +++
hw/acpi/p
The buffer is used to save the FIT info for all the presented nvdimm
devices which is updated after the nvdimm device is plugged or
unplugged. In the later patch, it will be used to construct NVDIMM
ACPI _FIT method which reflects the presented nvdimm devices after
nvdimm hotplug
As FIT buffer can
and use these codes to refine the code
Signed-off-by: Xiao Guangrong
---
hw/acpi/nvdimm.c | 30 ++
1 file changed, 18 insertions(+), 12 deletions(-)
diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c
index 73db3a7..d9d1ef7 100644
--- a/hw/acpi/nvdimm.c
+++ b/hw/acpi/nv
Hi Michael,
This patchset can replace the patches from [PULL 36/47] to [PULL 39/47]
in your pull request:
[PULL 36/47] nvdimm acpi: prebuild nvdimm devices for available slots
[PULL 37/47] nvdimm acpi: introduce fit buffer
[PULL 38/47] nvdimm acpi: introduce _FIT
[PULL 39/47] pc: memhp: enable nvd
On 11/03/2016 07:40 PM, Jianjun Duan wrote:
>
>
> On 11/03/2016 10:17 AM, Halil Pasic wrote:
>>
>>
>> On 11/03/2016 05:47 PM, Jianjun Duan wrote:
>>>
>>> On 11/03/2016 05:22 AM, Halil Pasic wrote:
>
>
> On 11/02/2016 11:47 AM, Juan Quintela wrote:
>>> Jianjun Duan wrote:
>>
On 11/03/2016 10:17 AM, Halil Pasic wrote:
>
>
> On 11/03/2016 05:47 PM, Jianjun Duan wrote:
>>
>> On 11/03/2016 05:22 AM, Halil Pasic wrote:
On 11/02/2016 11:47 AM, Juan Quintela wrote:
>> Jianjun Duan wrote:
Add a test for QTAILQ migration to tests/test-vmstate.c.
Lin Ma writes:
> Signed-off-by: Lin Ma
> ---
> qom/object.c | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/qom/object.c b/qom/object.c
> index 7a05e35..4096645 100644
> --- a/qom/object.c
> +++ b/qom/object.c
> @@ -747,7 +747,11 @@ ObjectClass *object_get_class(Ob
Le 03/11/2016 à 17:36, Richard Henderson a écrit :
> On 11/02/2016 03:15 PM, Laurent Vivier wrote:
>> +if (c1 != l1) {
>> +env->cc_n = l1;
>> +env->cc_v = c1;
>> +} else {
>> +env->cc_n = l2;
>> +env->cc_v = c2;
>> +}
>> +env->cc_op = CC_OP_CMPL;
>> +
On Fri, 4 Nov 2016 01:39:31 +0800
Xiao Guangrong wrote:
>
>
> On 11/04/2016 01:29 AM, Igor Mammedov wrote:
> > On Fri, 4 Nov 2016 00:53:06 +0800
> > Xiao Guangrong wrote:
> >
> >>
> >>
> >> On 11/04/2016 12:49 AM, Igor Mammedov wrote:
> >>> On Fri, 4 Nov 2016 00:17:00 +0800
> >>> Xiao Guangron
On 03/11/2016 17:51, Richard Henderson wrote:
>>> Well, tas_test "runs without error with this change", I suppose it fails
>>> before? In other words, is this patch enough to run multithreaded sh4
>>> programs with qemu-user?
>>
>> It should,:the problem was reported by Adrian (cc:) while compil
On 11/03/2016 11:42 AM, Markus Armbruster wrote:
> Eric Blake writes:
>
>> Add a test that proves (at least when run under valgrind) that
>> we are correctly handling allocated memory even when a visit
>> is aborted in the middle for whatever other reason.
>>
>> See commit f24582d "qapi: fix doub
On 11/04/2016 01:29 AM, Igor Mammedov wrote:
On Fri, 4 Nov 2016 00:53:06 +0800
Xiao Guangrong wrote:
On 11/04/2016 12:49 AM, Igor Mammedov wrote:
On Fri, 4 Nov 2016 00:17:00 +0800
Xiao Guangrong wrote:
On 11/04/2016 12:13 AM, Igor Mammedov wrote:
On Thu, 3 Nov 2016 22:53:43 +0800
Xi
On Fri, 4 Nov 2016 00:53:06 +0800
Xiao Guangrong wrote:
>
>
> On 11/04/2016 12:49 AM, Igor Mammedov wrote:
> > On Fri, 4 Nov 2016 00:17:00 +0800
> > Xiao Guangrong wrote:
> >
> >>
> >>
> >> On 11/04/2016 12:13 AM, Igor Mammedov wrote:
> >>> On Thu, 3 Nov 2016 22:53:43 +0800
> >>> Xiao Guangron
On 11/03/2016 05:47 PM, Jianjun Duan wrote:
>
> On 11/03/2016 05:22 AM, Halil Pasic wrote:
>> >
>> >
>> > On 11/02/2016 11:47 AM, Juan Quintela wrote:
>>> >> Jianjun Duan wrote:
>>> Add a test for QTAILQ migration to tests/test-vmstate.c.
>>>
>>> Signed-off-by: Jianjun Duan
>>
On Sun, Oct 30, 2016 at 11:23:18PM +0200, Michael S. Tsirkin wrote:
> The following changes since commit 5b2ecabaeabc17f032197246c4846b9ba95ba8a6:
>
> Merge remote-tracking branch 'remotes/kraxel/tags/pull-ui-20161028-1' into
> staging (2016-10-28 17:59:04 +0100)
>
> are available in the git r
On 03/11/2016 10:27, Jason Wang wrote:
> This patch introduces a helper to query the iotlb entry for a
> possible iova. This will be used by later device IOTLB API to enable
> the capability for a dataplane (e.g vhost) to query the IOTLB.
>
> Cc: Paolo Bonzini
> Cc: Peter Crosthwaite
> Cc: Ric
On 11/04/2016 12:49 AM, Igor Mammedov wrote:
On Fri, 4 Nov 2016 00:17:00 +0800
Xiao Guangrong wrote:
On 11/04/2016 12:13 AM, Igor Mammedov wrote:
On Thu, 3 Nov 2016 22:53:43 +0800
Xiao Guangrong wrote:
On 11/03/2016 10:49 PM, Igor Mammedov wrote:
On Thu, 3 Nov 2016 21:02:22 +0800
Xi
This commit adds necessary conversion of argument passed to inotify_init1().
inotify_init1() flags can be IN_NONBLOCK and IN_CLOEXEC which rely on O_NONBLOCK
and O_CLOEXEC and those can have different values on different platforms.
Signed-off-by: Lena Djokic
---
linux-user/syscall.c | 3 ++-
1 f
Radim Krčmář writes:
> This series performs a simple replacement of
> object_new(object_class_get_name(class)) by object_new_with_class(class)
> in the spirit of existing object_new_with_type().
Who's going to take this one? Still more review needed?
On Wed, Nov 02, 2016 at 09:32:21AM +0100, Paolo Bonzini wrote:
> The following changes since commit 39542105bbb19c690219d2f22844d8dfbd9bba05:
>
> Merge remote-tracking branch 'remotes/gkurz/tags/for-upstream' into staging
> (2016-11-01 12:48:07 +)
>
> are available in the git repository at
On 03/11/2016 10:27, Jason Wang wrote:
> Signed-off-by: Jason Wang
> ---
> include/exec/memory.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/include/exec/memory.h b/include/exec/memory.h
> index e605de3..ab37499 100644
> --- a/include/exec/memory.h
> +++ b/include/exec/memory.h
On 03/11/2016 10:27, Jason Wang wrote:
> Cc: Paolo Bonzini
> Signed-off-by: Jason Wang
> ---
> memory.c | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/memory.c b/memory.c
> index 33110e9..2bfc37f 100644
> --- a/memory.c
> +++ b/memory.c
> @@ -1603,6 +1603,11 @@ static void
Le 03/11/2016 à 17:21, Laurent Vivier a écrit :
> Le 03/11/2016 à 17:18, Paolo Bonzini a écrit :
>>
>>
>> On 03/11/2016 16:35, Laurent Vivier wrote:
>>> Le 03/11/2016 à 16:32, Paolo Bonzini a écrit :
On 03/11/2016 15:07, Laurent Vivier wrote:
> Implement real atomic tas:
>
>>
Eduardo Habkost writes:
> A few fixes on check-qom-proplist that will ensure we test both
> class properties and object properties, and catch errors when
> registering properties in test code.
Series
Reviewed-by: Markus Armbruster
Excessively long delay considering how simple these patches are
On 11/03/2016 10:21 AM, Laurent Vivier wrote:
Le 03/11/2016 à 17:18, Paolo Bonzini a écrit :
Well, tas_test "runs without error with this change", I suppose it fails
before? In other words, is this patch enough to run multithreaded sh4
programs with qemu-user?
It should,:the problem was repor
On Fri, 4 Nov 2016 00:17:00 +0800
Xiao Guangrong wrote:
>
>
> On 11/04/2016 12:13 AM, Igor Mammedov wrote:
> > On Thu, 3 Nov 2016 22:53:43 +0800
> > Xiao Guangrong wrote:
> >
> >>
> >>
> >> On 11/03/2016 10:49 PM, Igor Mammedov wrote:
> >>> On Thu, 3 Nov 2016 21:02:22 +0800
> >>> Xiao Guangron
On 11/03/2016 05:22 AM, Halil Pasic wrote:
>
>
> On 11/02/2016 11:47 AM, Juan Quintela wrote:
>> Jianjun Duan wrote:
>>> Add a test for QTAILQ migration to tests/test-vmstate.c.
>>>
>>> Signed-off-by: Jianjun Duan
>>
>> Reviewed-by: Juan Quintela
>>
>
> Empty QTAILQ seems to be broken. Have
On 11/02/2016 03:15 PM, Laurent Vivier wrote:
+if (c1 != l1) {
+env->cc_n = l1;
+env->cc_v = c1;
+} else {
+env->cc_n = l2;
+env->cc_v = c2;
+}
+env->cc_op = CC_OP_CMPL;
+env->dregs[Dc1] = deposit32(env->dregs[Dc1], 0, 16, l1);
+env->dregs[D
On 11/03/2016 05:24 PM, Laine Stump wrote:
On 11/03/2016 07:08 AM, Marcel Apfelbaum wrote:
On 11/02/2016 06:01 PM, Laine Stump wrote:
On 11/02/2016 11:16 AM, Marcel Apfelbaum wrote:
The shpc component is optional while ACPI hotplug is used
for hot-plugging PCI devices into a PCI-PCI bridge.
D
Eric Blake writes:
> Add a test that proves (at least when run under valgrind) that
> we are correctly handling allocated memory even when a visit
> is aborted in the middle for whatever other reason.
>
> See commit f24582d "qapi: fix double free in
> qmp_output_visitor_cleanup()" for a fix that
Hi
On Thu, Nov 3, 2016 at 5:46 PM Markus Armbruster wrote:
> Marc-André Lureau writes:
>
> > If we want to have a very strict grammar, there is even more work needed
> to
> > cleanup the documentation. I don't fancy doing that work, it gives only
> low
> > benefits.
>
> Since I have pretty spec
On 11/04/2016 12:13 AM, Igor Mammedov wrote:
On Thu, 3 Nov 2016 22:53:43 +0800
Xiao Guangrong wrote:
On 11/03/2016 10:49 PM, Igor Mammedov wrote:
On Thu, 3 Nov 2016 21:02:22 +0800
Xiao Guangrong wrote:
On 11/03/2016 09:00 PM, Igor Mammedov wrote:
just drop this and describe prop
Le 03/11/2016 à 17:18, Paolo Bonzini a écrit :
>
>
> On 03/11/2016 16:35, Laurent Vivier wrote:
>> Le 03/11/2016 à 16:32, Paolo Bonzini a écrit :
>>>
>>>
>>> On 03/11/2016 15:07, Laurent Vivier wrote:
Implement real atomic tas:
When (Rn) = 0, 1 -> T
Otherwise, 0 -> T
>
On 11/02/2016 03:15 PM, Laurent Vivier wrote:
680x0 movem can load/store words and long words
and can use more addressing modes.
Coldfire can only use long words with (Ax) and (d16,Ax)
addressing modes.
Signed-off-by: Laurent Vivier
---
target-m68k/translate.c | 96
On 03/11/2016 16:35, Laurent Vivier wrote:
> Le 03/11/2016 à 16:32, Paolo Bonzini a écrit :
>>
>>
>> On 03/11/2016 15:07, Laurent Vivier wrote:
>>> Implement real atomic tas:
>>>
>>> When (Rn) = 0, 1 -> T
>>> Otherwise, 0 -> T
>>> In both cases, 1 -> MSB of (Rn)
>>>
>>> using atomic_f
On 11/02/2016 03:15 PM, Laurent Vivier wrote:
+static void bcd_sub(TCGv dest, TCGv src)
+{
+TCGv t0, t1, t2;
+
+/* dest10 = dest10 - src10 - X
+ * = bcd_add(dest + 1 - X, 0xf99 - src)
+ */
+
+/* t0 = 0xfff - src */
+
+t0 = tcg_temp_new();
+tcg_gen_neg_i32(t0,
On Thu, 3 Nov 2016 22:53:43 +0800
Xiao Guangrong wrote:
>
>
> On 11/03/2016 10:49 PM, Igor Mammedov wrote:
> > On Thu, 3 Nov 2016 21:02:22 +0800
> > Xiao Guangrong wrote:
> >
> >>
> >>
> >> On 11/03/2016 09:00 PM, Igor Mammedov wrote:
> >>
> >>
> >>
> >>
> > just drop this and describe pro
On Wed, Nov 02, 2016 at 06:26:20PM +0100, Laurent Vivier wrote:
> Le 02/11/2016 à 18:23, Stefan Hajnoczi a écrit :
> > On Wed, Nov 2, 2016 at 5:17 PM, Stefan Hajnoczi wrote:
> >> On Wed, Nov 2, 2016 at 5:12 PM, Laurent Vivier wrote:
> >>> Le 02/11/2016 à 18:07, Stefan Hajnoczi a écrit :
> On
On 03/11/2016 15:07, Laurent Vivier wrote:
> Implement real atomic tas:
>
> When (Rn) = 0, 1 -> T
> Otherwise, 0 -> T
> In both cases, 1 -> MSB of (Rn)
>
> using atomic_fetch_or_i32() and setcondi_i32().
>
> Tested with image from:
> http://wiki.qemu.org/download/sh-test-0.2.tar.bz
Le 03/11/2016 à 16:32, Paolo Bonzini a écrit :
>
>
> On 03/11/2016 15:07, Laurent Vivier wrote:
>> Implement real atomic tas:
>>
>> When (Rn) = 0, 1 -> T
>> Otherwise, 0 -> T
>> In both cases, 1 -> MSB of (Rn)
>>
>> using atomic_fetch_or_i32() and setcondi_i32().
>>
>> Tested with ima
On 2016-11-03 09:04, Andrew Jones wrote:
On Thu, Nov 03, 2016 at 08:29:57AM -0600, c...@codeaurora.org wrote:
On 2016-11-03 04:14, Andrew Jones wrote:
> On Wed, Nov 02, 2016 at 05:22:15PM -0500, Wei Huang wrote:
>
> Missing
> From: Christopher Covington
>
>
> > Beginning with a simple sanity c
On 11/03/2016 07:08 AM, Marcel Apfelbaum wrote:
On 11/02/2016 06:01 PM, Laine Stump wrote:
On 11/02/2016 11:16 AM, Marcel Apfelbaum wrote:
The shpc component is optional while ACPI hotplug is used
for hot-plugging PCI devices into a PCI-PCI bridge.
Disabling the shpc by default will make slot
On Thu, Nov 03, 2016 at 08:29:57AM -0600, c...@codeaurora.org wrote:
> On 2016-11-03 04:14, Andrew Jones wrote:
> > On Wed, Nov 02, 2016 at 05:22:15PM -0500, Wei Huang wrote:
> >
> > Missing
> > From: Christopher Covington
> >
> >
> > > Beginning with a simple sanity check of the control regis
Hi Peter,
On 10/04/2016 01:22 PM, Maxime Coquelin wrote:
This python script calls 'query-cpus' QMP command to retrieve
vCPUs thread IDs.
Thread IDs are then used by taskset to pin vCPUs to physical
CPUs passed in command line.
In case more vCPUs are present than the number of CPUs assigned
in c
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