On Tue, Nov 08, 2016 at 12:17:14PM -0600, Wei Huang wrote:
> From: Christopher Covington
>
> Ensure that reads of the PMCCNTR_EL0 are monotonically increasing,
> even for the smallest delta of two subsequent reads.
>
> Signed-off-by: Christopher Covington
> Signed-off-by: Wei Huang
> ---
> ar
On Tue, Nov 08, 2016 at 12:17:13PM -0600, Wei Huang wrote:
> From: Christopher Covington
>
> Beginning with a simple sanity check of the control register, add
> a unit test for the ARM Performance Monitors Unit (PMU).
>
> Signed-off-by: Christopher Covington
> Signed-off-by: Wei Huang
> ---
>
On 11/10/2016 11:51 PM, Laurent Vivier wrote:
+/* Result of rotate_x() is valid if 0 < shift < (size + 1) < 32 */
+static TCGv rotate_x(TCGv dest, TCGv src, TCGv shift, int left, int size)
+{
+TCGv X, shl, shr, shx;
+
+shr = tcg_temp_new();
+shl = tcg_temp_new();
+shx = tcg_temp_n
On 11/10/2016 05:14 PM, Michael S. Tsirkin wrote:
> From: Cao jin
>
> Commit afea4e14 seems forgetting to undo the overwrites, which is
> unsuitable.
>
> CC: Hannes Reinecke
> CC: Paolo Bonzini
> CC: Markus Armbruster
> CC: Marcel Apfelbaum
> CC: Michael S. Tsirkin
>
> Reviewed-by: Markus
On 11/10/2016 05:14 PM, Michael S. Tsirkin wrote:
> From: Cao jin
>
> Also move certain hunk above, to place msix init related code together.
>
> CC: Hannes Reinecke
> CC: Paolo Bonzini
> CC: Markus Armbruster
> CC: Marcel Apfelbaum
> CC: Michael S. Tsirkin
>
> Reviewed-by: Markus Armbrust
On 11/10/2016 05:14 PM, Michael S. Tsirkin wrote:
> From: Cao jin
>
> Resolve the TODO, msix=auto means msix on; if user specify msix=on,
> then device creation fail on msix_init failure.
> Also undo the overwrites of user configuration of msix.
>
> CC: Michael S. Tsirkin
> CC: Hannes Reinecke
On 11/10/2016 05:14 PM, Michael S. Tsirkin wrote:
> From: Cao jin
>
> msix_init() reports errors with error_report(), which is wrong when
> it's used in realize(). The same issue was fixed for msi_init() in
> commit 1108b2f.
>
> For some devices(like e1000e, vmxnet3) who won't fail because of
>
Am 09.11.2016 um 07:34 schrieb Dennis Luehring:
im using cross-linux-from-scratch manual/script for building the non-x86_64
platforms
fyi
after using the crosscompilers from the gcc-5-crossports packages
(http://packages.ubuntu.com/source/xenial/gcc-5-cross-ports)
alpha-linux-gnu-gcc-5
spa
I was wondering if there is a list somewhere of all the ARM boards
QEMU supports. I want to add a section to the ARM wiki page that
lists at least a few of them.
http://fossboss.com/2016/08/13/use-qemu-test-operating-systems-
distributions/
On this page I found a huge list of QEMU emulators. I haven't heard
of most of them, but some of them are not on the platforms page. Do
you think we should add the missing ones?
qemu-system-aarch64
qemu-system-a
On 2016年11月11日 11:49, Michael S. Tsirkin wrote:
On Fri, Nov 11, 2016 at 11:26:12AM +0800, Jason Wang wrote:
>
>
>On 2016年11月11日 01:32, Michael S. Tsirkin wrote:
> >On Fri, Nov 04, 2016 at 02:48:20PM +0800, Jason Wang wrote:
> > >
> > >On 2016年11月04日 03:49, Michael S. Tsirkin wrote:
> > > >O
On 2016年11月11日 11:39, Michael S. Tsirkin wrote:
On Fri, Nov 11, 2016 at 10:32:42AM +0800, Jason Wang wrote:
On 2016年11月10日 06:00, Michael S. Tsirkin wrote:
On Wed, Nov 09, 2016 at 03:28:02PM +0800, Jason Wang wrote:
On 2016年11月08日 19:04, Aviv B.D wrote:
From: "Aviv Ben-David"
This capabi
On Fri, 21 Oct 2016 22:48:10 +0200
Paolo Bonzini wrote:
> Override start_ioeventfd and stop_ioeventfd to start/stop the
> whole dataplane logic. This has some positive side effects:
>
> - no need anymore for virtio_add_queue_aio (i.e. a revert of
> commit 1c627137c10ee2dcf59e0383ade8a9abfa2d4
On 11/08/2016 05:03 AM, Peter Lieven wrote:
> Am 25.10.2016 um 18:12 schrieb Eric Blake:
>> On 10/25/2016 09:36 AM, Paolo Bonzini wrote:
>>>
>>> On 25/10/2016 16:35, Eric Blake wrote:
So your argument is that we should always pass down every unaligned
less-than-optimum discard request all
On Fri, Nov 11, 2016 at 11:26:12AM +0800, Jason Wang wrote:
>
>
> On 2016年11月11日 01:32, Michael S. Tsirkin wrote:
> > On Fri, Nov 04, 2016 at 02:48:20PM +0800, Jason Wang wrote:
> > >
> > > On 2016年11月04日 03:49, Michael S. Tsirkin wrote:
> > > > On Thu, Nov 03, 2016 at 05:27:19PM +0800, Jason Wa
On Fri, Nov 11, 2016 at 11:51:34AM +0800, Cao jin wrote:
>
>
> On 11/11/2016 11:32 AM, Michael S. Tsirkin wrote:
> > On Fri, Nov 11, 2016 at 10:46:29AM +0800, Cao jin wrote:
> > >
> > >
> > > On 11/11/2016 06:51 AM, Michael S. Tsirkin wrote:
> > > > On Thu, Nov 10, 2016 at 03:48:28PM -0700, Ale
On 11/11/2016 11:32 AM, Michael S. Tsirkin wrote:
On Fri, Nov 11, 2016 at 10:46:29AM +0800, Cao jin wrote:
On 11/11/2016 06:51 AM, Michael S. Tsirkin wrote:
On Thu, Nov 10, 2016 at 03:48:28PM -0700, Alex Williamson wrote:
I think I'll drop this, this patchset was borderline useful any
On Fri, Nov 11, 2016 at 10:32:42AM +0800, Jason Wang wrote:
>
>
> On 2016年11月10日 06:00, Michael S. Tsirkin wrote:
> > On Wed, Nov 09, 2016 at 03:28:02PM +0800, Jason Wang wrote:
> > > >
> > > >
> > > >On 2016年11月08日 19:04, Aviv B.D wrote:
> > > > > >From: "Aviv Ben-David"
> > > > > >
> > > > > >T
On Fri, Nov 11, 2016 at 10:46:29AM +0800, Cao jin wrote:
>
>
> On 11/11/2016 06:51 AM, Michael S. Tsirkin wrote:
> > On Thu, Nov 10, 2016 at 03:48:28PM -0700, Alex Williamson wrote:
>
> > > > > So I merge this tag to try to resolve it, now I get qemu segfaulting
> > > > > bisected to:
> > > > >
On 2016年11月11日 01:32, Michael S. Tsirkin wrote:
On Fri, Nov 04, 2016 at 02:48:20PM +0800, Jason Wang wrote:
On 2016年11月04日 03:49, Michael S. Tsirkin wrote:
On Thu, Nov 03, 2016 at 05:27:19PM +0800, Jason Wang wrote:
This patches enable the Address Translation Service support for virtio
pci
Signed-off-by: Cao jin
---
hw/pci/pcie.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index 99cfb45..39b10b8 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -656,7 +656,7 @@ static void pcie_ext_cap_set_next(PCIDevice *dev, uint16_t
pos, uin
Signed-off-by: Cao jin
---
hw/vfio/pci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 31aaecb..c94987c 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -1881,8 +1881,8 @@ static void vfio_add_ext_cap(VFIOPCIDevice *vdev)
* 0 is
On 11/11/2016 06:51 AM, Michael S. Tsirkin wrote:
On Thu, Nov 10, 2016 at 03:48:28PM -0700, Alex Williamson wrote:
So I merge this tag to try to resolve it, now I get qemu segfaulting
bisected to:
commit a6d8372bc6764ee279b473d13ff4ecc8acb7a978
Author: Cao jin
Date: Sat Nov 5 10:07:21 20
On 11/10/2016 11:19 AM, Kevin Wolf wrote:
> This enables byte granularity requests on quorum nodes.
>
> Note that the QMP events emitted by the driver are an external API that
> we were careless enough to define as sector based. The offset and length
> of requests reported in events are rounded do
On 2016年11月10日 06:00, Michael S. Tsirkin wrote:
On Wed, Nov 09, 2016 at 03:28:02PM +0800, Jason Wang wrote:
>
>
>On 2016年11月08日 19:04, Aviv B.D wrote:
> >From: "Aviv Ben-David"
> >
> >This capability asks the guest to invalidate cache before each map operation.
> >We can use this invalidation
On 11/10/2016 11:19 AM, Kevin Wolf wrote:
> Replacing it with bdrv_co_pwritev() prepares us for byte granularity
> requests and gets us rid of the last bdrv_aio_*() user in quorum.
>
> Signed-off-by: Kevin Wolf
> ---
> block/quorum.c | 52 +---
> 1
On 11/10/2016 11:19 AM, Kevin Wolf wrote:
> Instead of calling quorum_aio_finalize() deeply nested in what used
> to be an AIO callback, do it in the same functions that allocated the
> AIOCB.
>
> Signed-off-by: Kevin Wolf
> ---
> block/quorum.c | 15 +--
> 1 file changed, 9 insertio
On 11/10/2016 11:19 AM, Kevin Wolf wrote:
> Signed-off-by: Kevin Wolf
> ---
> block/quorum.c | 194
> ++---
> 1 file changed, 117 insertions(+), 77 deletions(-)
>
> +
> +static void read_quorum_children_entry(void *opaque)
> +{
> +Quorum
On Fri, 11 Nov 2016 09:37:58 +0800
Cao jin wrote:
> Signed-off-by: Cao jin
> ---
> hw/pci/pcie.c | 2 +-
> hw/vfio/pci.c | 4 ++--
> 2 files changed, 3 insertions(+), 3 deletions(-)
Send separate patches. Thanks,
Alex
>
> diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
> index 99cfb45..39b10b8
> From: virtio-...@lists.oasis-open.org [mailto:virtio-...@lists.oasis-open.org]
> On Behalf Of Michael S. Tsirkin
> Subject: Re: [virtio-dev] Re: [PATCH v12 0/2] virtio-crypto: virtio crypto
> device
> specification
>
> On Sat, Nov 05, 2016 at 09:15:58AM +, Gonglei (Arei) wrote:
> > >
> > >
Signed-off-by: Cao jin
---
hw/pci/pcie.c | 2 +-
hw/vfio/pci.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index 99cfb45..39b10b8 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -656,7 +656,7 @@ static void pcie_ext_cap_set_next(PCIDevi
Hi Halil,
>
> > On Thu, Nov 10, 2016 at 09:37:40AM +, Gonglei (Arei) wrote:
> >> > Hi,
> >> >
> >> > I attach a diff for next version in order to review more convenient, with
> >> >
> >> > - Drop the all gap stuff;
> >> > - Drop all structures undefined in virtio_crypto.h
> >> > - re-descr
Hi guys,
> From: virtio-...@lists.oasis-open.org [mailto:virtio-...@lists.oasis-open.org]
> On Behalf Of Michael S. Tsirkin
> Sent: Friday, November 11, 2016 1:04 AM
> Subject: [virtio-dev] Re: [Qemu-devel] [PATCH v13 1/2] virtio-crypto: Add
> virtio
> crypto device specification
>
> On Thu, Nov
On Thu, Nov 10, 2016 at 10:06:37AM +0100, Thomas Huth wrote:
> When using the serial console in the GTK interface of QEMU (and
> QEMU has been compiled with CONFIG_VTE), it is possible to trigger
> the assert() statement in vty_receive() in spapr_vty.c by pasting
> a chunk of text with length > 16
On Thu, Nov 10, 2016 at 03:37:31PM +1100, Balbir Singh wrote:
>
>
> As per the ISA we need a cause and executing a tabort r9 in libc
> for example causes a EXCP_FU exception, we don't wire up the
> IC (cause) when we post the exception. The cause is required
> for the kernel to do the right thing
On Thu, Nov 10, 2016 at 01:17:10PM +0100, Cédric Le Goater wrote:
> Add a couple of tests on the XSCOM bus of the PowerNV machine for the
> the POWER8 and POWER9 CPUs. The first tests reads the CFAM identifier
> of the chip. The second test goes further in the XSCOM address space
> and reaches the
On Thu, Nov 10, 2016 at 09:16:01PM +0100, Thomas Huth wrote:
> When using the serial console in the GTK interface of QEMU (and
> QEMU has been compiled with CONFIG_VTE), it is possible to trigger
> the assert() statement in vty_receive() in spapr_vty.c by pasting
> a chunk of text with length > 16
On Thu, Nov 10, 2016 at 11:54:13AM -0600, Michael Roth wrote:
> Quoting David Gibson (2016-10-30 06:12:01)
> > During boot, PAPR guests negotiate CPU model support with the
> > ibm,client-architecture-support mechanism. The logic to implement this in
> > qemu is very convoluted. This cleans it up
> From: virtio-...@lists.oasis-open.org [mailto:virtio-...@lists.oasis-open.org]
> On Behalf Of Michael S. Tsirkin
> Subject: [virtio-dev] Re: [Qemu-devel] [PATCH v13 1/2] virtio-crypto: Add
> virtio
> crypto device specification
>
> On Thu, Nov 10, 2016 at 09:37:40AM +, Gonglei (Arei) wrote:
> From: virtio-...@lists.oasis-open.org [mailto:virtio-...@lists.oasis-open.org]
> On Behalf Of Michael S. Tsirkin
> Sent: Thursday, November 10, 2016 9:03 PM
> brian.a.keat...@intel.com; Claudio Fontana; mike.cara...@nxp.com; Wubin
> (H)
> Subject: Re: [virtio-dev] Re: [Qemu-devel] [PATCH v13 1/2]
On 16-11-10 03:44 PM, Alex Williamson wrote:
> On Fri, 11 Nov 2016 01:09:05 +0200
> "Michael S. Tsirkin" wrote:
>
>> On Thu, Nov 10, 2016 at 03:48:28PM -0700, Alex Williamson wrote:
>>> On Fri, 11 Nov 2016 00:33:17 +0200
>>> "Michael S. Tsirkin" wrote:
>>>
On Thu, Nov 10, 2016 at 03:29:2
Quoting David Gibson (2016-11-09 19:59:37)
> On Tue, Nov 08, 2016 at 04:51:10PM +1100, Alexey Kardashevskiy wrote:
> > On 08/11/16 16:19, David Gibson wrote:
> > > On Fri, Nov 04, 2016 at 04:58:47PM +1100, Alexey Kardashevskiy wrote:
> > >> On 30/10/16 22:12, David Gibson wrote:
> > >>> Server-clas
On 11/10/2016 11:19 AM, Kevin Wolf wrote:
> There is no point in passing the value of bs->opaque in order to
> overwrite it with itself.
>
> Signed-off-by: Kevin Wolf
> ---
> block/quorum.c | 9 -
> 1 file changed, 4 insertions(+), 5 deletions(-)
>
Reviewed-by: Eric Blake
--
Eric Bl
On 11/10/2016 11:19 AM, Kevin Wolf wrote:
> In the context of asynchronous work, if we have a worker coroutine that
> didn't yield, the parent coroutine cannot be reentered because it hasn't
> yielded yet. In this case we don't even have to reenter the parent
> because it will see that the work is
On Fri, 11 Nov 2016 01:09:05 +0200
"Michael S. Tsirkin" wrote:
> On Thu, Nov 10, 2016 at 03:48:28PM -0700, Alex Williamson wrote:
> > On Fri, 11 Nov 2016 00:33:17 +0200
> > "Michael S. Tsirkin" wrote:
> >
> > > On Thu, Nov 10, 2016 at 03:29:21PM -0700, Alex Williamson wrote:
> > > > On Thu,
Discard is advisory, so rounding the requests to alignment
boundaries is never semantically wrong from the data that
the guest sees. But at least the Dell Equallogic iSCSI SANs
has an interesting property that its advertised discard
alignment is 15M, yet documents that discarding a sequence
of 1M
Peter reported a mild regression in qemu 2.7 when targetting the
Dell Equallogic iSCSI, which advertizes a preferred and maximum
unmap alignment at 15M. In qemu 2.6, trims not aligned to those
boundaries still made it to the device, but in 2.7, the block
layer is ignoring unaligned portions of gue
Right now, the block layer rounds discard requests, so that
individual drivers are able to assert that discard requests
will never be unaligned. But there are some ISCSI devices
that track and coalesce multiple unaligned requests, turning it
into an actual discard if the requests eventually cover
On Thu, Nov 10, 2016 at 03:48:28PM -0700, Alex Williamson wrote:
> On Fri, 11 Nov 2016 00:33:17 +0200
> "Michael S. Tsirkin" wrote:
>
> > On Thu, Nov 10, 2016 at 03:29:21PM -0700, Alex Williamson wrote:
> > > On Thu, 10 Nov 2016 18:12:20 +0200
> > > "Michael S. Tsirkin" wrote:
> > >
> > > > T
On Thu, Nov 10, 2016 at 03:02:43PM -0800, John Fastabend wrote:
> Hi Michael,
>
> I'm getting a qemu crash from a load/unload of virtio_net.ko in guest
> kernel with the following,
>
> > ./x86_64-softmmu/qemu-system-x86_64 -hda
> > /var/lib/libvirt/images/Fedora-test0.img \
>-m 4096 -ena
Hi Michael,
I'm getting a qemu crash from a load/unload of virtio_net.ko in guest
kernel with the following,
> ./x86_64-softmmu/qemu-system-x86_64 -hda
> /var/lib/libvirt/images/Fedora-test0.img \
-m 4096 -enable-kvm -smp 4 -netdev tap,id=hn0,queues=4,vhost=on \
-device virtio-net-
Signed-off-by: Laurent Vivier
---
v2:
- use shift to do rotate_x() for 8 and 16bit value
- rotate_x()/rotate32_x() are a no-op when shift % (size + 1) == 0
- add some missing tcg_temp_free()
target-m68k/translate.c | 414
1 file changed, 414 inse
On Thu, Nov 10, 2016 at 03:48:28PM -0700, Alex Williamson wrote:
> On Fri, 11 Nov 2016 00:33:17 +0200
> "Michael S. Tsirkin" wrote:
>
> > On Thu, Nov 10, 2016 at 03:29:21PM -0700, Alex Williamson wrote:
> > > On Thu, 10 Nov 2016 18:12:20 +0200
> > > "Michael S. Tsirkin" wrote:
> > >
> > > > T
On Fri, Sep 16, 2016 at 07:05:47PM +0900, Namhyung Kim wrote:
> On Tue, Sep 13, 2016 at 06:57:10PM +0300, Michael S. Tsirkin wrote:
> > On Sat, Aug 20, 2016 at 05:07:43PM +0900, Namhyung Kim wrote:
> > > Add virtio pstore device to allow kernel log files saved on the host.
> > > It will save the lo
On Fri, 11 Nov 2016 00:33:17 +0200
"Michael S. Tsirkin" wrote:
> On Thu, Nov 10, 2016 at 03:29:21PM -0700, Alex Williamson wrote:
> > On Thu, 10 Nov 2016 18:12:20 +0200
> > "Michael S. Tsirkin" wrote:
> >
> > > The following changes since commit
> > > 6bbcb76301a72dc80c8d29af13d40bb9a759c9c6
On Thu, Nov 10, 2016 at 03:29:21PM -0700, Alex Williamson wrote:
> On Thu, 10 Nov 2016 18:12:20 +0200
> "Michael S. Tsirkin" wrote:
>
> > The following changes since commit 6bbcb76301a72dc80c8d29af13d40bb9a759c9c6:
> >
> > MAINTAINERS: Remove obsolete stable branches (2016-11-10 15:29:59 +
On Thu, 10 Nov 2016 18:12:20 +0200
"Michael S. Tsirkin" wrote:
> The following changes since commit 6bbcb76301a72dc80c8d29af13d40bb9a759c9c6:
>
> MAINTAINERS: Remove obsolete stable branches (2016-11-10 15:29:59 +)
>
> are available in the git repository at:
>
> git://git.kernel.org/pu
On 11/10/2016 11:13 AM, Halil Pasic wrote:
>
>
> On 11/10/2016 07:00 PM, Jianjun Duan wrote:
>>
>>
>> On 11/10/2016 04:04 AM, Halil Pasic wrote:
>>>
>>>
>>> On 11/08/2016 01:06 AM, Jianjun Duan wrote:
Currently we cannot directly transfer a QTAILQ instance because of the
limitation in
On Thu, Nov 10, 2016 at 3:54 PM, Michael S. Tsirkin wrote:
> On Thu, Nov 10, 2016 at 01:56:05AM +0200, Yuri Benditovich wrote:
> >
> >
> > On Wed, Nov 9, 2016 at 10:28 PM, Michael S. Tsirkin
> wrote:
> >
> > On Wed, Nov 09, 2016 at 05:22:02PM +0200,
> yuri.benditov...@daynix.com
> > wrot
On Thu, Nov 10, 2016 at 07:53:58PM +, Alex Bennée wrote:
[...]
> > +struct gic gicv2 = {
> > + .ipi = {
> > + .enable = gicv2_enable_defaults,
> > + .send_self = gicv2_ipi_send_self,
> > + .send_tlist = gicv2_ipi_send_tlist,
> > + .send_broadcast = gicv
When using the serial console in the GTK interface of QEMU (and
QEMU has been compiled with CONFIG_VTE), it is possible to trigger
the assert() statement in vty_receive() in spapr_vty.c by pasting
a chunk of text with length > 16 into the QEMU window.
Most of the other serial backends seem to simpl
Andrew Jones writes:
> Signed-off-by: Andrew Jones
>
> ---
> v5:
> - fix copy+paste error in gicv3_write_eoir [drew]
> - use modern register names [Andre]
> v4:
> - heavily comment gicv3_ipi_send_tlist() [Eric]
> - changes needed for gicv2 iar/irqstat fix to other patch
> v2:
> - use IRM f
On Thu, 10 Nov 2016 21:20:36 +0200
"Michael S. Tsirkin" wrote:
> On Thu, Nov 10, 2016 at 09:04:13AM -0700, Alex Williamson wrote:
> > On Thu, 10 Nov 2016 17:54:35 +0200
> > "Michael S. Tsirkin" wrote:
> >
> > > On Thu, Nov 10, 2016 at 08:30:21AM -0700, Alex Williamson wrote:
> > > > On Thu,
On 11/10/2016 07:13 PM, Alex Bennée wrote:
Richard Henderson writes:
On 11/09/2016 03:57 PM, Alex Bennée wrote:
This enables the multi-threaded system emulation by default for ARMv7
and ARMv8 guests using the x86_64 TCG backend. This means:
- The x86_64 TCG backend supports cmpxchg based
On Thu, Nov 10, 2016 at 09:04:13AM -0700, Alex Williamson wrote:
> On Thu, 10 Nov 2016 17:54:35 +0200
> "Michael S. Tsirkin" wrote:
>
> > On Thu, Nov 10, 2016 at 08:30:21AM -0700, Alex Williamson wrote:
> > > On Thu, 10 Nov 2016 17:14:24 +0200
> > > "Michael S. Tsirkin" wrote:
> > >
> > > > O
Richard Henderson writes:
> On 11/09/2016 03:57 PM, Alex Bennée wrote:
>> +#ifdef CONFIG_SOFTMMU
>> +memset(env, 0, offsetof(CPUARMState, tlb_table));
>> +tlb_flush(s, 0);
>> +#else
>> memset(env, 0, offsetof(CPUARMState, features));
>> +#endif
>
> I'd really prefer to see the tlb_f
On 11/10/2016 07:00 PM, Jianjun Duan wrote:
>
>
> On 11/10/2016 04:04 AM, Halil Pasic wrote:
>>
>>
>> On 11/08/2016 01:06 AM, Jianjun Duan wrote:
>>> Currently we cannot directly transfer a QTAILQ instance because of the
>>> limitation in the migration code. Here we introduce an approach to
>>>
Richard Henderson writes:
> On 11/09/2016 03:57 PM, Alex Bennée wrote:
>> +/* We currently can't handle more than 16 bits in the MMUIDX bitmask.
>> + */
>> +QEMU_BUILD_BUG_ON(NB_MMU_MODES > 16);
>
> We already assert <= 12 in exec/cpu_ldst.h. Although really any such assert
> belongs in exec/cp
On 11/09/2016 03:57 PM, Alex Bennée wrote:
This enables the multi-threaded system emulation by default for ARMv7
and ARMv8 guests using the x86_64 TCG backend. This means:
- The x86_64 TCG backend supports cmpxchg based atomic ops
- The x86_64 TCG backend emits barriers for barrier ops
Wha
On 11/09/2016 03:57 PM, Alex Bennée wrote:
As the arm_call_el_change_hook may affect global state (for example with
updating the global GIC state) we need to assert/take the BQL.
Signed-off-by: Alex Bennée
---
target-arm/helper.c| 6 ++
target-arm/op_helper.c | 4
2 files changed,
On 11/10/2016 04:04 AM, Halil Pasic wrote:
>
>
> On 11/08/2016 01:06 AM, Jianjun Duan wrote:
>> Currently we cannot directly transfer a QTAILQ instance because of the
>> limitation in the migration code. Here we introduce an approach to
>> transfer such structures. We created VMStateInfo vmstat
Quoting David Gibson (2016-10-30 06:12:01)
> During boot, PAPR guests negotiate CPU model support with the
> ibm,client-architecture-support mechanism. The logic to implement this in
> qemu is very convoluted. This cleans it up to be cleaner, using the new
> ppc_check_compat() call.
>
> The new
On 11/09/2016 03:57 PM, Alex Bennée wrote:
The WFE and YIELD instructions are really only hints and in TCG's case
they were useful to move the scheduling on from one vCPU to the next. In
the parallel context (MTTCG) this just causes an unnecessary cpu_exit
and contention of the BQL.
Signed-off-b
From: Eric Blake
Commit 7d3123e converted a single read_sync() into a while loop
that assumed that read_sync() would either make progress or give
an error. But when the server hangs up early, the client sees
EOF (a read_sync() of 0) and never makes progress, which in turn
caused qemu-iotest './ch
On 10/11/2016 12:48, Marcelo Tosatti wrote:
> Destination has to run the following logic:
>
> If (source has KVM_CAP_ADVANCE_CLOCK)
> use KVM_GET_CLOCK value
> Else
>read pvclock from guest
>
> To support migration from older QEMU versions which do not have
> KVM_CAP_ADVANCE_CLOCK (or n
On 11/09/2016 03:57 PM, Alex Bennée wrote:
+/* We are requested to boot in AArch32 mode */
+static uint32_t mode_for_el[] = { 0,
+ ARM_CPU_MODE_SVC,
+ ARM_CPU_MODE_HYP,
+
On 11/09/2016 03:57 PM, Alex Bennée wrote:
Most ARMCPRegInfo structures just allow updating of the CPU field.
However some have more complex operations that *may* be have cross vCPU
effects therefor need to be serialised. The most obvious examples at the
moment are things that affect the GICv3 IR
Richard Henderson writes:
> On 11/09/2016 03:57 PM, Alex Bennée wrote:
>> +void tlb_flush_page_all(target_ulong addr)
>
> It's a nit, but when I read this I think all pages, not all cpus.
> Can we rename this tlb_fluch_page_all_cpus?
So to properly support ARM TLB flush semantics I want to move
From: Doug Evans
It helps when reading the code to see how the number is arrived at.
Signed-off-by: Doug Evans
Message-Id: <94eb2c187eda43dba005406c8...@google.com>
Signed-off-by: Paolo Bonzini
---
target-i386/cpu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/target-i386/cpu.c b/ta
On 11/10/2016 07:00 PM, Alex Bennée wrote:
I should probably expand that to default to false in the case of (sizeof
target_ulong > sizeof void *) when we don't have CONFIG_ATOMIC64.
Then if the user does force mttcg on they will quickly get an assert
although maybe we want to report that in a ni
On Fri, Nov 04, 2016 at 02:48:20PM +0800, Jason Wang wrote:
>
>
> On 2016年11月04日 03:49, Michael S. Tsirkin wrote:
> > On Thu, Nov 03, 2016 at 05:27:19PM +0800, Jason Wang wrote:
> > > >This patches enable the Address Translation Service support for virtio
> > > >pci devices. This is needed for a
From: Marc-André Lureau
Spotted by Coverity, CID 1365383.
Signed-off-by: Marc-André Lureau
Message-Id: <20161107095922.31676-1-marcandre.lur...@redhat.com>
Signed-off-by: Paolo Bonzini
---
hw/core/qdev-properties-system.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --g
On 11/10/16 18:18, Laszlo Ersek wrote:
> On 11/10/16 16:09, Michael S. Tsirkin wrote:
>> On Tue, Sep 06, 2016 at 04:28:33PM +0800, Lin Ma wrote:
>>> If user specifies binary file on command line to load smbios entries, then
>>> will get error messages while decoding them in guest.
>>>
>>> Reproduce
The impact is small because kvm_get_vcpu_events fixes env->hflags, but
it is wrong and could cause INITs to be delayed arbitrarily with
-machine kernel_irqchip=off.
Reported-by: Achille Fouilleul
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target-i386/kvm.c | 2 +-
1 file c
Signed-off-by: Andrew Jones
---
v5:
- fix copy+paste error in gicv3_write_eoir [drew]
- use modern register names [Andre]
v4:
- heavily comment gicv3_ipi_send_tlist() [Eric]
- changes needed for gicv2 iar/irqstat fix to other patch
v2:
- use IRM for gicv3 broadcast
---
arm/gic.c
Richard Henderson writes:
> On 11/09/2016 03:57 PM, Alex Bennée wrote:
>> This enables the multi-threaded system emulation by default for ARMv7
>> and ARMv8 guests using the x86_64 TCG backend. This means:
>>
>> - The x86_64 TCG backend supports cmpxchg based atomic ops
>> - The x86_64 TCG b
QEMU's documentation is in good need for improving. Currently there
is an effort to add more pages to the QEMU wiki site. Here is the
list of pages that are or will exist one day:
From:
http://wiki.qemu.org/Documentation/Platforms
Alpha
ARM
CRIS
i386/x86-64
LatticeMico32
68K
Microblaze
MIPS
On 11/09/2016 03:57 PM, Alex Bennée wrote:
+#ifdef CONFIG_SOFTMMU
+memset(env, 0, offsetof(CPUARMState, tlb_table));
+tlb_flush(s, 0);
+#else
memset(env, 0, offsetof(CPUARMState, features));
+#endif
I'd really prefer to see the tlb_flush be moved into parent_reset, so that we
hand
From: Peter Xu
These macros will be useful to do page alignment checks.
Reviewed-by: Andre Przywara
Signed-off-by: Peter Xu
[drew: also added SZ_64K]
Signed-off-by: Andrew Jones
---
lib/libcflat.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/lib/libcflat.h b/lib/libcflat.h
index
On 10/11/2016 18:41, Thomas Huth wrote:
> On 10.11.2016 15:41, Paolo Bonzini wrote:
>>
>>
>> On 10/11/2016 10:06, Thomas Huth wrote:
>>> When using the serial console in the GTK interface of QEMU (and
>>> QEMU has been compiled with CONFIG_VTE), it is possible to trigger
>>> the assert() statemen
On 10.11.2016 15:41, Paolo Bonzini wrote:
>
>
> On 10/11/2016 10:06, Thomas Huth wrote:
>> When using the serial console in the GTK interface of QEMU (and
>> QEMU has been compiled with CONFIG_VTE), it is possible to trigger
>> the assert() statement in vty_receive() in spapr_vty.c by pasting
>>
Reviewed-by: Eric Auger
Signed-off-by: Andrew Jones
---
v5: use modern registers [Andre]
v4: properly mask irqnr in ipi_handler
v2: add more details in the output if a test fails,
report spurious interrupts if we get them
---
arm/Makefile.common | 6 +-
arm/gic.c| 195
On 11/10/2016 06:34 PM, Alex Bennée wrote:
So to properly support ARM TLB flush semantics I want to move some of
the looping in the helpers into cputlb.c so I'm thinking we'll have:
tlb_flush_page_all_cpus
tlb_flush_by_mmuidx_all_cpus
tlb_flush_page_by_mmuidx_all_cpus
Sounds good, thanks.
In
On 11/10/2016 05:14 PM, Alex Bennée wrote:
Even worse than that we trip up the atomic.h QEMU_BUILD_BUG_ON with the
atomic_cmpxchg. Now I believe we can use atomic_cmpxchg__nocheck without
too much issue on x86 but we'll need to #ifdef it on detection of wide
atomics.
You've already got CONFIG_A
Richard Henderson writes:
> On 11/10/2016 05:14 PM, Alex Bennée wrote:
>> Even worse than that we trip up the atomic.h QEMU_BUILD_BUG_ON with the
>> atomic_cmpxchg. Now I believe we can use atomic_cmpxchg__nocheck without
>> too much issue on x86 but we'll need to #ifdef it on detection of wide
Allow a thread to wait some specified amount of time. Can
specify in cycles, usecs, and msecs.
Reviewed-by: Alex Bennée
Reviewed-by: Eric Auger
Signed-off-by: Andrew Jones
---
lib/arm/asm/processor.h | 19 +++
lib/arm/processor.c | 15 +++
lib/arm64/asm/proc
From: ZhuangYanying
Hyper-V HV_X64_MSR_VP_RUNTIME was introduced in linux-4.4 + qemu-2.5.
As long as the KVM module supports, qemu will save / load the
vmstate_msr_hyperv_runtime register during the migration.
Regardless of whether the hyperv_runtime configuration of x86_cpu_properties is
enabl
On 11/09/2016 03:57 PM, Alex Bennée wrote:
+/* We currently can't handle more than 16 bits in the MMUIDX bitmask.
+ */
+QEMU_BUILD_BUG_ON(NB_MMU_MODES > 16);
We already assert <= 12 in exec/cpu_ldst.h. Although really any such assert
belongs in exec/cpu-defs.h, where we define CPU_TLB_BITS et
OK, thanks a lot for your response ... so let's close this bug now.
** Changed in: qemu
Status: Incomplete => Invalid
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https://bugs.launchpad.net/bugs/616769
Title:
interrupt p
Allow user to select who sends ipis and with which irq,
rather than just always sending irq=0 from cpu0.
Signed-off-by: Andrew Jones
---
v4: improve structure and make sure spurious checking is
done even when the sender isn't cpu0
v2: actually check that the irq received was the irq sent,
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