[Qemu-devel] [PATCH] usb: xhci: break loop after ctrl transfer complete

From: Prasad J Pandit xHCI controller emulator loops through the transfer ring to transfer control/data between host memory and device endpoints. It continues to do so after processing 'Status Stage' TD which is the last descriptor in control transfer. Add break to avoid infinite loop. Reported-

Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 1/1] hw/net/spapr_llan: 6 byte mac address device tree entry

On 13.02.2017 06:33, David Gibson wrote: > On Tue, Nov 22, 2016 at 10:19:38AM +1100, Sam Bobroff wrote: >> The spapr-vlan device in QEMU has always presented it's MAC address in >> the device tree as an 8 byte value, even though PAPR requires it to be >> 6 bytes. This is because, at the time, AIX

Re: [Qemu-devel] [PATCH 1/1] mirror: do not increase offset during initial zero_or_discard phase - pls consider this as V3 patch

On 02/03/2017 06:08 PM, Denis V. Lunev wrote: > On 02/03/2017 06:06 PM, Denis V. Lunev wrote: >> From: Anton Nefedov >> >> If explicit zeroing out before mirroring is required for the target image, >> it moves the block job offset counter to EOF, then offset and len counters >> count the image siz

[Qemu-devel] [PATCH v3 0/3] kvm: report available guest crash parameters

Windows reports BSOD parameters through Hyper-V crash MSRs. This information is very useful for initial crash analysis and thus it would be nice to see it in the QEMU log file. There is suitable log mask for the purpose. Linux guest does not provide this information, but still it would be nice to

[Qemu-devel] [PATCH v3 2/3] report guest crash information in GUEST_PANICKED event

From: Anton Nefedov it's not very convenient to use the crash-information property interface, so provide a CPU class callback to get the guest crash information, and pass that information in the event Signed-off-by: Anton Nefedov Signed-off-by: Denis V. Lunev --- hw/misc/pvpanic.c | 2

[Qemu-devel] [PATCH v3 1/3] i386/cpu: add crash-information QOM property

From: Anton Nefedov Windows reports BSOD parameters through Hyper-V crash MSRs. This information is very useful for initial crash analysis and thus it would be nice to have a way to fetch it. Signed-off-by: Anton Nefedov Signed-off-by: Denis V. Lunev --- include/sysemu/kvm.h | 2 ++ kvm-all.

[Qemu-devel] [PATCH v3 3/3] vl: log available guest crash information

From: Anton Nefedov There is a suitable log mask for the purpose. Signed-off-by: Anton Nefedov Signed-off-by: Denis V. Lunev --- vl.c | 9 + 1 file changed, 9 insertions(+) diff --git a/vl.c b/vl.c index d5a183f..873aa4e 100644 --- a/vl.c +++ b/vl.c @@ -1709,6 +1709,8 @@ void qemu_sy

Re: [Qemu-devel] [PATCH 0/7] pc/spapr: unify handling of possible CPUs

On Fri, Feb 10, 2017 at 11:31:08AM +0100, Igor Mammedov wrote: > On Thu, 9 Feb 2017 12:08:31 +0100 > Igor Mammedov wrote: > > [...] > > > > Series depends on: > > [PATCH 0/3] spapr: fix cpu core hotunplug call flow > > https://www.mail-archive.com/qemu-devel@nongnu.org/msg427214.html > > wh

Re: [Qemu-devel] [Qemu-ppc] [PATCH] hw/pci-host/prep: Do not use hw_error() in realize function

On Thu, Feb 09, 2017 at 12:14:41PM +0100, Thomas Huth wrote: > hw_error() is for CPU related errors only (it prints out a > register dump and calls abort()), so we should not use it > if we just failed to load the bios image. Apart from that, > realize() functions should not exit directly but alway

Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 1/1] hw/net/spapr_llan: 6 byte mac address device tree entry

On Tue, Nov 22, 2016 at 10:19:38AM +1100, Sam Bobroff wrote: > The spapr-vlan device in QEMU has always presented it's MAC address in > the device tree as an 8 byte value, even though PAPR requires it to be > 6 bytes. This is because, at the time, AIX required the value to be 8 > bytes. However,

Re: [Qemu-devel] [PATCH] block: Swap request limit definitions

On Sun, 02/12 02:47, Max Reitz wrote: > Defining BDRV_REQUEST_MAX_SECTORS based on BDRV_REQUEST_MAX_BYTES is > simpler than the other way around. > > Signed-off-by: Max Reitz > --- > include/block/block.h | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/include/bloc

Re: [Qemu-devel] [RFC][PATCH] qemu-img: make convert async

On Sun, 02/12 03:06, Max Reitz wrote: > On 02.02.2017 17:06, Peter Lieven wrote: > > this is something I have been thinking about for almost 2 years now. > > we heavily have the following two use cases when using qemu-img convert. > > > > a) reading from NFS and writing to iSCSI for deploying temp

Re: [Qemu-devel] [PATCH v5 00/17] Dirty bitmaps postcopy migration

On Tue, 02/07 18:05, Vladimir Sementsov-Ogievskiy wrote: > Hi all! > > There is a new version of dirty bitmap postcopy migration series. Doesn't apply to master now, could you rebase? Fam

Re: [Qemu-devel] [PATCH v3] net: e1000e: fix an infinite loop issue

On 2017年02月12日 19:38, Dmitry Fleytman wrote: Reviewed-by: Dmitry Fleytman > Applied. Thanks On 10 Feb 2017, at 04:19 AM, Li Qiang > wrote: This issue is like the issue in e1000 network card addressed in this commit: e1000: eliminate infi

Re: [Qemu-devel] [PATCH] audio: make audio poll timer deterministic

Ping? Pavel Dovgalyuk > -Original Message- > From: Pavel Dovgalyuk [mailto:pavel.dovga...@ispras.ru] > Sent: Tuesday, January 31, 2017 2:59 PM > To: qemu-devel@nongnu.org > Cc: pbonz...@redhat.com; dovga...@ispras.ru; kra...@redhat.com > Subject: [PATCH] audio: make audio poll timer dete

Re: [Qemu-devel] [PATCH] replay: add record/replay for audio passthrough

Ping? Pavel Dovgalyuk > -Original Message- > From: Pavel Dovgalyuk [mailto:pavel.dovga...@ispras.ru] > Sent: Tuesday, January 31, 2017 2:59 PM > To: qemu-devel@nongnu.org > Cc: pbonz...@redhat.com; dovga...@ispras.ru; kra...@redhat.com > Subject: [PATCH] replay: add record/replay for aud

Re: [Qemu-devel] [PATCH 0/3] block devices record/replay update

Ping? Pavel Dovgalyuk > -Original Message- > From: Pavel Dovgalyuk [mailto:pavel.dovga...@ispras.ru] > Sent: Tuesday, January 31, 2017 2:57 PM > To: qemu-devel@nongnu.org > Cc: kw...@redhat.com; pbonz...@redhat.com; dovga...@ispras.ru; > qemu-bl...@nongnu.org; > mre...@redhat.com > Subje

Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 10/10] hw/ppc/spapr: Add POWER9 to pseries cpu models

On Fri, Feb 10, 2017 at 04:26:00PM +1100, Suraj Jitindar Singh wrote: > Add POWER9 cpu to list of spapr core models which allows it to be specified > as the cpu model for a pseries guest (e.g. -machine pseries -cpu POWER9). > > This now allows a POWER9 cpu to boot to userspace in tcg emulation for

Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 08/10] target/ppc/POWER9: Add POWER9 pa-features definition

On Fri, Feb 10, 2017 at 04:25:58PM +1100, Suraj Jitindar Singh wrote: > Add a pa-features definition which includes all of the new fields which > have been added, note we don't claim support for any of these new features > at this stage. > > Signed-off-by: Suraj Jitindar Singh Reviewed-by: David

Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 09/10] target/ppc/POWER9: Add cpu_has_work function for POWER9

On Fri, Feb 10, 2017 at 04:25:59PM +1100, Suraj Jitindar Singh wrote: > The cpu has work function is used to mask interrupts used to determine > if there is work for the cpu based on the LPCR. Add a function to do this > for POWER9 and add it to the POWER9 cpu definition. This is similar to that >

Re: [Qemu-devel] [RFC] virtio-pci: Allow PCIe virtio devices on root bus

On Sun, Feb 12, 2017 at 09:05:46PM +0200, Marcel Apfelbaum wrote: > On 02/10/2017 02:37 AM, David Gibson wrote: > > On Thu, Feb 09, 2017 at 10:04:47AM +0100, Laszlo Ersek wrote: > > > On 02/09/17 05:16, David Gibson wrote: > > > > On Wed, Feb 08, 2017 at 11:40:50AM +0100, Laszlo Ersek wrote: > > >

Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 00/10] target/ppc: Implement POWER9 pseries tcg

On Fri, Feb 10, 2017 at 04:25:50PM +1100, Suraj Jitindar Singh wrote: > This is V2 of the patch series to implement tcg emulation support for a > POWER9 cpu model for the pseries machine type running a legacy kernel. > That is a kernel which doesn't use the new radix mmu mode or the new hash > mmu

Re: [Qemu-devel] [PATCH 2/3] COLO: Shutdown related socket fd while do failover

On 2017/2/9 3:53, Dr. David Alan Gilbert wrote: * Hailiang Zhang (zhang.zhanghaili...@huawei.com) wrote: On 2017/1/18 19:01, Dr. David Alan Gilbert wrote: * zhanghailiang (zhang.zhanghaili...@huawei.com) wrote: If the net connection between primary host and secondary host breaks while COLO/COL

Re: [Qemu-devel] [Qemu-ppc] [PATCH] target/ppc: Stop parsing pvr list in H_CAS when exact match found

On Mon, Feb 13, 2017 at 02:30:27PM +1100, Suraj Jitindar Singh wrote: > The pvr-list passed in H_Client_Architecture_Support is used to > communicate the supported pvrs of the client program. When an > exact match is found you are allowed to stop parsing the list and continue > the boot process. >

Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 07/10] target/ppc/POWER9: Add POWER9 mmu fault handler

On Fri, Feb 10, 2017 at 04:25:57PM +1100, Suraj Jitindar Singh wrote: > Add a new mmu fault handler for the POWER9 cpu and add it as the handler > for the POWER9 cpu definition. > > This handler checks if the guest is radix or hash based on the value in the > partition table entry and calls the co

Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 06/10] target/ppc: Don't use SDR1 when running under a POWER9 cpu model

On Fri, Feb 10, 2017 at 04:25:56PM +1100, Suraj Jitindar Singh wrote: > The SDR1 register was used on pre-POWER9 processors to store the location > of the hash page table, however now this information will be stored in the > partition table so we don't have SDR1 anymore. Additionally this register

Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 05/10] target/ppc: Add patb_entry to sPAPRMachineState

On Mon, 2017-02-13 at 13:17 +1100, David Gibson wrote: > On Fri, Feb 10, 2017 at 04:25:55PM +1100, Suraj Jitindar Singh wrote: > > > > ISA v3.00 adds the idea of a partition table which is used to store > > the > > address translation details for all partitions on the system. The > > partition > >

[Qemu-devel] [Qemu-ppc] [PATCH] target/ppc: Stop parsing pvr list in H_CAS when exact match found

The pvr-list passed in H_Client_Architecture_Support is used to communicate the supported pvrs of the client program. When an exact match is found you are allowed to stop parsing the list and continue the boot process. Currently while explicit_match is set when we find an exact match, we still set

Re: [Qemu-devel] [PATCH 0/7] POWER9 TCG and softfloat enablements - part16 + s390 float fixes

On Fri, Feb 10, 2017 at 12:53:04PM +0530, Bharata B Rao wrote: 1;4601;0c> This series contains 2 new instructions (xscvqpudz, xscvqpuwz) and > round-to-odd variants of 6 instructions (xsaddqpo, xsmulqpo, xsdivqpo, > xscvqpdpo, xssqrtqpo, xssubqpo) > > This also includes softfloat enhancements tha

Re: [Qemu-devel] [PATCH 5/6] target-ppc: support for 32-bit carry and overflow

On Fri, Feb 10, 2017 at 09:49:17AM +0530, Nikunj A Dadhania wrote: > David Gibson writes: > > > [ Unknown signature status ] > > On Thu, Feb 09, 2017 at 04:04:04PM +0530, Nikunj A Dadhania wrote: > >> POWER ISA 3.0 adds CA32 and OV32 status in 64-bit mode. Add the flags > >> and corresponding def

Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 02/10] target/ppc: Fix LPCR DPFD mask define

On Fri, Feb 10, 2017 at 04:25:52PM +1100, Suraj Jitindar Singh wrote: > The DPFD field in the LPCR is 3 bits wide. This has always been defined > as 0x3 << shift which indicates a 2 bit field, which is incorrect. > Correct this. > > Signed-off-by: Suraj Jitindar Singh Since this is a correct fix

Re: [Qemu-devel] [PATCH 0/7] POWER9 TCG and softfloat enablements - part16 + s390 float fixes

On Fri, Feb 10, 2017 at 12:53:04PM +0530, Bharata B Rao wrote: > This series contains 2 new instructions (xscvqpudz, xscvqpuwz) and > round-to-odd variants of 6 instructions (xsaddqpo, xsmulqpo, xsdivqpo, > xscvqpdpo, xssqrtqpo, xssubqpo) > > This also includes softfloat enhancements that are nee

Re: [Qemu-devel] [QEMU-PPC] [PATCH V2 05/10] target/ppc: Add patb_entry to sPAPRMachineState

On Fri, Feb 10, 2017 at 04:25:55PM +1100, Suraj Jitindar Singh wrote: > ISA v3.00 adds the idea of a partition table which is used to store the > address translation details for all partitions on the system. The partition > table consists of double word entries indexed by partition id where the sec

[Qemu-devel] [PATCH v6] nios2: Add Altera JTAG UART emulation

Add the Altera JTAG UART model. Hardware emulation based on: https://www.altera.com/en_US/pdfs/literature/ug/ug_embedded_ip.pdf (Please see "Register Map" on page 65) Signed-off-by: Juro Bystricky --- V2: - Removed link to hw specs(checkpatch: line over 90 characters) V3: - New link to do hw spe

Re: [Qemu-devel] [PATCH] nios2: Add Altera JTAG UART emulation

> Subject should contain [PATCH v5] ... mea culpa, to my defense I did specify --subject-prefix="PATCH v5" but did not realize "git send-email file.patch" seems to ignore it Normally I do something like this (which works fine): "git send-email -1 --subject-prefix="PATCH v5" [...] > > +

Re: [Qemu-devel] [PATCH v5 08/10] PC: Support dynamic sysbus on pc_i440fx

Hi > On Feb 12, 2017, at 11:55 AM, Marcel Apfelbaum > wrote: > > On 02/06/2017 06:31 PM, Michael S. Tsirkin wrote: >> On Sun, Feb 05, 2017 at 01:12:03AM -0800, b...@skyportsystems.com wrote: >>> From: Ben Warren >>> >>> This allows pc_i440fx-based machines to add new devices such as >>> VM Gen

Re: [Qemu-devel] [PATCH 0/3] ppc: replace debug printf with trace points

On Fri, Feb 10, 2017 at 10:27:21AM +0100, Laurent Vivier wrote: > This series replaces the remaining DPRINTF() > found under hw/ppc and replace them with trace > points. > > Laurent Vivier (3): > mac99: replace debug printf with trace points > ppc4xx: replace debug printf with trace points >

Re: [Qemu-devel] beginning contribution

On Mon, 02/13 01:26, Shubham Kumar wrote: > > Can I start with any of the tasks listed on > http://wiki.qemu-project.org/index.php/Contribute/BiteSizedTasks > and submit the changes ?? Yes, you are welcome to! Please see also http://wiki.qemu-project.org/Contribute/SubmitAPatch for how to submi

Re: [Qemu-devel] [PATCH] nios2: Add Altera JTAG UART emulation

On 02/12/2017 07:55 PM, Juro Bystricky wrote: Subject should contain [PATCH v5] ... > Add the Altera JTAG UART model. > > Hardware emulation based on: > https://www.altera.com/en_US/pdfs/literature/ug/ug_embedded_ip.pdf > (Please see "Register Map" on page 65) [...] > +static void altera_juart

[Qemu-devel] [PATCH 1/2] hw/m68k: QOMify the ColdFire interrupt controller

Use type_init() and friends to adapt the ColdFire interrupt controller to the latest QEMU device conventions. Signed-off-by: Thomas Huth --- hw/m68k/mcf_intc.c | 48 1 file changed, 44 insertions(+), 4 deletions(-) diff --git a/hw/m68k/mcf_intc.c

[Qemu-devel] [PATCH 2/2] MAINTAINERS: Add odd fixer the ColdFire boards

I did some work with real ColdFire boards in the past, and after QOMifying most of the ColdFire devices recently, too, I feel confident that I could at least take care of odd fixes for these boards. Signed-off-by: Thomas Huth --- MAINTAINERS | 7 +-- 1 file changed, 5 insertions(+), 2 deleti

[Qemu-devel] [PATCH 0/2] m68k: Update MCF interrupt controller and MAINTAINERS

Here's a patch to QOMify the ColdFire interrupt controller, and another patch to update MAINTAINERS - I'd like to volunteer to maintain the two orphan ColdFire machines. Thomas Huth (2): hw/m68k: QOMify the ColdFire interrupt controller MAINTAINERS: Add odd fixer the ColdFire boards MAINTAIN

[Qemu-devel] AIX KDB under 40p

With -cpu 601 it's slow, but interesting: qemu-system-ppc -M 40p -bios p12h0456.img -hda aix-5.1-cd1.iso -cpu 601 ^^^ -cpu 601 is crucial. With the default CPU (604) it just hangs after a greeting. And after 90 minutes, on the serial line AIX Version pinmore.c, s.@(#)65 1.1 Instruction St

Re: [Qemu-devel] [PULL 050/107] prep: add IBM RS/6000 7020 (40p) machine emulation

On Thu, Feb 2, 2017 at 6:13 AM, David Gibson wrote: > From: Hervé Poussineau > > Machine supports both Open Hack'Ware and OpenBIOS. > Open Hack'Ware is the default because OpenBIOS is currently unable to boot > PReP boot partitions or PReP kernels. > > Signed-off-by: Hervé Poussineau > [dwg: Cor

[Qemu-devel] beginning contribution

Can I start with any of the tasks listed on http://wiki.qemu-project.org/index.php/Contribute/BiteSizedTasks and submit the changes ?? Regards Shubham Kumar

Re: [Qemu-devel] [PATCH v5 08/10] PC: Support dynamic sysbus on pc_i440fx

On 02/06/2017 06:31 PM, Michael S. Tsirkin wrote: On Sun, Feb 05, 2017 at 01:12:03AM -0800, b...@skyportsystems.com wrote: From: Ben Warren This allows pc_i440fx-based machines to add new devices such as VM Generation ID directly to the sysbus. Signed-off-by: Ben Warren Hi, Only point

Re: [Qemu-devel] [RFC] virtio-pci: Allow PCIe virtio devices on root bus

On 02/10/2017 02:37 AM, David Gibson wrote: On Thu, Feb 09, 2017 at 10:04:47AM +0100, Laszlo Ersek wrote: On 02/09/17 05:16, David Gibson wrote: On Wed, Feb 08, 2017 at 11:40:50AM +0100, Laszlo Ersek wrote: On 02/08/17 07:16, David Gibson wrote: Marcel, Your original patch adding PCIe suppor

[Qemu-devel] [PATCH] nios2: Add Altera JTAG UART emulation

Add the Altera JTAG UART model. Hardware emulation based on: https://www.altera.com/en_US/pdfs/literature/ug/ug_embedded_ip.pdf (Please see "Register Map" on page 65) Signed-off-by: Juro Bystricky --- V2: - Removed link to hw specs(checkpatch: line over 90 characters) V3: - New link to do hw spe

Re: [Qemu-devel] [PATCH v7 1/2] q35: Improve sample configuration files

On 02/10/2017 07:25 PM, Andrea Bolognani wrote: Instead of having a single sample configuration file, we now have several: * q35-emulated.cfg documents the default devices QEMU adds to a q35 guest and the additional devices that are pretty much guaranteed to be present in a physica

Re: [Qemu-devel] [PATCH v2] linux-user: Add FICLONE and FICLONERANGE ioctls

Le 11/02/2017 à 23:26, Helge Deller a écrit : > Add missing FICLONE and FICLONERANGE ioctls. > > Changes to v1: > - Added STRUCT_file_clone_range as suggested by Laurent Vivier > > Signed-off-by: Helge Deller Reviewed-by: Laurent Vivier > > diff --git a/linux-user/ioctls.h b/linux-user/ioctl

Re: [Qemu-devel] libslirp and QEMU slirp

Hi, On Wed, Feb 08, 2017 at 11:10:50PM +0100, Samuel Thibault wrote: > Hello, > > Stefan Hajnoczi, on Mon 06 Feb 2017 11:55:05 +, wrote: > > I'm proposing this topic for discussion because there might be common > > ground for Samuel from QEMU and the VDE folks to collaborate. > > > > Samuel:

Re: [Qemu-devel] [PATCH v3] net: e1000e: fix an infinite loop issue

Reviewed-by: Dmitry Fleytman > On 10 Feb 2017, at 04:19 AM, Li Qiang wrote: > > This issue is like the issue in e1000 network card addressed in > this commit: > e1000: eliminate infinite loops on out-of-bounds transfer start. > > Signed-off-by: Li Qiang > --- > > Change since v2: > fix error

[Qemu-devel] [PATCH] spice: allow to specify drm rendernode

When multiple GPU are available, picking the first one isn't always the best choice. Learn to specify a device rendernode. Signed-off-by: Marc-André Lureau --- include/ui/egl-helpers.h | 3 +-- ui/egl-helpers.c | 10 +++--- ui/spice-core.c | 5 - qemu-options.hx