In preparation for some other work in this area, here is a patch set that
cleans up some of the code around the cpu_dt_id field of struct PowerPCCPU.
It includes a bugfix for h_signal_sys_reset() because the code there uses the
cpu_dt_id field and it would need to be changed by this set anyway.
The concept of a VCPU ID that differs from the CPU's index
(cpu->cpu_index) exists only within SPAPR machines so, move the
functions ppc_get_vcpu_id() and ppc_get_cpu_by_vcpu_id() into spapr.c
and rename them appropriately.
Signed-off-by: Sam Bobroff
---
hw/ppc/ppc.c | 21 -
The e500 platform code uses the function ppc_get_vcpu_dt_id() but that
function is actually specific to SPAPR machines, not PPC CPUs, and
will always return the cpu_index in this context.
Simply use the cpu_index instead (which is 'i' in this context
because qemu_get_cpu(i) returns the cpu with cp
This field actually records the VCPU ID used by KVM and, although the
value is also used in the device tree it is primarily the VCPU ID so
rename it as such.
Signed-off-by: Sam Bobroff
---
hw/ppc/ppc.c| 8
hw/ppc/spapr.c | 16
hw/ppc/spapr_
The unicast case in h_signal_sys_reset() seems to be broken:
rather than selecting the target CPU, it looks like it will pick
either the first CPU or fail to find one at all.
Fix it by using the search function rather than open coding the
search.
This was found by inspection; the code appears to
On 08/02/2017 01:58 PM, Marcel Apfelbaum wrote:
> On 02/08/2017 19:26, Michael S. Tsirkin wrote:
>> On Wed, Aug 02, 2017 at 06:36:29PM +0300, Marcel Apfelbaum wrote:
Can dmi-pci support shpc? why doesn't it? For compatibility?
>>>
>>> I don't know why, but the fact that it doesn't
On Wed, Aug 02, 2017 at 08:08:33PM -0500, Eric Blake wrote:
> s/continuosly/continuously/
>
> Signed-off-by: Eric Blake
Hardly seems like a trivial patch like this should need an R-b, but what the
heck:
Reviewed-by: Jeff Cody
> ---
> tests/libqtest.h | 8
> 1 file changed, 4 insert
On Wed, Aug 02, 2017 at 07:34:16PM +0200, Greg Kurz wrote:
> When running nested with KVM PR, ppc_set_compat() fails and QEMU crashes
> because of "double free or corruption (!prev)". The crash happens because
> error_report_err() has already called error_free().
>
> Signed-off-by: Greg Kurz
Oop
On Wed, Aug 02, 2017 at 09:51:22AM +0200, Igor Mammedov wrote:
> On Wed, 2 Aug 2017 00:14:18 +0300
> "Michael S. Tsirkin" wrote:
>
> > On Mon, Jul 31, 2017 at 05:40:47PM +0200, Igor Mammedov wrote:
> > > While refactoring i386/FADT generation to build_append_int_noprefix()
> > >
> >
On Fri, Jul 28, 2017 at 04:13:08PM +0200, Marc-André Lureau wrote:
> Learn to compile out vhost-user. Keep it enabled by default on
> non-win32, that is assumed to be POSIX. Fail if trying to enable it on
> win32.
>
> When trying to make a vhost-user netdev, it gives the following error:
>
> -net
s/continuosly/continuously/
Signed-off-by: Eric Blake
---
tests/libqtest.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tests/libqtest.h b/tests/libqtest.h
index 38bc1e9953..3ae570927a 100644
--- a/tests/libqtest.h
+++ b/tests/libqtest.h
@@ -117,7 +117,7 @@ QDict *
Let's use a macro for the ERC (error recover code) when generating a
Channel Subsystem Event-information pending CRW (channel report word).
While we are at it, let's also add all other ERCs.
Signed-off-by: Dong Jia Shi
Reviewed-by: Halil Pasic
---
hw/s390x/css.c| 2 +-
include/hw/
A successful completion of rchp should signal a solicited channel path
initialized CRW (channel report word), while the current implementation
always generates an un-solicited one. Let's fix this.
Reported-by: Halil Pasic
Signed-off-by: Dong Jia Shi
Reviewed-by: Halil Pasic
---
hw/s390x/css.c
This series is trying to:
1. clear up ERC related code
2. bugfix for channel path related CRW generation
Change log
--
v2->v3:
Added Halil's R-B on both patches.
Patch #1:
Added ERC "installed parameters restored".
v1->v2:
Patch #1:
Add all ERCs.
Commit message update.
Patch #2:
R
On 08/02/2017 03:00 PM, Anatol Pomozov wrote:
> What ELF specification says about it? Does it tell a loader to load
> only PT_LOAD segments?
Yes. In https://refspecs.linuxfoundation.org/ there is a link to "System V ABI
Edition 4.1", which AFAIK is the latest version of the ELF "gABI" spec.
Secti
warning: redirection vers https://people.debian.org/~sthibault/qemu.git/
The following changes since commit aaaec6acad7cf97372d48c1b09126a09697519c8:
Update version for v2.10.0-rc1 release (2017-08-02 16:36:32 +0100)
are available in the git repository at:
http://people.debian.org/~sthibault
Samuel Thibault, on jeu. 03 août 2017 00:26:07 +0200, wrote:
> From: Prasad J Pandit
>
> While parsing dhcp options string in 'dhcp_decode', if an options'
> length 'len' appeared towards the end of 'bp_vend' array, ensuing
> read could lead to an OOB memory access issue. Add check to avoid it.
>
From: Hervé Poussineau
With "-netdev user,id=net0,dns=1.2.3.4"
error was:
qemu-system-i386: -netdev user,id=net0,dns=1.2.3.4: Device 'user' could not be
initialized
Error is now:
qemu-system-i386: -netdev user,id=net0,dns=1.2.3.4: DNS doesn't belong to
network
Signed-off-by: Hervé Poussineau
From: Prasad J Pandit
While parsing dhcp options string in 'dhcp_decode', if an options'
length 'len' appeared towards the end of 'bp_vend' array, ensuing
read could lead to an OOB memory access issue. Add check to avoid it.
This is CVE-2017-11434.
Reported-by: Reno Robert
Signed-off-by: Prasa
From: Hervé Poussineau
With "-netdev user,id=net0,dns=1.2.3.4"
error was:
qemu-system-i386: -netdev user,id=net0,dns=1.2.3.4: Device 'user' could not be
initialized
Error is now:
qemu-system-i386: -netdev user,id=net0,dns=1.2.3.4: DNS doesn't belong to
network
Signed-off-by: Hervé Poussineau
warning: redirection vers https://people.debian.org/~sthibault/qemu.git/
The following changes since commit aaaec6acad7cf97372d48c1b09126a09697519c8:
Update version for v2.10.0-rc1 release (2017-08-02 16:36:32 +0100)
are available in the git repository at:
http://people.debian.org/~sthibault
From: Prasad J Pandit
While parsing dhcp options string in 'dhcp_decode', if an options'
length 'len' appeared towards the end of 'bp_vend' array, ensuing
read could lead to an OOB memory access issue. Add check to avoid it.
Reported-by: Reno Robert
Signed-off-by: Prasad J Pandit
Signed-off-by
On 08/02/2017 05:36 PM, Philippe Mathieu-Daudé wrote:
> Hi Cleber,
>
> On 08/02/2017 05:15 PM, Cleber Rosa wrote:
>> Which contains one specific function used by iov.c.
>>
>> Without this, "make -C tests/tcg test_path" (and consequently
>> "make -C tests/tcg" or simply "make test") fails quite e
- Original Message -
> Back when the test was introduced, in commit 62c39b307, the
> test was set up to run qemu-ga directly on the host performing
> the test, and defaults to limiting itself to safe commands. At
> the time, it was envisioned that setting QGA_TEST_SIDE_EFFECTING
> in the
Hello Richard
Thank you for this useful information. I still learning about ELF and
a lot of things are still unclear for me.
On Mon, Jul 31, 2017 at 11:20 AM, Richard Henderson wrote:
> On 07/31/2017 10:21 AM, Anatol Pomozov wrote:
>> ELF sections info is needed for an OS to map address space p
On 08/02/2017 01:43 PM, Peter Maydell wrote:
In the ARM get_phys_addr() code, switch to using the MMUAccessType
enum and its MMU_* values rather than int and literal 0/1/2.
Signed-off-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
---
target/arm/helper.c| 30 +++---
On 08/02/2017 01:43 PM, Peter Maydell wrote:
Currently get_phys_addr() has PMSAv7 handling before the
"is translation disabled?" check, and then PMSAv5 after it.
Tidy this up by making the PMSAv5 code handle the "MPU disabled"
case itself, so that we have all the PMSA code in one place.
This will
On 08/02/2017 01:44 PM, Peter Maydell wrote:
The armv7m_nvic.h header file was accidentally placed in
include/hw/arm; move it to include/hw/intc to match where
its corresponding .c file lives.
Signed-off-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
---
hw/intc/armv7m_nvic.c
On 08/02/2017 01:43 PM, Peter Maydell wrote:
Add a utility function for testing whether the CPU is in Handler
mode; this is just a check whether v7m.exception is non-zero, but
we do it in several places and it makes the code a bit easier
to read to not have to mentally figure out what the test is
On 08/02/2017 01:43 PM, Peter Maydell wrote:
Move the code in arm_v7m_cpu_do_interrupt() that calculates the
magic LR value down to when we're actually going to use it.
Having the calculation and use so far apart makes the code
a little harder to understand than it needs to be.
Signed-off-by: Pe
On 08/02/2017 06:59 AM, James Hogan wrote:
DMTC0 CP0_Cause does a redundant gen_io_start() and gen_io_end() pair,
even though this is done for all DMTC0 operations outside of the switch
statement. Remove these redundant calls.
Fixes: 5dc5d9f055c5 ("mips: more fixes to the MIPS interrupt glue log
On Wed, Aug 2, 2017 at 6:28 PM, Philippe Mathieu-Daudé wrote:
> Hi Cleber,
>
> On 08/02/2017 05:15 PM, Cleber Rosa wrote:
>>
>> A include for is missing, and prevents
>> tests/tcg/linux-test from compiling.
>
>
> getrusage() I presume, don't know if worth adding in commit message.
Sorry I missed
Hi Cleber,
On 08/02/2017 05:15 PM, Cleber Rosa wrote:
Which contains one specific function used by iov.c.
Without this, "make -C tests/tcg test_path" (and consequently
"make -C tests/tcg" or simply "make test") fails quite early.
Signed-off-by: Cleber Rosa
---
tests/tcg/test_path.c | 1 +
On Wed, Aug 02, 2017 at 03:50:36PM +0200, Laurent Vivier wrote:
> On 02/08/2017 15:42, Philippe Mathieu-Daudé wrote:
> > Hi Laurent,
> >
> > On Wed, Aug 2, 2017 at 7:32 AM, Laurent Vivier wrote:
> >> With pseries machine type a negative core-id is not managed properly:
> >> -1 gives an inaccurate
Hi Cleber,
On 08/02/2017 05:15 PM, Cleber Rosa wrote:
A include for is missing, and prevents
tests/tcg/linux-test from compiling.
getrusage() I presume, don't know if worth adding in commit message.
Signed-off-by: Cleber Rosa
Reviewed-by: Philippe Mathieu-Daudé
---
tests/tcg/linux-
On Wed, Aug 02, 2017 at 02:11:35PM +0530, Bhumika Goyal wrote:
> Add const to bin_attribute structures as they are only passed to the
> functions sysfs_{remove/create}_bin_file. The arguments passed are of
> type const, so declare the structures to be const.
>
> Done using Coccinelle.
>
> @m disa
On Wed, Aug 02, 2017 at 06:51:13PM +0300, Marcel Apfelbaum wrote:
> Do not mention ioh3420 in the "how to" doc.
> The device still works and can be used by already
> existing setups, but no need to be mentioned.
>
> Suggested-by: Andrew Jones
> Signed-off-by: Marcel Apfelbaum
> ---
Do we need t
On 08/02/2017 03:19 PM, Eric Blake wrote:
> Back when the test was introduced, in commit 62c39b307, the
> test was set up to run qemu-ga directly on the host performing
> the test, and defaults to limiting itself to safe commands. At
> the time, it was envisioned that setting QGA_TEST_SIDE_EFFECTI
Back when the test was introduced, in commit 62c39b307, the
test was set up to run qemu-ga directly on the host performing
the test, and defaults to limiting itself to safe commands. At
the time, it was envisioned that setting QGA_TEST_SIDE_EFFECTING
in the environment could cover a few more comma
A clean up of unused code to make the compiler happy.
Signed-off-by: Cleber Rosa
---
tests/tcg/test-i386-fprem.c | 15 ---
1 file changed, 15 deletions(-)
diff --git a/tests/tcg/test-i386-fprem.c b/tests/tcg/test-i386-fprem.c
index f70363d..1dceda0 100644
--- a/tests/tcg/test-i386-f
So that glib.h can be found.
Signed-off-by: Cleber Rosa
---
tests/tcg/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/tcg/Makefile b/tests/tcg/Makefile
index 89e3342..c946fde 100644
--- a/tests/tcg/Makefile
+++ b/tests/tcg/Makefile
@@ -98,7 +98,7 @@ test-i386:
A trivial fix to make the compiler happy.
Signed-off-by: Cleber Rosa
---
tests/tcg/test-i386-fprem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/tcg/test-i386-fprem.c b/tests/tcg/test-i386-fprem.c
index 1a71623..f70363d 100644
--- a/tests/tcg/test-i386-fprem.c
+++ b
The primary motivation of this patch series is to get "make -C
tests/tcg", on i386, to run. Having all of the individual i386 tcg
tests passing is beyond the scope of this patch series, though.
The secondary motivation is to gather feedback on the status of the
tcg tests. If you have strong opin
A include for is missing, and prevents
tests/tcg/linux-test from compiling.
Signed-off-by: Cleber Rosa
---
tests/tcg/linux-test.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/tcg/linux-test.c b/tests/tcg/linux-test.c
index 1c6c013..15c9d7f 100644
--- a/tests/tcg/linux-test.c
+++ b/
Which contains one specific function used by iov.c.
Without this, "make -C tests/tcg test_path" (and consequently
"make -C tests/tcg" or simply "make test") fails quite early.
Signed-off-by: Cleber Rosa
---
tests/tcg/test_path.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/tcg/test
Building tests/tcg/linux-test is not currently possible because
$(QEMU_INCLUDES) is not being passed to $(CC_I386). But, since
it's not really used, instead of adding the $(QEMU_INCLUDES),
let's remove the "qemu/ctuils.h" include instead.
Signed-off-by: Cleber Rosa
---
tests/tcg/linux-test.c |
Quoting Michael Roth (2017-08-02 14:25:48)
> Hello,
>
> On behalf of the QEMU Team, I'd like to announce the availability of the
> second release candidate for the QEMU 2.10 release. This release is meant
> for testing purposes and should not be used in a production environment.
>
> http://dow
Hello,
On behalf of the QEMU Team, I'd like to announce the availability of the
second release candidate for the QEMU 2.10 release. This release is meant
for testing purposes and should not be used in a production environment.
http://download.qemu-project.org/qemu-2.10.0-rc1.tar.xz
http://do
Hi Leon,
On 08/02/2017 10:58 AM, Yongbok Kim wrote:
From: Leon Alrae
PFN0 and PFN1 have to be masked out with PageMask_Mask.
Signed-off-by: Leon Alrae
Reviewed-by: Yongbok Kim
[Yongbok Kim:
Added commit message]
Signed-off-by: Yongbok Kim
---
target/mips/op_helper.c | 5 +++--
1 file
On 08/02/2017 02:34 PM, Greg Kurz wrote:
When running nested with KVM PR, ppc_set_compat() fails and QEMU crashes
because of "double free or corruption (!prev)". The crash happens because
error_report_err() has already called error_free().
Signed-off-by: Greg Kurz
Reviewed-by: Philippe Mathie
On 02/08/2017 19:25, Laszlo Ersek wrote:
On 08/02/17 17:51, Marcel Apfelbaum wrote:
Do not mention ioh3420 in the "how to" doc.
The device still works and can be used by already
existing setups, but no need to be mentioned.
Suggested-by: Andrew Jones
Signed-off-by: Marcel Apfelbaum
---
docs
On 02/08/2017 19:26, Michael S. Tsirkin wrote:
On Wed, Aug 02, 2017 at 06:36:29PM +0300, Marcel Apfelbaum wrote:
Can dmi-pci support shpc? why doesn't it? For compatibility?
I don't know why, but the fact that it doesn't is the reason libvirt
settled on auto-creating a dmi-pci bridge and a pci
On 08/02/2017 12:34 PM, Greg Kurz wrote:
> When running nested with KVM PR, ppc_set_compat() fails and QEMU crashes
> because of "double free or corruption (!prev)". The crash happens because
> error_report_err() has already called error_free().
>
> Signed-off-by: Greg Kurz
> ---
> target/ppc/ma
On Wed, Aug 02, 2017 at 05:43:51PM +0100, Peter Maydell wrote:
> Remove an out of date comment which says there's only one
> item in the NVIC container region -- we put systick into its
> own device object a while back and so now there are two
> things in the container.
>
> Signed-off-by: Peter Ma
On 02/08/2017 17:10, Igor Mammedov wrote:
On Wed, 2 Aug 2017 16:15:10 +0300
Marcel Apfelbaum wrote:
On 31/07/2017 18:40, Igor Mammedov wrote:
It turns out that FADT isn't actually tested for changes
against reference table, since it happens to be the 1st
table in RSDT which is currently ignor
On Wed, Aug 02, 2017 at 05:43:50PM +0100, Peter Maydell wrote:
> Tighten up the T32 decoder in the places where new v8M instructions
> will be:
> * TT/TTT/TTA/TTAT are in what was nominally LDREX/STREX r15, ...
>which is UNPREDICTABLE:
>make the UNPREDICTABLE behaviour be to UNDEF
> * BXN
On Wed, Aug 02, 2017 at 05:43:49PM +0100, Peter Maydell wrote:
> Currently get_phys_addr() has PMSAv7 handling before the
> "is translation disabled?" check, and then PMSAv5 after it.
> Tidy this up by making the PMSAv5 code handle the "MPU disabled"
> case itself, so that we have all the PMSA code
When running nested with KVM PR, ppc_set_compat() fails and QEMU crashes
because of "double free or corruption (!prev)". The crash happens because
error_report_err() has already called error_free().
Signed-off-by: Greg Kurz
---
target/ppc/machine.c |1 -
1 file changed, 1 deletion(-)
diff -
On Wed, Aug 02, 2017 at 05:43:48PM +0100, Peter Maydell wrote:
> M profile cores can never trap on WFI or WFE instructions. Check for
> M profile in check_wfx_trap() to ensure this.
>
> The existing code will do the right thing for v7M cores because
> the hcr_el2 and scr_el3 registers will be all-
UPDATE:
Restarting "SPICE VDAagent" within the VM allows me to paste again from host to
VM, however as soon as I use copy within the VM, it stops working again.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.n
On Wed, Aug 02, 2017 at 05:43:47PM +0100, Peter Maydell wrote:
> In the ARM get_phys_addr() code, switch to using the MMUAccessType
> enum and its MMU_* values rather than int and literal 0/1/2.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Edgar E. Iglesias
> ---
> target/arm/helper.c|
Public bug reported:
Hello,
I am using qemu on arch:
pacman -Q libvirt qemu linux virt-manager
libvirt 3.5.0-1
qemu 2.9.0-2
linux 4.12.3-1
virt-manager 1.4.1-2
I have a windows 10 Guest, with all updates and the following packages
installed in the guest:
- QEMU guest agent 7.3.2
- SPICE Gue
On Wed, Aug 02, 2017 at 12:33:19PM +0200, Kevin Wolf wrote:
Am 02.08.2017 um 12:07 hat Stefan Hajnoczi geschrieben:
On Tue, Aug 01, 2017 at 04:49:07PM +0300, Manos Pitsidianakis wrote:
> diff --git a/block.c b/block.c
> index 9ebdba28b0..c6aad25286 100644
> --- a/block.c
> +++ b/block.c
> @@ -19
Remove an out of date comment which says there's only one
item in the NVIC container region -- we put systick into its
own device object a while back and so now there are two
things in the container.
Signed-off-by: Peter Maydell
---
hw/intc/armv7m_nvic.c | 4
1 file changed, 4 deletions(-)
Remove the comment that claims that some MPU_CTRL bits are stored
in sctlr_el[1]. This has never been true since MPU_CTRL was added
in commit 29c483a50607 -- the comment is a leftover from
Michael Davidsaver's original implementation, which I modified
not to use sctlr_el[1]; I forgot to delete the
(This is 2.11 material, obviously, but it's a coherent and
large enough set of patches that I figured I might as well
push it out for review now.)
This patchset is a collection of cleanups, bugfixes, etc to
the existing v7M code which are either necessary preliminary
to implementing v8M or just th
Make the arm_cpu_dump_state() debug logging handle the M-profile XPSR
rather than assuming it's an A-profile CPSR. On M profile the PSR
line of a register dump will now look like this:
XPSR=4100 -Z-- T priv-thread
Signed-off-by: Peter Maydell
---
target/arm/translate.c | 58 +++
Currently get_phys_addr() has PMSAv7 handling before the
"is translation disabled?" check, and then PMSAv5 after it.
Tidy this up by making the PMSAv5 code handle the "MPU disabled"
case itself, so that we have all the PMSA code in one place.
This will make adding the PMSAv8 code slightly cleaner,
M profile cores can never trap on WFI or WFE instructions. Check for
M profile in check_wfx_trap() to ensure this.
The existing code will do the right thing for v7M cores because
the hcr_el2 and scr_el3 registers will be all-zeroes and so we
won't attempt to trap, but when we start setting ARM_FEA
Tighten up the T32 decoder in the places where new v8M instructions
will be:
* TT/TTT/TTA/TTAT are in what was nominally LDREX/STREX r15, ...
which is UNPREDICTABLE:
make the UNPREDICTABLE behaviour be to UNDEF
* BXNS/BLXNS are distinguished from BX/BLX via the low 3 bits,
which in previ
Move the code in arm_v7m_cpu_do_interrupt() that calculates the
magic LR value down to when we're actually going to use it.
Having the calculation and use so far apart makes the code
a little harder to understand than it needs to be.
Signed-off-by: Peter Maydell
---
target/arm/helper.c | 15
We currently store the M profile CPU register state PRIMASK and
FAULTMASK in the daif field of the CPU state in its I and F
bits. This is a legacy from the original implementation, which
tried to share the cpu_exec_interrupt code between A profile
and M profile. We've since separated out the two ca
The M profile XPSR is almost the same format as the A profile CPSR,
but not quite. Define some XPSR_* macros and use them where we
definitely dealing with an XPSR rather than reusing the CPSR ones.
Signed-off-by: Peter Maydell
---
target/arm/cpu.h| 38 --
Add a utility function for testing whether the CPU is in Handler
mode; this is just a check whether v7m.exception is non-zero, but
we do it in several places and it makes the code a bit easier
to read to not have to mentally figure out what the test is testing.
Signed-off-by: Peter Maydell
---
t
When we switched our handling of exception exit to detect
the magic addresses at translate time rather than via
a do_unassigned_access hook, we forgot to update a
comment; correct the omission.
Signed-off-by: Peter Maydell
---
target/arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
For M profile the XPSR is a similar but not identical format to the
A profile CPSR/SPSR. (For instance the Thumb bit is in a different
place.) For guest accesses we make the M profile code go through
xpsr_read() and xpsr_write() which handle the different layout.
However for migration we use cpsr_r
In the ARM get_phys_addr() code, switch to using the MMUAccessType
enum and its MMU_* values rather than int and literal 0/1/2.
Signed-off-by: Peter Maydell
---
target/arm/helper.c| 30 +++---
target/arm/internals.h | 3 ++-
2 files changed, 17 insertions(+), 16 dele
The ARMv7M architecture specifies that most of the addresses in the
PPB region (which includes the NVIC, systick and system registers)
are not accessible to unprivileged accesses, which should
BusFault with a few exceptions:
* the STIR is configurably user-accessible
* the ITM (which we don't imp
The armv7m_nvic.h header file was accidentally placed in
include/hw/arm; move it to include/hw/intc to match where
its corresponding .c file lives.
Signed-off-by: Peter Maydell
---
hw/intc/armv7m_nvic.c | 2 +-
include/hw/arm/armv7m.h| 2 +-
include/hw/{arm => in
On Wed, Aug 02, 2017 at 06:36:29PM +0300, Marcel Apfelbaum wrote:
> > > > > > Can dmi-pci support shpc? why doesn't it? For compatibility?
> > > > >
> > > > > I don't know why, but the fact that it doesn't is the reason libvirt
> > > > > settled on auto-creating a dmi-pci bridge and a pci-pci brid
On 08/02/17 17:51, Marcel Apfelbaum wrote:
> Do not mention ioh3420 in the "how to" doc.
> The device still works and can be used by already
> existing setups, but no need to be mentioned.
>
> Suggested-by: Andrew Jones
> Signed-off-by: Marcel Apfelbaum
> ---
> docs/pcie.txt | 16 --
Do not mention ioh3420 in the "how to" doc.
The device still works and can be used by already
existing setups, but no need to be mentioned.
Suggested-by: Andrew Jones
Signed-off-by: Marcel Apfelbaum
---
docs/pcie.txt | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff -
On 02/08/2017 17:21, Marcel Apfelbaum wrote:
On 02/08/2017 17:16, Laszlo Ersek wrote:
On 08/02/17 15:47, Michael S. Tsirkin wrote:
On Wed, Aug 02, 2017 at 12:23:46AM +0200, Laszlo Ersek wrote:
On 08/01/17 23:39, Michael S. Tsirkin wrote:
On Wed, Aug 02, 2017 at 12:33:12AM +0300, Alexander Bez
On 27 July 2017 at 10:55, Dr. David Alan Gilbert wrote:
> * Thomas Huth (th...@redhat.com) wrote:
>> testchardev2 is not a valid chardev id here. Use testchardev1
>> instead which has been created with chardev-add right before
>> the 'chardev-send-break' line.
>> And while we're at it, add the tes
Stefan Hajnoczi writes:
> On Wed, Aug 02, 2017 at 12:10:14PM +0100, Peter Maydell wrote:
>> On 2 August 2017 at 12:04, Stefan Hajnoczi wrote:
>> > On Tue, Aug 01, 2017 at 02:54:29PM +0100, Peter Maydell wrote:
>> >> and I don't need the TCG engine to be a library to do that...
>> >
>> > You do ne
On 08/02/2017 02:59 AM, James Hogan wrote:
DMTC0 CP0_Cause does a redundant gen_io_start() and gen_io_end() pair,
even though this is done for all DMTC0 operations outside of the switch
statement. Remove these redundant calls.
Fixes: 5dc5d9f055c5 ("mips: more fixes to the MIPS interrupt glue log
On 08/02/2017 02:59 AM, James Hogan wrote:
RDHWR CC reads the CPU timer like MFC0 CP0_Count, so with icount enabled
it must set can_do_io while it calls the helper to avoid the "Bad icount
read" error. It should also break out of the translation loop to ensure
that timer interrupts are immediatel
On 08/02/2017 02:59 AM, James Hogan wrote:
Commit e350d8ca3ac7 ("target/mips: optimize indirect branches") made
indirect branches able to directly find the next TB and jump straight to
it without breaking out of translated code and going around the main
execution loop. This breaks the assumption
On 2 August 2017 at 14:58, Dr. David Alan Gilbert (git)
wrote:
> From: "Dr. David Alan Gilbert"
>
> The following changes since commit d3d183a638d6a3ead515618a6547b3f80d39fcb9:
>
> Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
> (2017-08-02 09:49:02 +0100)
>
> are a
On Wed, Aug 02, 2017 at 12:10:14PM +0100, Peter Maydell wrote:
> On 2 August 2017 at 12:04, Stefan Hajnoczi wrote:
> > On Tue, Aug 01, 2017 at 02:54:29PM +0100, Peter Maydell wrote:
> >> and I don't need the TCG engine to be a library to do that...
> >
> > You do need TCG APIs if you want TCG-leve
Hi
Please, send any topic that you are interested in covering.
At the end of Monday I will send an email with the agenda or the
cancellation of the call, so hurry up.
After discussions on the QEMU Summit, we are going to have always open a
KVM call where you can add topics.
Call details:
By
Building QEMU on fedora26 with the latest gcc package fails:
CC ppc64-softmmu/target/ppc/kvm.o
In file included from include/sysemu/hw_accel.h:16:0,
from target/ppc/kvm.c:31:
target/ppc/kvm.c: In function ‘kvmppc_booke_watchdog_enable’:
include/sysemu/kvm.h:449:35: error: ‘
On Wed, Aug 02, 2017 at 01:57:04PM +0300, Manos Pitsidianakis wrote:
> On Wed, Aug 02, 2017 at 11:39:22AM +0100, Stefan Hajnoczi wrote:
> > On Tue, Aug 01, 2017 at 07:49:33PM +0300, Manos Pitsidianakis wrote:
> > > On Tue, Aug 01, 2017 at 04:47:03PM +0100, Stefan Hajnoczi wrote:
> > > > On Mon, Jul
On Thu, Jul 13, 2017 at 08:01:16PM +0100, Dr. David Alan Gilbert (git) wrote:
> --- a/vl.c
> +++ b/vl.c
> @@ -4787,8 +4787,8 @@ int main(int argc, char **argv, char **envp)
> replay_disable_events();
> iothread_stop_all();
>
> -bdrv_close_all();
> pause_all_vcpus();
> +bdrv
On Wed, Aug 02, 2017 at 01:34:46PM +0300, Manos Pitsidianakis wrote:
> On Wed, Aug 02, 2017 at 11:07:24AM +0100, Stefan Hajnoczi wrote:
> > On Tue, Aug 01, 2017 at 04:49:07PM +0300, Manos Pitsidianakis wrote:
> > > @@ -3729,6 +3731,12 @@ const char *bdrv_get_parent_name(const
> > > BlockDriverStat
On Wed, Aug 02, 2017 at 12:32:59PM +0200, Laurent Vivier wrote:
> With pseries machine type a negative core-id is not managed properly:
> -1 gives an inaccurate error message ("core -1 already populated"),
> -2 crashes QEMU (core dump)
>
> As it seems a negative value is invalid for any architectu
On Wed, Aug 02, 2017 at 10:14:56AM +0200, Greg Kurz wrote:
> On Fri, 28 Jul 2017 14:27:45 +1000
> David Gibson wrote:
>
> > On Thu, Jul 27, 2017 at 03:50:37PM -0500, Michael Roth wrote:
> > > Quoting Greg Kurz (2017-07-27 08:45:47)
> > > > If object_property_add_alias() returns an error in real
On 02/08/2017 17:16, Laszlo Ersek wrote:
On 08/02/17 15:47, Michael S. Tsirkin wrote:
On Wed, Aug 02, 2017 at 12:23:46AM +0200, Laszlo Ersek wrote:
On 08/01/17 23:39, Michael S. Tsirkin wrote:
On Wed, Aug 02, 2017 at 12:33:12AM +0300, Alexander Bezzubikov wrote:
2017-08-01 23:31 GMT+03:00 Las
On 08/02/17 15:47, Michael S. Tsirkin wrote:
> On Wed, Aug 02, 2017 at 12:23:46AM +0200, Laszlo Ersek wrote:
>> On 08/01/17 23:39, Michael S. Tsirkin wrote:
>>> On Wed, Aug 02, 2017 at 12:33:12AM +0300, Alexander Bezzubikov wrote:
2017-08-01 23:31 GMT+03:00 Laszlo Ersek :
> (Whenever my co
On Wed, 2 Aug 2017 16:15:10 +0300
Marcel Apfelbaum wrote:
> On 31/07/2017 18:40, Igor Mammedov wrote:
> > It turns out that FADT isn't actually tested for changes
> > against reference table, since it happens to be the 1st
> > table in RSDT which is currently ignored.
> > Fix it by making sure th
1 - 100 of 179 matches
Mail list logo
