Re: [Qemu-devel] [PATCH v2 0/4] blockjobs: add explicit job reaping

Quick drive-by comment: Kevin Wolf writes: [...] > Let me try to just consolidate all of the above into a single state > machine: > > 1. CREATED --> RUNNING > driver callback: .start > 2a. RUNNING --> READY | CANCELLED > via: auto transition (when bulk copy is

Re: [Qemu-devel] [PULL 3/5] hmp-commands-info: Fix "info rocker-FOO" misspellings

Paolo Bonzini writes: > On 05/10/2017 12:51, Dr. David Alan Gilbert (git) wrote: >> From: Markus Armbruster >> >> Screwed up in commit da76ee7. > > Let me introduce you to these two aliases: > > whatis = "show -s --pretty='tformat:%h (\"%s\",

[Qemu-devel] [PATCH v4] target/ppc: Fix carry flag setting for shift algebraic instructions

For POWER ISA v3.0, the XER bit CA32 needs to be set by the shift right algebraic instructions whenever the CA bit is to be set. This change affects the following instructions: * Shift Right Algebraic Word (sraw[.]) * Shift Right Algebraic Word Immediate (srawi[.]) * Shift Right Algebraic

Re: [Qemu-devel] [PATCH v4 1/2] virtio: introduce `query-virtio' QMP command

Jan Dakinevich writes: > On 10/03/2017 05:02 PM, Eric Blake wrote: >> On 10/03/2017 07:47 AM, Jan Dakinevich wrote: >>> The command is intended for gathering virtio information such as status, >>> feature bits, negotiation status. It is convenient and useful for

Re: [Qemu-devel] [RFC PATCH 19/32] qapi: Accept double-quoted strings

Marc-André Lureau writes: > On Thu, Oct 5, 2017 at 6:41 AM, Markus Armbruster wrote: >> Marc-André Lureau writes: >> >>> On Mon, Oct 2, 2017 at 5:25 PM, Markus Armbruster wrote: The QAPI schema

Re: [Qemu-devel] [RFC PATCH 19/32] qapi: Accept double-quoted strings

Eric Blake writes: > On 10/04/2017 11:41 PM, Markus Armbruster wrote: > >> Sadly, the schema language is neither JSON, nor an established extension >> of JSON, nor Python. This commit brings the schema language one step >> closer to a superset of JSON. I feel "homegrown

Re: [Qemu-devel] [RFC PATCH 02/32] texi2pod: Support @verbatim environment

Eric Blake writes: > On 10/02/2017 10:25 AM, Markus Armbruster wrote: >> Signed-off-by: Markus Armbruster >> --- >> scripts/texi2pod.pl | 11 +-- >> 1 file changed, 9 insertions(+), 2 deletions(-) > > My perl is a bit rusty, but I think I can

Re: [Qemu-devel] [REBASED 0/2] exec: further refine address_space_get_iotlb_entry()

On Thu, Oct 05, 2017 at 07:13:07PM +0200, Maxime Coquelin wrote: > This series is a rebase of the first two patches of Peter's series > improving address_space_get_iotlb_entry(): > Message-Id: <1496404254-17429-1-git-send-email-pet...@redhat.com> > > It is actually not only an improvement, but

Re: [Qemu-devel] [PATCH v2 0/4] blockjobs: add explicit job reaping

On 10/05/2017 07:38 AM, Kevin Wolf wrote: > Am 05.10.2017 um 03:46 hat John Snow geschrieben: >> On 10/04/2017 02:27 PM, Kevin Wolf wrote: >>> Am 04.10.2017 um 03:52 hat John Snow geschrieben: For jobs that complete when a monitor isn't looking, there's no way to tell what the job's

Re: [Qemu-devel] [Qemu-arm] [PATCH v4 0/5] virtio-iommu: VFIO integration

> >> Thanks > >> > >> Eric > >>> > >>> However you should be allowed to map 1 sg element of 5 pages and > >>> then notify the host about this event I think. Still looking at the > >>> code... > >>> > >>> I still can't reproduce the issue at the moment. What kind of device > >>> are you

Re: [Qemu-devel] [PATCH 06/23] ppc: mac_oldworld: use generic cpu_model parsing

On Thu, Oct 05, 2017 at 06:24:33PM +0200, Igor Mammedov wrote: > Signed-off-by: Igor Mammedov Acked-by: David Gibson > --- > hw/ppc/mac_oldworld.c | 6 ++ > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --git

Re: [Qemu-devel] [PATCH 05/23] ppc: mac_newworld: use generic cpu_model parsing

On Thu, Oct 05, 2017 at 06:24:32PM +0200, Igor Mammedov wrote: > Signed-off-by: Igor Mammedov Acked-by: David Gibson > --- > hw/ppc/mac_newworld.c | 15 ++- > 1 file changed, 6 insertions(+), 9 deletions(-) > > diff --git

Re: [Qemu-devel] [PATCH 03/23] qom: add helper macro DEFINE_TYPES()

On Thu, Oct 05, 2017 at 06:24:30PM +0200, Igor Mammedov wrote: > DEFINE_TYPES() will help to simplify following routine patterns: > > static void foo_register_types(void) > { > type_register_static(_type_info); > type_register_static(_type_info); > ... > } > >

Re: [Qemu-devel] [PATCH 01/23] qom: update doc comment for type_register[_static]()

On Thu, Oct 05, 2017 at 06:24:28PM +0200, Igor Mammedov wrote: > type_register()/type_register_static() functions in current impl. > can't fail returning 0, also none of the users check for error > so update doc comment to reflect current behaviour. > > Suggested-by: Eduardo Habkost

Re: [Qemu-devel] [PATCH 11/23] ppc: spapr: replace ppc_cpu_parse_features() with cpu_parse_cpu_model()

On Thu, Oct 05, 2017 at 06:24:38PM +0200, Igor Mammedov wrote: > ppc_cpu_parse_features() is doing practically the same thing as > generic cpu_parse_cpu_model(). So remove duplicated impl. and > reuse generic one. > > Signed-off-by: Igor Mammedov Acked-by: David Gibson

Re: [Qemu-devel] [PATCH 10/23] ppc: 40p/prep: replace cpu_model with cpu_type

On Thu, Oct 05, 2017 at 06:24:37PM +0200, Igor Mammedov wrote: > Signed-off-by: Igor Mammedov Acked-by: David Gibson > --- > hw/ppc/prep.c | 12 > 1 file changed, 4 insertions(+), 8 deletions(-) > > diff --git a/hw/ppc/prep.c

Re: [Qemu-devel] [PATCH 08/23] ppc: replace cpu_model with cpu_type on ref405ep, taihu boards

On Thu, Oct 05, 2017 at 06:24:35PM +0200, Igor Mammedov wrote: > Signed-off-by: Igor Mammedov Acked-by: David Gibson > --- > hw/ppc/ppc405_uc.c | 6 -- > hw/ppc/ppc4xx_devs.c | 4 ++-- > 2 files changed, 6 insertions(+), 4 deletions(-) >

Re: [Qemu-devel] [PATCH v3] target/ppc: Fix carry flag setting for shift algebraic instructions

On Thu, Oct 05, 2017 at 08:42:56AM -0400, Richard Henderson wrote: > On 10/03/2017 02:23 AM, Sandipan Das wrote: > > @@ -231,6 +231,10 @@ target_ulong helper_sraw(CPUPPCState *env, > > target_ulong value, > > ret = (int32_t)value >> 31; > > env->ca = (ret != 0); > > } > > +

Re: [Qemu-devel] [PATCH 07/23] ppc: bamboo: use generic cpu_model parsing

On Thu, Oct 05, 2017 at 06:24:34PM +0200, Igor Mammedov wrote: > Signed-off-by: Igor Mammedov Acked-by: David Gibson > --- > hw/ppc/ppc440_bamboo.c | 7 ++- > 1 file changed, 2 insertions(+), 5 deletions(-) > > diff --git

Re: [Qemu-devel] [PATCH 09/23] ppc: virtex-ml507: replace cpu_model with cpu_type

On Thu, Oct 05, 2017 at 06:24:36PM +0200, Igor Mammedov wrote: > Signed-off-by: Igor Mammedov Acked-by: David Gibson > --- > hw/ppc/virtex_ml507.c | 11 --- > 1 file changed, 4 insertions(+), 7 deletions(-) > > diff --git

Re: [Qemu-devel] [PATCH 02/23] qom: introduce type_register_static_array()

On Thu, Oct 05, 2017 at 06:24:29PM +0200, Igor Mammedov wrote: > it will help to remove code duplication of registration > static types in places that have open coded loop to > perform batch type registering. > > Signed-off-by: Igor Mammedov > Reviewed-by: Eduardo Habkost

Re: [Qemu-devel] [PATCH 04/23] ppc: mpc8544ds/e500plat: use generic cpu_model parsing

On Thu, Oct 05, 2017 at 06:24:31PM +0200, Igor Mammedov wrote: > Signed-off-by: Igor Mammedov Acked-by: David Gibson Do you want me to queue the ppc patches here, or do you already have a plan for that? > --- > hw/ppc/e500.c | 8 +---

Re: [Qemu-devel] [PATCH 00/22] tcg: tb_lock removal

On Mon, Aug 07, 2017 at 19:52:16 -0400, Emilio G. Cota wrote: > This series applies on top of the "multiple TCG contexts" series, v4: > https://lists.gnu.org/archive/html/qemu-devel/2017-07/msg06769.html (snip) > Please review! Turns out this patchset breaks icount, even after fixing the

Re: [Qemu-devel] [PATCH v4 11/43] tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASK

On Mon, Sep 25, 2017 at 10:01:15 -0700, Richard Henderson wrote: > On 09/22/2017 01:40 PM, Emilio G. Cota wrote: > > Hi Richard, > > > > Are you planning to get this patchset merged in this window? If so, I can > > give it a respin on top of the current master. > > Yes, I do. I've been

[Qemu-devel] Patch to add helpful tracing output for driver authors in NVMe emulation

I added the tracing output in this patch to assist me in implementing an NVMe driver. It helped tremendously. >From 1d19086cdef8d492929852d582cb41dcc5026f71 Mon Sep 17 00:00:00 2001 From: Doug Gale Date: Thu, 5 Oct 2017 19:02:03 -0400 Subject: [PATCH] Add tracing output to

[Qemu-devel] [Bug 1719196] Re: [arm64 ocata] newly created instances are unable to raise network interfaces

Thanks so much for doing that Sean. Omitting expected changes (uuid, mac address, etc), here's are the significant changes I see: 1) N uses the QEMU 'virt' model, O uses 'virt-2.8' 2) N and O both expose a pci root, but N also exposed 2 PCI bridges that O does not. 3) N exposes an additional

Re: [Qemu-devel] [Qemu-block] [PATCH 8/8] nbd: Minimal structured read for client

On 10/05/2017 05:36 AM, Paolo Bonzini wrote: > On 05/10/2017 12:02, Vladimir Sementsov-Ogievskiy wrote: >> 03.10.2017 17:06, Paolo Bonzini wrote: >>> On 03/10/2017 15:35, Vladimir Sementsov-Ogievskiy wrote: >> In the end this probably means that you have a read_chunk_header >> function and

Re: [Qemu-devel] [PATCH 15/23] ppc: spapr: register 'host' core type along with the rest of core types

On Thu, 5 Oct 2017 18:24:42 +0200 Igor Mammedov wrote: > consolidate 'host' core type registration by moving it from > KVM specific code into spapr_cpu_core.c, similar like it's > done in x86 target. > > Signed-off-by: Igor Mammedov > --- On the way

Re: [Qemu-devel] Qemu Documentation

I want yo add extra functionality of booting from virtual USB through qemu. I need to write a new block of code in /hw/USB to emulate virtual USB. I don't have any clue of how to procced. Code documentation of other devices like hub network would help us understanding and implementing usb On Thu,

Re: [Qemu-devel] [PATCH 14/23] ppc: spapr: use cpu type name directly

On Thu, 5 Oct 2017 18:24:41 +0200 Igor Mammedov wrote: > replace sPAPRCPUCoreClass::cpu_class with cpu type name > since it were needed just to get that at points it were > accessed. > > Signed-off-by: Igor Mammedov > --- Reviewed-by: Greg Kurz

[Qemu-devel] [PULL 7/9] config: qemu_config_parse() return number of config groups

Change qemu_config_parse() to return the number of config groups in success and -EINVAL on error. This will allow callers of qemu_config_parse() to check if something was really loaded from the config file. All existing callers of qemu_config_parse() and qemu_read_config_file() only check if the

[Qemu-devel] [PULL 9/9] x86: Correct translation of some rdgsbase and wrgsbase encodings

From: Todd Eisenberger It looks like there was a transcription error when writing this code initially. The code previously only decoded src or dst of rax. This resolves https://bugs.launchpad.net/qemu/+bug/1719984. Signed-off-by: Todd Eisenberger

[Qemu-devel] [PULL 5/9] vl: Eliminate defconfig variable

Both -nodefconfig and -no-user-config options do the same thing today, we only need one variable to keep track of them. Suggested-by: Markus Armbruster Acked-by: Alistair Francis Reviewed-by: Markus Armbruster Signed-off-by:

[Qemu-devel] [PULL 6/9] qemu-options: Deprecate -nodefconfig

Since 2012 (commit ba6212d8 "Eliminate cpus-x86_64.conf file") we have no default config files that would be disabled using -nodefconfig. Update documentation and document -nodefconfig as deprecated. Cc: Markus Armbruster Acked-by: Alistair Francis

[Qemu-devel] [PULL 8/9] qom: update doc comment for type_register[_static]()

From: Igor Mammedov type_register()/type_register_static() functions in current impl. can't fail returning 0, also none of the users check for error so update doc comment to reflect current behaviour. Suggested-by: Eduardo Habkost Signed-off-by: Igor

[Qemu-devel] [PULL 4/9] machine: Add a valid_cpu_types property

From: Alistair Francis This patch add a MachineClass element that can be set in the machine C code to specify a list of supported CPU types. If the supported CPU types are specified the user enter CPU (by -cpu at runtime) is checked against the supported types and

[Qemu-devel] [PULL 1/9] hw/acpi-build: Make assignment statement of next_base easy to read

From: Dou Liyang It may be hard to read the assignment statement of "next_base", so S/next_base += (1ULL << 32) - pcms->below_4g_mem_size; /next_base = mem_base + mem_len; ... for readability. No functionality change. Signed-off-by: Dou Liyang

[Qemu-devel] [PULL 2/9] ACPI/unit-test: Add a new testcase for RAM allocation in numa node

From: Dou Liyang As QEMU supports the memory-less node, it is possible that there is no RAM in the first numa node(also be called as node0). eg: ... \ -m 128,slots=3,maxmem=1G \ -numa node -numa node,mem=128M \ But, this makes it hard for QEMU to build a

[Qemu-devel] [PULL 0/9] x86 and machine queue, 2017-10-05

The following changes since commit d8f932cc696250cb740240d668b39df5fbb2d5a0: Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' into staging (2017-10-05 16:54:29 +0100) are available in the git repository at: git://github.com/ehabkost/qemu.git

[Qemu-devel] [PULL 3/9] qom/cpu: move cpu_model null check to cpu_class_by_name()

From: Philippe Mathieu-Daudé and clean every implementation. Suggested-by: Eduardo Habkost Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20170917232842.14544-1-f4...@amsat.org> Reviewed-by: Igor Mammedov

Re: [Qemu-devel] [PATCH 13/23] ppc: spapr: define core types statically

On Thu, 5 Oct 2017 18:24:40 +0200 Igor Mammedov wrote: > spapr core type definition doesn't have any fields that > require it to be defined at runtime. So replace code > that fills in TypeInfo at runtime with static TypeInfo > array that does the same at complie time. > >

Re: [Qemu-devel] [PATCH 18/20] target/arm: Implement BLXNS

On 5 October 2017 at 19:56, Richard Henderson wrote: > On 09/22/2017 11:00 AM, Peter Maydell wrote: >> +void HELPER(v7m_blxns)(CPUARMState *env, uint32_t dest) >> +{ > ... >> +if (dest & 1) { >> +/* target is Secure, so this is just a normal BLX, >> +

[Qemu-devel] [PATCH 1/1] hw/ppc/spapr_drc.c: adding drc->dev into detach quiesce condition

In cases where a device is hotplugged and hot-unplugged shortly after, there is a chance of QEMU breaking with the following message: hw/ppc/spapr_drc.c:417:spapr_drc_detach: assertion failed: (drc->dev) Aborted spapr_drc_detach makes a g_assert(drc->dev) to ensure that the following

Re: [Qemu-devel] [PULL v1 10/10] specs: Describe the TPM support in QEMU

On 10/05/2017 12:48 PM, Stefan Berger wrote: This patch adds a description of the current TPM support in QEMU to the specs. Several public specs are referenced via their landing page on the trustedcomputinggroup.org website. Signed-off-by: Stefan Berger Reviewed-by: Laszlo

Re: [Qemu-devel] [Qemu-ppc] [PATCH 12/23] ppc: move '-cpu foo, compat=xxx' parsing into ppc_cpu_parse_featurestr()

On Thu, 5 Oct 2017 18:24:39 +0200 Igor Mammedov wrote: > there is a dedicated callback CPUClass::parse_features > which purpose is to convert -cpu features into a set of > global properties AND deal with compat/legacy features > that couldn't be directly translated into

Re: [Qemu-devel] [PATCH] qemu_opt_print: Remove shadowing opt decl

On 10/05/2017 02:07 PM, Dr. David Alan Gilbert (git) wrote: > From: "Dr. David Alan Gilbert" > > opt was declared as a separate local inside the last loop, > shadowing the local at the top of the function. > > Signed-off-by: Dr. David Alan Gilbert >

[Qemu-devel] [PATCH v3 5/6] block: Perform copy-on-read in loop

Improve our braindead copy-on-read implementation. Pre-patch, we have multiple issues: - we create a bounce buffer and perform a write for the entire request, even if the active image already has 99% of the clusters occupied, and really only needs to copy-on-read the remaining 1% of the clusters

Re: [Qemu-devel] [PATCH 1/1] virtio/pci/migration: Convert to VMState

* Dr. David Alan Gilbert (git) (dgilb...@redhat.com) wrote: > From: "Dr. David Alan Gilbert" > > Convert the 'modern_state' part of virtio-pci to modern migration > macros. Ping. Dave > Signed-off-by: Dr. David Alan Gilbert > --- >

[Qemu-devel] [PATCH v3 6/6] iotests: Add test 197 for covering copy-on-read

Add a test for qcow2 copy-on-read behavior, including exposure for the just-fixed bugs. The copy-on-read behavior is always to a qcow2 image, but the test is careful to allow running with most image protocol/format combos as the backing file being copied from (luks being the exception, as it is

[Qemu-devel] [PATCH] ui/cocoa.m: Fix console selection keys

Fix console selection keys so that the right console is selected. Signed-off-by: John Arbuckle --- ui/cocoa.m | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ui/cocoa.m b/ui/cocoa.m index 93e56d0518..2794f60b27 100644 --- a/ui/cocoa.m +++

[Qemu-devel] [PATCH v3 4/6] block: Add blkdebug hook for copy-on-read

Make it possible to inject errors on writes performed during a read operation due to copy-on-read semantics. Signed-off-by: Eric Blake Reviewed-by: Jeff Cody Reviewed-by: Kevin Wolf Reviewed-by: John Snow Reviewed-by:

[Qemu-devel] [PATCH v3 2/6] block: Uniform handling of 0-length bdrv_get_block_status()

Handle a 0-length block status request up front, with a uniform return value claiming the area is not allocated. Most callers don't pass a length of 0 to bdrv_get_block_status() and friends; but it definitely happens with a 0-length read when copy-on-read is enabled. While we could audit all

[Qemu-devel] [PATCH] qemu_opt_print: Remove shadowing opt decl

From: "Dr. David Alan Gilbert" opt was declared as a separate local inside the last loop, shadowing the local at the top of the function. Signed-off-by: Dr. David Alan Gilbert --- util/qemu-option.c | 2 +- 1 file changed, 1 insertion(+), 1

[Qemu-devel] [PATCH v3 0/6] block: Avoid copy-on-read assertions

During my quest to switch block status to be byte-based, John forced me to evaluate whether we have a situation during copy-on-read where we could exceed BDRV_REQUEST_MAX_BYTES [1]. Sure enough, we have a number of pre-existing bugs in the copy-on-read code. Fix those, along with adding a test.

[Qemu-devel] [PATCH v3 3/6] iotests: Restore stty settings on completion

Executing qemu with a terminal as stdin will temporarily alter stty settings on that terminal (for example, disabling echo), because of how we run both the monitor and any multiplexing with guest input. Normally, qemu restores the original settings on exit; but if an iotest triggers qemu to abort

[Qemu-devel] [PATCH v3 1/6] qemu-io: Add -C for opening with copy-on-read

Make it easier to enable copy-on-read during iotests, by exposing a new bool option to main and open. Signed-off-by: Eric Blake Reviewed-by: Jeff Cody Reviewed-by: Kevin Wolf Reviewed-by: John Snow Reviewed-by: Stefan

Re: [Qemu-devel] [PATCH 20/20] nvic: Add missing code for writing SHCSR.HARDFAULTPENDED bit

On 09/22/2017 11:00 AM, Peter Maydell wrote: > When we added support for the new SHCSR bits in v8M in commit > 437d59c17e9 the code to support writing to the new HARDFAULTPENDED > bit was accidentally only added for non-secure writes; the > secure banked version of the bit should also be writable.

Re: [Qemu-devel] [PATCH 19/20] target/arm: Implement secure function return

On 09/22/2017 11:00 AM, Peter Maydell wrote: > Secure function return happens when a non-secure function has been > called using BLXNS and so has a particular magic LR value (either > 0xfefe or 0xfeff). The function return via BX behaves > specially when the new PC value is this magic

Re: [Qemu-devel] [PATCH 18/20] target/arm: Implement BLXNS

On 09/22/2017 11:00 AM, Peter Maydell wrote: > +void HELPER(v7m_blxns)(CPUARMState *env, uint32_t dest) > +{ ... > +if (dest & 1) { > +/* target is Secure, so this is just a normal BLX, > + * except that the low bit doesn't indicate Thumb/not. > + */ > +

Re: [Qemu-devel] [PATCH 17/20] target/arm: Implement SG instruction

On 10/05/2017 02:55 PM, Peter Maydell wrote: > Oops. I missed this in my testing because it happens that the > two halves of an SG instruction are the same value :-) Hah. I didn't notice that either. r~

Re: [Qemu-devel] [PATCH 17/20] target/arm: Implement SG instruction

On 5 October 2017 at 19:50, Richard Henderson wrote: > On 09/22/2017 11:00 AM, Peter Maydell wrote: >> Implement the SG instruction, which we emulate 'by hand' in the >> exception handling code path. >> >> Signed-off-by: Peter Maydell >>

Re: [Qemu-devel] [PATCH 17/20] target/arm: Implement SG instruction

On 09/22/2017 11:00 AM, Peter Maydell wrote: > Implement the SG instruction, which we emulate 'by hand' in the > exception handling code path. > > Signed-off-by: Peter Maydell > --- > target/arm/helper.c | 129 > ++-- >

[Qemu-devel] [PATCH] Make scrolling work again

Make scrolling in the monitor work. Signed-off-by: John Arbuckle --- ui/cocoa.m | 88 +++--- 1 file changed, 56 insertions(+), 32 deletions(-) diff --git a/ui/cocoa.m b/ui/cocoa.m index 93e56d0518..5545c42b9c

Re: [Qemu-devel] [PATCH 16/20] target/arm: Factor out "get mmuidx for specified security state"

On 09/22/2017 11:00 AM, Peter Maydell wrote: > For the SG instruction and secure function return we are going > to want to do memory accesses using the MMU index of the CPU > in secure state, even though the CPU is currently in non-secure > state. Write arm_v7m_mmu_idx_for_secstate() to do this

Re: [Qemu-devel] [PATCH 15/20] target/arm: Fix calculation of secure mm_idx values

On 09/22/2017 11:00 AM, Peter Maydell wrote: > In cpu_mmu_index() we try to do this: > if (env->v7m.secure) { > mmu_idx += ARMMMUIdx_MSUser; > } > but it will give the wrong answer, because ARMMMUIdx_MSUser > includes the 0x40 ARM_MMU_IDX_M field, and so does the >

Re: [Qemu-devel] [PATCH 14/20] target/arm: Implement security attribute lookups for memory accesses

On 09/22/2017 11:00 AM, Peter Maydell wrote: > Implement the security attribute lookups for memory accesses > in the get_phys_addr() functions, causing these to generate > various kinds of SecureFault for bad accesses. > > The major subtlety in this code relates to handling of the > case when the

Re: [Qemu-devel] [PATCH 11/23] ppc: spapr: replace ppc_cpu_parse_features() with cpu_parse_cpu_model()

On Thu, 5 Oct 2017 18:24:38 +0200 Igor Mammedov wrote: > ppc_cpu_parse_features() is doing practically the same thing as > generic cpu_parse_cpu_model(). So remove duplicated impl. and > reuse generic one. > > Signed-off-by: Igor Mammedov > ---

Re: [Qemu-devel] [PATCH 13/20] nvic: Implement Security Attribution Unit registers

On 09/22/2017 11:00 AM, Peter Maydell wrote: > Implement the register interface for the SAU: SAU_CTRL, > SAU_TYPE, SAU_RNR, SAU_RBAR and SAU_RLAR. None of the > actual behaviour is implemented here; registers just > read back as written. > > When the CPU definition for Cortex-M33 is eventually >

Re: [Qemu-devel] [PATCH 12/20] target/arm: Add v8M support to exception entry code

On 09/22/2017 10:59 AM, Peter Maydell wrote: > Add support for v8M and in particular the security extension > to the exception entry code. This requires changes to: > * calculation of the exception-return magic LR value > * push the callee-saves registers in certain cases > * clear registers

Re: [Qemu-devel] Qemu Documentation

On 10/05/2017 12:03 AM, Swetheendra Tallamraju wrote: > I am working on qemu source code to provide extra functionality of > emulating virtual usb. Can I get any documentation for the qemu source > code that helps me in implementing this? > The docs in source code and in the docs/ folder are

Re: [Qemu-devel] [PATCH v2 0/2] ui/cocoa.m: enable guest to see control-alt key combinations

Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20171005145557.5746-1-programmingk...@gmail.com Subject: [Qemu-devel] [PATCH v2 0/2] ui/cocoa.m: enable guest to see control-alt key combinations === TEST SCRIPT BEGIN ===

Re: [Qemu-devel] [PATCH v2 0/4] blockjobs: add explicit job reaping

Nikolay: You mentioned a while ago that you had issues with incremental backup's eventual return status being unknown. Can you please elaborate for me why this is a problem? I assume due to the long running of a backup job it's entirely possible to imagine losing connection to QEMU and missing

Re: [Qemu-devel] [PATCH] virtio: fix descriptor counting in virtqueue_pop

Hi, has somebody reviewed this patch ? I'm also able de reproduce the vm crash like the proxmox user. This patch is fixing it for me too. Regards, Alexandre - Mail original - De: "Wolfgang Bumiller" À: "qemu-devel" Cc: "pbonzini"

Re: [Qemu-devel] [PATCH 11/20] target/arm: Add support for restoring v8M additional state context

On 09/22/2017 10:59 AM, Peter Maydell wrote: > For v8M, exceptions from Secure to Non-Secure state will save > callee-saved registers to the exception frame as well as the > caller-saved registers. Add support for unstacking these > registers in exception exit when necessary. > > Signed-off-by:

Re: [Qemu-devel] [PATCH v2 33/40] sparc: sparc: use generic cpu_model parsing

On 05/10/17 14:51, Igor Mammedov wrote: > Signed-off-by: Igor Mammedov > Reviewed-by: Philippe Mathieu-Daudé > Tested-by: Philippe Mathieu-Daudé > --- > CC: mark.cave-ayl...@ilande.co.uk > CC: atar4q...@gmail.com > --- > hw/sparc/sun4m.c

[Qemu-devel] [PATCH v2 3/3] scripts: Remove debug parameter from QEMUMachine

All scripts that use the QEMUMachine and QEMUQtestMachine classes (device-crash-test, tests/migration/*, iotests.py, basevm.py) already configure logging. The basicConfig() call inside QEMUMachine.__init__() is being kept just to make sure a script would still work if it didn't configure logging.

[Qemu-devel] [PATCH v2 1/3] guestperf: Configure logging on all shell frontends

The logging module will eventually replace the 'debug' parameter in QEMUMachine and QEMUMonitorProtocol. Cc: Daniel P. Berrange Signed-off-by: Eduardo Habkost --- Changes v1 -> v2: * Inline init_logging() method on all callers because not all classes

[Qemu-devel] [PATCH v2 2/3] scripts: Remove debug parameter from QEMUMonitorProtocol

Use logging module for the QMP debug messages. The only scripts that set debug=True are iotests.py and guestperf/engine.py, and they already call logging.basicConfig() to set up logging. Scripts that don't configure logging are safe as long as they don't need debugging output, because debug

[Qemu-devel] [PATCH v2 0/3] scripts: Remove 'debug' parameter from QEMUMachine & QEMUMonitorProtocol

Changes v1 -> v2: * Rebased to python-next (some patches from v1 are already queued there)S * guestperf: Inline init_logging() method on all callers because not all classes derive from BaseShell (reported by Lukáš Doktor) This series removes the 'debug' parameter from QEMUMachine and

Re: [Qemu-devel] [PATCH 10/20] target/arm: Update excret sanity checks for v8M

On 09/22/2017 10:59 AM, Peter Maydell wrote: > In v8M, more bits are defined in the exception-return magic > values; update the code that checks these so we accept > the v8M values when the CPU permits them. > > Signed-off-by: Peter Maydell > --- > target/arm/helper.c

[Qemu-devel] [REBASED 2/2] exec: simplify address_space_get_iotlb_entry

From: Peter Xu This patch let address_space_get_iotlb_entry() to use the newly introduced page_mask parameter in flatview_do_translate(). Then we will be sure the IOTLB can be aligned to page mask, also we should nicely support huge pages now when introducing a764040. Fixes:

Re: [Qemu-devel] [PATCH 1/2] qdev_monitor: Simplify error handling in qdev_device_add()

On Thu, Oct 05, 2017 at 03:59:12PM +0200, Igor Mammedov wrote: > On Thu, 5 Oct 2017 14:32:17 +0200 > Thomas Huth wrote: > > > Instead of doing the clean-ups on errors multiple times, introduce > > a jump label at the end of the function that can be used by all > > error paths

[Qemu-devel] [REBASED 1/2] exec: add page_mask for flatview_do_translate

From: Peter Xu The function is originally used for flatview_space_translate() and what we care about most is (xlat, plen) range. However for iotlb requests, we don't really care about "plen", but the size of the page that "xlat" is located on. While, plen cannot really contain

[Qemu-devel] [REBASED 0/2] exec: further refine address_space_get_iotlb_entry()

This series is a rebase of the first two patches of Peter's series improving address_space_get_iotlb_entry(): Message-Id: <1496404254-17429-1-git-send-email-pet...@redhat.com> It is actually not only an improvement, but fixes a regression in the way IOTLB updates sent to the backends are

Re: [Qemu-devel] [PATCH v1 3/5] xlnx-zcu102: Specify the valid CPUs

On Thu, Oct 05, 2017 at 11:04:27AM +0200, Igor Mammedov wrote: > On Wed, 4 Oct 2017 14:39:20 -0700 > Alistair Francis wrote: > > > On Wed, Oct 4, 2017 at 9:34 AM, Eduardo Habkost wrote: > > > On Wed, Oct 04, 2017 at 03:08:16PM +0200, Igor

Re: [Qemu-devel] [Qemu-arm] [PATCH v4 0/5] virtio-iommu: VFIO integration

Hi Linu, On 05/10/2017 14:13, Auger Eric wrote: > Hi Linu, > > On 05/10/2017 13:54, Auger Eric wrote: >> Hi Linu, >> On 05/10/2017 12:46, Auger Eric wrote: >>> Hi Linu, >>> On 04/10/2017 13:49, Linu Cherian wrote: Hi Eric, On Wed Sep 27, 2017 at 11:24:01AM +0200, Auger Eric

[Qemu-devel] [PATCH 1/2] spapr/rtas: disable the decrementer interrupt when a CPU is unplugged

When a CPU is stopped with the 'stop-self' RTAS call, its state 'halted' is switched to 1 and, in this case, the MSR is not taken into account anymore in the cpu_has_work() routine. Only the pending hardware interrupts are checked with their LPCR:PECE* enablement bit. If the DECR timer fires

Re: [Qemu-devel] [PULL v1 00/10] Merge tpm 2017/10/04

On 5 October 2017 at 17:54, Stefan Berger wrote: > On 10/05/2017 12:53 PM, Peter Maydell wrote: >> Hi; this pull request appears to be signed with a gpg key that >> isn't signed by anybody else... Are there other people you work >> with at IBM who can verify your id

[Qemu-devel] [PULL v1 10/10] specs: Describe the TPM support in QEMU

This patch adds a description of the current TPM support in QEMU to the specs. Several public specs are referenced via their landing page on the trustedcomputinggroup.org website. Signed-off-by: Stefan Berger Reviewed-by: Laszlo Ersek --- docs/specs/tpm.txt |

Re: [Qemu-devel] [PULL v1 00/10] Merge tpm 2017/10/04

On 10/05/2017 12:53 PM, Peter Maydell wrote: On 5 October 2017 at 17:48, Stefan Berger wrote: The following changes since commit d147f7e815f97cb477e223586bcb80c316ae10ea: Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging (2017-10-03

Re: [Qemu-devel] [PATCH v4 1/2] virtio: introduce `query-virtio' QMP command

On 10/04/2017 07:00 PM, Eric Blake wrote: > On 10/04/2017 09:26 AM, Jan Dakinevich wrote: > >> +{ >> +'struct': 'VirtioInfo', >> +'data': { >> +'feature-names': ['VirtioInfoBit'], > > Why is feature-names listed at two different nestings of the return

[Qemu-devel] [PULL v1 02/10] tpm-backend: Move thread handling inside TPMBackend

From: Amarnath Valluri Move thread handling inside TPMBackend, this way backend implementations need not to maintain their own thread life cycle, instead they needs to implement 'handle_request()' class method that always been called from a thread. This change made

Re: [Qemu-devel] [PULL v1 00/10] Merge tpm 2017/10/04

On 5 October 2017 at 17:48, Stefan Berger wrote: > The following changes since commit d147f7e815f97cb477e223586bcb80c316ae10ea: > > Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into > staging (2017-10-03 16:27:24 +0100) > > are available in the

[Qemu-devel] [PULL v1 08/10] tpm: Added support for TPM emulator

From: Amarnath Valluri This change introduces a new TPM backend driver that can communicate with swtpm(software TPM emulator) using unix domain socket interface. QEMU talks to the TPM emulator using QEMU's socket-based chardev backend device. Swtpm uses two Unix

[Qemu-devel] [PATCH 2/2] spapr/rtas: do not reset the MSR in stop-self command

When a CPU is stopped with the 'stop-self' RTAS call, its state 'halted' is switched to 1 and, in this case, the MSR is not taken into account anymore in the cpu_has_work() routine. Only the pending hardware interrupts are checked with their LPCR:PECE* enablement bit. The CPU is now also

[Qemu-devel] [PULL v1 05/10] tpm-backend: Add new API to read backend TpmInfo

From: Amarnath Valluri TPM configuration options are backend implementation details and shall not be part of base TPMBackend object, and these shall not be accessed directly outside of the class, hence added a new interface method, get_tpm_options() to TPMDriverOps.,

[Qemu-devel] [PATCH 0/2] disable the decrementer interrupt when a CPU is unplugged

Hello, When a CPU is stopped with the 'stop-self' RTAS call, its state 'halted' is switched to 1 and, in this case, the MSR is not taken into account anymore in the cpu_has_work() routine. Only the pending hardware interrupts are checked with their LPCR:PECE* enablement bit. If the DECR timer

[Qemu-devel] [PULL v1 07/10] tpm-passthrough: move reusable code to utils

From: Amarnath Valluri Signed-off-by: Amarnath Valluri Reviewed-by: Stefan Berger Reviewed-by: Marc-André Lureau Signed-off-by: Stefan Berger ---

[Qemu-devel] [PATCH] specs: Extend TPM spec with TPM emulator description

Following the recent extension of QEMU with a TPM emulator device, update the specs describing for how to interact with the device. The results of commands run inside a Linux VM are expected to be similar to those when the TPM passthrough device is used, so we just reuse that. Fix a typo on the

[Qemu-devel] [PULL v1 09/10] tpm: Move tpm_cleanup() to right place

From: Amarnath Valluri As Emulator TPM backend uses chardev, tpm cleanup should happen before chardev similar to other vhost-users. Signed-off-by: Amarnath Valluri Reviewed-by: Stefan Berger Signed-off-by:

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