Thanks for replying.
Indeed, the problem comes from the caller. I guest
some code should be reconsidered in blk_remove_bs
and blk_delete, especially with throttling.
Secondly, when handling drive_del in hmp_drive_del,
throttle_timers_detach_aio_context() is called
first time in blk_remove_bs
On 20 October 2017 at 19:15, Richard Henderson wrote:
> On 10/20/2017 10:56 AM, Peter Maydell wrote:
>> +if (s->be_data) {
>> +tcg_gen_extr_i64_i32(tmp2, tmp, t64);
>> +} else {
>> +tcg_gen_extr_i64_i32(tmp, tmp2, t64);
>> +}
>
> The test against be_
On 20 October 2017 at 20:08, Stefan Weil wrote:
> Am 20.10.2017 um 20:24 schrieb alind...@codeaurora.org:
>> On 2017-10-20 05:27, Peter Maydell wrote:
>>> Do we even need this code at all? As far as I can tell from
>>> the git logs, the idea is to support users who hand-modify
>>> config-devices.m
When a section with non-0 offset_within_region field is tested to
cover an address the offset should be taken into account as well.
This fixes a crash caused by picking the wrong memory region in
address_space_lookup_region seen with client code accessing a device
model that uses alias memory regi
Add support HMB(Host Memory Block) with feature commands(Get Feature, Set
Feature).
nvme-4.14 tree supports HMB features.
This patch will make nvme controller to return 32MiB preferred size of HMB to
host via identify command.
Set Feature, Get Feature implemented for HMB.
Signed-off-by: Minwoo I
Peter Maydell writes:
> On 15 October 2017 at 17:30, Lluís Vilanova wrote:
>> Thinking about it, shouldn't this always be the same given QEMU's TLB/page
>> table
>> consistency assurances?
> What TLB/page table consistency assurances? For ARM at least
> we will only update (ie flush) the TLB wh
** Attachment added: "Used with other VNC servers.jpg"
https://bugs.launchpad.net/qemu/+bug/1725707/+attachment/4982277/+files/Used%20with%20other%20VNC%20servers.jpg
** Description changed:
Description of problem
-
In my latest topic, I reported a bug relate to
** Attachment added: "Used with QEMU.jpg"
https://bugs.launchpad.net/qemu/+bug/1725707/+attachment/4982276/+files/Used%20with%20QEMU.jpg
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1725707
Titl
Public bug reported:
Description of problem
-
In my latest topic, I reported a bug relate to QEMU's websocket:
https://bugs.launchpad.net/qemu/+bug/1718964
It has been fixed but someone mentioned that he met the same problem when using
QEMU with a standalone websocket pro
Hi,
This series failed build test on s390x host. Please find the details below.
Type: series
Subject: [Qemu-devel] [PATCH v6 0/9] Support the Capstone disassembler
Message-id: 20171019155146.30434-1-richard.hender...@linaro.org
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be invok
On 21 October 2017 at 15:05, Lluís Vilanova wrote:
> Peter Maydell writes:
>
>> On 15 October 2017 at 17:30, Lluís Vilanova wrote:
>>> Thinking about it, shouldn't this always be the same given QEMU's TLB/page
>>> table
>>> consistency assurances?
>
>> What TLB/page table consistency assurances?
Peter Maydell writes:
> On 21 October 2017 at 15:05, Lluís Vilanova wrote:
>> Peter Maydell writes:
>>
>>> On 15 October 2017 at 17:30, Lluís Vilanova wrote:
Thinking about it, shouldn't this always be the same given QEMU's TLB/page
table
consistency assurances?
>>
>>> What TLB
Hi,
This patch series starts by adding support in m25p80 for continous
read out of status registers, SST flash READ ID commands, bank address register
accesses, bulk erase (0x60) and two Numonyx flashes (n25q512a11 and
n25q512a13). Thereafter it updates the striping behaviour to be bit big endiann
Add support for continuous read out of the RDSR and READ_FSR status
registers until the chip select is deasserted.
Signed-off-by: Francisco Iglesias
---
hw/block/m25p80.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index a2438b
Add support for Micron (Numonyx) n25q512a11 and n25q512a13 flashes.
Signed-off-by: Francisco Iglesias
---
hw/block/m25p80.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index 3d2975c..7f3fcc4 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@
On Fri, 20 Oct 2017, Peter Maydell wrote:
> On 19 October 2017 at 21:56, Stefano Stabellini
> wrote:
> > On Thu, 19 Oct 2017, Peter Maydell wrote:
> >> On 18 October 2017 at 23:03, Stefano Stabellini
> >> wrote:
> >> > WFI/E are 4 bytes long: set ARM_EL_IL_SHIFT in the syndrome.
> >> >
> >> > S
WFI/E are often, but not always, 4 bytes long. When they are, we need to
set ARM_EL_IL_SHIFT in the syndrome register.
Pass the instruction length to HELPER(wfi), use it to decrement pc
appropriately and to pass an is_16bit flag to syn_wfx, which sets
ARM_EL_IL_SHIFT if needed.
Signed-off-by: Ste
Hi,
This series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Type: series
Message-id: alpine.DEB.2.10.1710211105550.27209@sstabellini-ThinkPad-X260
Subject: [Qemu-devel] [PATCH v2] fix WF
On 10/20/2017 05:24 PM, no-re...@patchew.org wrote:
> This series failed build test on s390x host. Please find the details below.
...
> /var/tmp/patchew-tester-tmp-yebrjc4i/src/accel/tcg/cputlb.c:1105:0: fatal
> error: error writing to /tmp/ccuQ6F0N.s: No space left on device
Please fix this or d
On 10/21/2017 03:17 AM, Peter Maydell wrote:
>>> -gen_aa32_frob64(s, o64);
>>> +if (s->be_data) {
>>> +tcg_gen_rotri_i64(o64, o64, 32);
>>> +}
>>> tcg_gen_setcond_i64(TCG_COND_NE, o64, o64, cpu_exclusive_val);
>>
>> We're not splitting o64 to parts. Are
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 1508431916-9412-1-git-send-email-ian.jack...@eu.citrix.com
Subject: [Qemu-devel] [PATCH v5 0/8] xen: xen-domid-restrict improvements
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BA
Hi,
This series failed build test on s390x host. Please find the details below.
Type: series
Subject: [Qemu-devel] [PATCH v2] fix WFI/WFE length in syndrome register
Message-id: alpine.DEB.2.10.1710211105550.27209@sstabellini-ThinkPad-X260
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script w
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
disas.c | 33 -
monitor.c | 5 -
target/ppc/translate.c | 5 +
target/ppc/tra
Changes since v7:
* Included target/arm disassembler changes, since one of them
is affected by the Capstone change.
* Re-re-redone the module patch (11/11);
v6 didn't actually work without capstone present in any form.
r~
Richard Henderson (11):
target/i386: Convert to disas_set_i
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
disas.c | 22 ++
monitor.c | 21 -
target/i386/cpu.c | 12
target/i386/tr
The Capstone disassembler has its own big-endian fixup.
Doing this twice does not work, of course. Move our current
fixup from target/arm/cpu.c to disas/arm.c.
This makes read_memory_inner_func unused and can be removed.
Signed-off-by: Richard Henderson
---
include/disas/bfd.h | 7 ---
di
Now that every target is using the disas_set_info hook,
the flags argument is unused. Remove it.
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
include/disas/disas.h | 4 ++--
include/exec/log.h
If configured, prefer this over our rather dated copy of the
GPLv2-only binutils. This will be especially apparent with
the proposed vector extensions to TCG, as disas/i386.c does
not handle AVX.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/disas/bfd.h
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
disas.c | 4
target/i386/cpu.c | 7 +++
2 files changed, 11 insertions(+)
diff --git a/disas.c b/disas.c
index e392a2926e..63dc573e9f 100644
-
This matches translator behaviour in arm_lduw_code.
Fixes: https://bugs.launchpad.net/qemu/+bug/1724485
Signed-off-by: Richard Henderson
---
target/arm/cpu.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 82dad0b721..a92d86f
Even though there is only one monitor, and thus no race on this
global data object, there is also no point in having it. We can
just as well record the decision in the read_memory_function that
we select.
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Be
Cc: qemu-...@nongnu.org
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
disas.c | 4
target/ppc/translate_init.c | 6 ++
2 files changed, 10 insertions(+)
diff --git a/disas.c b/disas.c
index 8d9bd4901c..e52e776a60 100644
--- a/disas.c
+++ b
Tested-by: Alex Bennée
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
disas.c | 3 +++
target/arm/cpu.c | 21 ++---
2 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/di
Do not require the submodule, but use it if present. Allow the
command-line to override system or git submodule either way.
Signed-off-by: Richard Henderson
---
Makefile| 13 +
.gitmodules | 3 +++
capstone| 1 +
configure | 60 +++
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20171022004621.28372-1-richard.hender...@linaro.org
Subject: [Qemu-devel] [PATCH v7 00/11] Support the Capstone disassembler
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
Hi,
This series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 20171022004621.28372-1-richard.hender...@linaro.org
Subject: [Qemu-devel] [PATCH v7 00/11] Support th
Hi,
This series failed build test on s390x host. Please find the details below.
Message-id: 20171022004621.28372-1-richard.hender...@linaro.org
Subject: [Qemu-devel] [PATCH v7 00/11] Support the Capstone disassembler
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be inv
Hi,
This patch series starts by adding support in m25p80 for continous
read out of status registers, SST flash READ ID commands, bank address register
accesses, bulk erase (0x60) and two Numonyx flashes (n25q512a11 and
n25q512a13). Thereafter it updates the striping behaviour to be bit big endiann
Add support for the bank address register access commands (BRRD/BRWR) and
the BULK_ERASE (0x60) command.
Signed-off-by: Francisco Iglesias
---
hw/block/m25p80.c | 20
1 file changed, 20 insertions(+)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index c85e8fa..3d2975c
Add support for SST READ ID 0x90/0xAB commands for reading out the flash
manufacuter ID and device ID.
Signed-off-by: Francisco Iglesias
---
hw/block/m25p80.c | 20
1 file changed, 20 insertions(+)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index 2971519..c85e8fa 10
Update striping functionality to be big-endian bit order and output even
bits into lower memory and odd bits into upper.
Signed-off-by: Francisco Iglesias
---
hw/ssi/xilinx_spips.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/hw/ssi/xilinx_spips.c b/hw
Add support for Micron (Numonyx) n25q512a11 and n25q512a13 flashes.
Signed-off-by: Francisco Iglesias
---
hw/block/m25p80.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index 3d2975c..7f3fcc4 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@
Add support for continuous read out of the RDSR and READ_FSR status
registers until the chip select is deasserted.
Signed-off-by: Francisco Iglesias
---
hw/block/m25p80.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index a2438b
Move the FlashCMD enum, XilinxQSPIPS and XilinxSPIPSClass structures to the
header for consistency. Also move out a define and remove two dubbel included
headers (while touching the code). Finally, add 4 byte address commands to the
FlashCMD enum.
Signed-off-by: Francisco Iglesias
---
hw/ssi/xil
Add support for the Zynq Ultrascale MPSoc Generic QSPI.
Signed-off-by: Francisco Iglesias
---
default-configs/arm-softmmu.mak | 1 +
hw/ssi/xilinx_spips.c | 510
include/hw/ssi/xilinx_spips.h | 31 ++-
3 files changed, 494 insertions(+), 48
Input into the transmition fifo (and output from the recieve fifo) according
the configured endianess in the configuration register.
Signed-off-by: Francisco Iglesias
---
hw/ssi/xilinx_spips.c | 68 ++-
1 file changed, 40 insertions(+), 28 deletion
Add support for 4 byte addresses in the LQSPI and correct LQSPI_CFG_SEP_BUS.
Signed-off-by: Francisco Iglesias
---
hw/ssi/xilinx_spips.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index c858a6c..c360af7 100644
--- a/hw/s
Add support for the ZynqMP QSPI and connect Numonyx n25q512a11 flashes
to it.
Signed-off-by: Francisco Iglesias
---
hw/arm/xlnx-zcu102.c | 23 +++
hw/arm/xlnx-zynqmp.c | 24
include/hw/arm/xlnx-zynqmp.h | 5 +
3 files changed, 52
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20171020232023.15010-1-richard.hender...@linaro.org
Subject: [Qemu-devel] [PATCH v7 00/52] tcg queued patches
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git
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