From: Alex Bennée
Neither of these operations alter the floating point status registers
so we can do a pure bitwise operation, either squashing any sign
bit (ABS) or inverting it (NEG).
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
From: Alex Bennée
As the rounding mode is now split between FP16 and the rest of
floating point we need to be explicit when tweaking it. Instead of
passing the CPU env we now pass the appropriate fpst pointer directly.
Signed-off-by: Alex Bennée
From: Alex Bennée
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Message-id: 20180227143852.11175-4-alex.ben...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/cpu.h | 1
From: Alistair Francis
I am leaving Xilinx, so to avoid having an email address that bounces
update my maintainer address to point to my personal email address.
Signed-off-by: Alistair Francis
Signed-off-by: Alistair Francis
From: Alex Bennée
The fprintf is only there for debugging as the skeleton is added to,
it will be removed once the skeleton is complete.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Message-id:
From: Alex Bennée
As some of the constants here will also be needed
elsewhere (specifically for the upcoming SVE support) we move them out
to softfloat.h.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
From: Alex Bennée
This covers all the floating point convert operations.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Message-id: 20180227143852.11175-19-alex.ben...@linaro.org
Signed-off-by: Peter
From: Alex Bennée
This includes FMOV, FABS, FNEG, FSQRT and FRINT[NPMZAXI]. We re-use
existing helpers to achieve this.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Message-id:
From: Francisco Iglesias
Use 8 dummy cycles (4 dummy bytes) with the QIOR/QIOR4 commands in legacy mode
for matching what is expected by Micron (Numonyx) flashes (the default target
flash type of the QSPI).
Signed-off-by: Francisco Iglesias
From: Alex Bennée
This adds the full range of half-precision floating point to integral
instructions.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Message-id:
From: Alex Bennée
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Message-id: 20180227143852.11175-12-alex.ben...@linaro.org
Signed-off-by: Peter Maydell
---
From: Alex Bennée
This includes FMAXNMP, FADDP, FMAXP, FMINNMP, FMINP.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Message-id: 20180227143852.11175-14-alex.ben...@linaro.org
Signed-off-by: Peter
From: Linus Walleij
This adds support for emulating the Silicon Image SII9022 DVI/HDMI
bridge. It's not very clever right now, it just acknowledges
the switch into DDC I2C mode and back. Combining this with the
existing DDC I2C emulation gives the right behavior on the
From: Alistair Francis
Ensure that the post write hook is called during reset. This allows us
to rely on the post write functions instead of having to call them from
the reset() function.
Signed-off-by: Alistair Francis
Reviewed-by:
From: Linus Walleij
The tx function of the DDC I2C slave emulation was returning 1
on all writes resulting in NACK in the I2C bus. Changing it to
0 makes the DDC I2C work fine with bit-banged I2C such as the
versatile I2C.
I guess it was not affecting whatever I2C
From: Corey Minyard
Some devices need access to it.
Signed-off-by: Corey Minyard
Reviewed-by: Peter Maydell
Signed-off-by: Linus Walleij
Message-id: 20180227104903.21353-3-linus.wall...@linaro.org
From: Alex Bennée
This actually covers two different sections of the encoding table:
Advanced SIMD scalar two-register miscellaneous FP16
Advanced SIMD two-register miscellaneous (FP16)
The difference between the two is covered by a combination of Q (bit
30) and S
From: Linus Walleij
This adds the SiI9022 (and implicitly EDID I2C) device to the ARM
Versatile Express machine, and selects the two I2C devices necessary
in the arm-softmmu.mak configuration so everything will build
smoothly.
I am implementing proper handling of the
From: Alex Bennée
These use the generic float16_compare functionality which in turn uses
the common float_compare code from the softfloat re-factor.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
From: Corey Minyard
Signed-off-by: Corey Minyard
Reviewed-by: Peter Maydell
Signed-off-by: Linus Walleij
Message-id: 20180227104903.21353-2-linus.wall...@linaro.org
Signed-off-by: Peter Maydell
From: Alex Bennée
This allows us to explicitly pass float16 to helpers rather than
assuming uint32_t and dealing with the result. Of course they will be
passed in i32 sized registers by default.
Signed-off-by: Alex Bennée
Reviewed-by: Richard
From: Alex Bennée
This is the initial decode skeleton for the Advanced SIMD three same
instruction group.
The fprintf is purely to aid debugging as the additional instructions
are added. It will be removed once the group is complete.
Signed-off-by: Alex Bennée
From: Francisco Iglesias
Assert only the lower cs on bus 0 and upper cs on bus 1 when both buses and
chip selects are enabled (e.g reading/writing with stripe).
Signed-off-by: Francisco Iglesias
Reviewed-by: Alistair Francis
From: Alex Bennée
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Message-id: 20180227143852.11175-3-alex.ben...@linaro.org
[PMM: postpone actually enabling feature until end of the
patch series]
From: Alex Bennée
This implements the half-precision variants of the across vector
reduction operations. This involves a re-factor of the reduction code
which more closely matches the ARM ARM order (and handles 8 element
reductions).
Signed-off-by: Alex Bennée
From: Alex Bennée
Half-precision flush to zero behaviour is controlled by a separate
FZ16 bit in the FPCR. To handle this we pass a pointer to
fp_status_fp16 when working on half-precision operations. The value of
the presented FPCR is calculated from an amalgam of the
/usb-20180227-pull-request'
into staging (2018-02-27 17:50:46 +)
are available in the Git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20180301
for you to fetch changes up to c22e580c2ad1cccef582e1490e732f254d4ac064:
MAINTAINERS: Update my email
From: Alex Bennée
We do implement all the opcodes.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Message-id: 20180227143852.11175-8-alex.ben...@linaro.org
Signed-off-by: Peter Maydell
On 01/03/2018 11:59, Cornelia Huck wrote:
>>>
>>> Signed-off-by: Julia Suvorova
>> What about adding a warning for basename()/dirname() usage in
>> scripts/checkpatch.pl ?
> +1 to that.
>
Good idea indeed. Julia, would you like to send a second patch that
adds the warning?
On 01/03/2018 08:08, Julia Suvorova wrote:
> +static void free_progname(void)
> +{
> +g_free(progname);
> +}
> +
> static void GCC_FMT_ATTR(2, 3) readline_printf_func(void *opaque,
> const char *fmt, ...)
> {
> @@ -504,7 +509,8 @@ int
Le 01/03/2018 à 12:15, Shea Levy a écrit :
> Signed-off-by: Shea Levy
> ---
> linux-user/syscall.c | 5 +
> linux-user/syscall_defs.h | 41 +++--
> 2 files changed, 24 insertions(+), 22 deletions(-)
>
Reviewed-by: Laurent Vivier
On 01.03.2018 11:27, Cornelia Huck wrote:
> On Thu, 1 Mar 2018 10:12:53 +
> Peter Maydell wrote:
>
>> On 27 February 2018 at 13:21, Cornelia Huck wrote:
>>> The following changes since commit 0a773d55ac76c5aa89ed9187a3bc5af8c5c2a6d0:
>>>
>>>
Signed-off-by: Shea Levy
---
linux-user/syscall.c | 5 +
linux-user/syscall_defs.h | 41 +++--
2 files changed, 24 insertions(+), 22 deletions(-)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index
On 03/01/2018 10:24 AM, Dr. David Alan Gilbert wrote:
> * Thomas Huth (th...@redhat.com) wrote:
>> On 28.02.2018 20:53, Christian Borntraeger wrote:
>>> When a guests reboots with diagnose 308 subcode 3 it requests the memory
>>> to be cleared. We did not do it so far. This does not only violate
This patch introduces a framework to manage PASID tagged AddressSpace
in Intel vIOMMU emulator. PASID tagged AddressSpace is an address sapce
which is an abstract of guest process address space in Qemu. The
management framework is as below:
s->pasid_as_list
/|\ \
This patch intoduces PCISVAOps for virt-SVA.
So far, to setup virt-SVA for assigned SVA capable device, needs to
config host translation structures. e.g. for VT-d, needs to set the
guest pasid table to host and enable nested translation. Besides,
vIOMMU emulator needs to forward guest's cache
This patch adds pci_device_notify_iommu() for notify virtual IOMMU
emulator when assigned device is added. And adds a new notify_func
in PCIBus. vIOMMU emulator provides the instance of this notify_func.
Reason:
When virtual IOMMU is exposed to guest, vIOMMU emulator needs to
programm host IOMMU
From: Peter Xu
IOMMU notifiers before are mostly used for [dev-]IOTLB stuffs. It is not
suitable for other kind of notifiers (one example would be the future
virt-svm support). Considering that current notifiers are targeted for
per memory region, renaming the iommu notifier
This patch records assigned devices in a list within Intel vIOMMU
emulator. The recorded info can be used to filter out affect assigned
devices when Qemu captured guest's cache invalidate request.
Signed-off-by: Liu, Yi L
---
hw/i386/intel_iommu.c | 31
Hi Frederic,
On 03/01/2018 07:02 AM, KONRAD Frederic wrote:
> We often use a bootloader for this board. So lets set the uart in a state
> which it can emit characters as if we were using a bootloader.
>
> Signed-off-by: KONRAD Frederic
> ---
>
This patch shows how sva notifier is registered. And provided
an example by registering notify func for tlb flush propagation.
Signed-off-by: Liu, Yi L
---
hw/vfio/pci.c | 55 +--
1 file changed, 53 insertions(+), 2
VFIO is the bridge for vIOMMU and host IOMMU. Needs to provide API
for vIOMMU emulator to set configs to host IOMMU. In this patchset,
such API is exposed in hw/pci.
Signed-off-by: Liu, Yi L
---
hw/vfio/pci.c | 30 ++
1 file changed, 30
On Thu, 1 Mar 2018 10:47:42 +0100
Marc-André Lureau wrote:
> Hi
>
> On Thu, Mar 1, 2018 at 8:08 AM, Julia Suvorova via Qemu-devel
> wrote:
> > basename(3) and dirname(3) modify their argument and may return
> > pointers to statically allocated
This patch shows the idea of how a device is binded to a PASID tagged
AddressSpace.
when Intel vIOMMU emulator detected a pasid table entry programming
from guest. Intel vIOMMU emulator firstly finds a VTDPASIDAddressSpace
with the pasid field of pasid cache invalidate request.
* If it is to
This patch introduces a framework to manage PASID tagged AddressSpace
in Intel vIOMMU emulator. PASID tagged AddressSpace is an address sapce
which is an abstract of guest process address space in Qemu. The
management framework is as below:
s->pasid_as_list
/|\ \
This patch introduces a notify framework for IOMMUSVAContext.sva_notifiers.
Signed-off-by: Liu, Yi L
---
hw/vfio/common.c | 1 +
include/hw/vfio/vfio-common.h | 9 +
2 files changed, 10 insertions(+)
diff --git a/hw/vfio/common.c
From: Peter Xu
This patch adds IOMMUSVAContext as an abstract for virt-SVA in
Qemu.
IOMMUSVAContext is per-PASID(Process Address Space Identity).
A PASID Tagged AddressSpace should have an IOMMUSVAContext
created for it. virt-SVA emulation for emulated SVA capable
devices
This patch adds pci_device_notify_iommu() for notify virtual IOMMU
emulator when assigned device is added. And adds a new notify_func
in PCIBus. vIOMMU emulator provides the instance of this notify_func.
Reason:
When virtual IOMMU is exposed to guest, vIOMMU emulator needs to
programm host IOMMU
For assigned SVA capable devices, needs to bind guest pasid table
to host. Intel vIOMMU emulator captures device selective context
cache flush, and propagate the guest pasid table pointer to host,
in host iommu driver configs the guest pasid table pointer in its
translation structure.
This patch renames GuestIOMMU to GuestIOMMUMR as the existing GuestIOMMU
is for MemoryRegion related notifiers.
Signed-off-by: Liu, Yi L
---
hw/vfio/common.c | 17 +
include/hw/vfio/vfio-common.h | 8
2 files changed, 13
This patch shows the idea of how a device is binded to a PASID tagged
AddressSpace.
when Intel vIOMMU emulator detected a pasid table entry programming
from guest. Intel vIOMMU emulator firstly finds a VTDPASIDAddressSpace
with the pasid field of pasid cache invalidate request.
* If it is to
This patch introduces a notify framework for IOMMUSVAContext.sva_notifiers.
Signed-off-by: Liu, Yi L
---
hw/vfio/common.c | 1 +
include/hw/vfio/vfio-common.h | 9 +
2 files changed, 10 insertions(+)
diff --git a/hw/vfio/common.c
This patch shows how sva notifier is registered. And provided
an example by registering notify func for tlb flush propagation.
Signed-off-by: Liu, Yi L
---
hw/vfio/pci.c | 55 +--
1 file changed, 53 insertions(+), 2
This patch records assigned devices in a list within Intel vIOMMU
emulator. The recorded info can be used to filter out affect assigned
devices when Qemu captured guest's cache invalidate request.
Signed-off-by: Liu, Yi L
---
hw/i386/intel_iommu.c | 31
For assigned SVA capable devices, needs to bind guest pasid table
to host. Intel vIOMMU emulator captures device selective context
cache flush, and propagate the guest pasid table pointer to host,
in host iommu driver configs the guest pasid table pointer in its
translation structure.
From: Peter Xu
IOMMU notifiers before are mostly used for [dev-]IOTLB stuffs. It is not
suitable for other kind of notifiers (one example would be the future
virt-svm support). Considering that current notifiers are targeted for
per memory region, renaming the iommu notifier
VFIO is the bridge for vIOMMU and host IOMMU. Needs to provide API
for vIOMMU emulator to set configs to host IOMMU. In this patchset,
such API is exposed in hw/pci.
Signed-off-by: Liu, Yi L
---
hw/vfio/pci.c | 30 ++
1 file changed, 30
This patch renames GuestIOMMU to GuestIOMMUMR as the existing GuestIOMMU
is for MemoryRegion related notifiers.
Signed-off-by: Liu, Yi L
---
hw/vfio/common.c | 17 +
include/hw/vfio/vfio-common.h | 8
2 files changed, 13
This patchset is to introduce a notifier framework for virt-SVA.
You may find virt-SVA design details from the link below.
https://lists.gnu.org/archive/html/qemu-devel/2017-04/msg04925.html
SVA is short for Shared Virtual Addressing. This is also called Shared
Virtual Memory in previous
This patch intoduces PCISVAOps for virt-SVA.
So far, to setup virt-SVA for assigned SVA capable device, needs to
config host translation structures. e.g. for VT-d, needs to set the
guest pasid table to host and enable nested translation. Besides,
vIOMMU emulator needs to forward guest's cache
From: Peter Xu
This patch adds IOMMUSVAContext as an abstract for virt-SVA in
Qemu.
IOMMUSVAContext is per-PASID(Process Address Space Identity).
A PASID Tagged AddressSpace should have an IOMMUSVAContext
created for it. virt-SVA emulation for emulated SVA capable
devices
This patchset is to introduce a notifier framework for virt-SVA.
You may find virt-SVA design details from the link below.
https://lists.gnu.org/archive/html/qemu-devel/2017-04/msg04925.html
SVA is short for Shared Virtual Addressing. This is also called Shared
Virtual Memory in previous
On Thu, Mar 01, 2018 at 04:44:28PM +0800, Peter Xu wrote:
> Three functions are abstracted from the old code:
>
> - qio_net_listener_source_add(): create one source for listener
> - qio_net_listener_sources_clear(): unset existing net lister sources
> - qio_net_listener_sources_update(): setup
On Wed, 28 Feb 2018 12:02:58 +0800
Haozhong Zhang wrote:
> ACPI 6.2A Table 5-129 "SPA Range Structure" requires the proximity
> domain of a NVDIMM SPA range must match with corresponding entry in
> SRAT table.
>
> The address ranges of vNVDIMM in QEMU are allocated
On Thu, 1 Mar 2018 10:12:53 +
Peter Maydell wrote:
> On 27 February 2018 at 13:21, Cornelia Huck wrote:
> > The following changes since commit 0a773d55ac76c5aa89ed9187a3bc5af8c5c2a6d0:
> >
> > maintainers: Add myself as a OpenBSD maintainer
Also drop gtk and vte libs from libs_softmmu, so the libs are not
pulled in unless the gtk module actually gets loaded.
Signed-off-by: Gerd Hoffmann
---
configure| 5 ++---
ui/Makefile.objs | 17 +
2 files changed, 11 insertions(+), 11 deletions(-)
Le 28/02/2018 à 23:16, Max Filippov a écrit :
> shmdt fails to call mmap_lock/mmap_unlock around page_set_flags,
> resulting in the following assertion:
> page_set_flags: Assertion `have_mmap_lock()' failed.
>
> Wrap shmdt internals into mmap_lock/mmap_unlock.
>
> Cc: qemu-sta...@nongnu.org
>
Am 01.03.2018 um 10:57 hat Vladimir Sementsov-Ogievskiy geschrieben:
> 01.03.2018 12:48, Kevin Wolf wrote:
> > Am 01.03.2018 um 08:25 hat Vladimir Sementsov-Ogievskiy geschrieben:
> > > 26.02.2018 17:05, Kevin Wolf wrote:
> > > > Essentially, assuming a simple backing chain 'base <- overlay', we
This avoids a name clash for CONFIG_SDL, which is used by both sdl video
support and sdl audio support. It also more clear that this is a audio
driver configuration.
Signed-off-by: Gerd Hoffmann
---
configure | 2 +-
audio/audio_int.h | 2 +-
Am 28.02.2018 um 20:24 hat John Snow geschrieben:
>
>
> On 02/28/2018 01:29 PM, Kevin Wolf wrote:
> > Am 27.02.2018 um 21:24 hat Eric Blake geschrieben:
> >> On 02/23/2018 05:51 PM, John Snow wrote:
> >>> This allows us to easily force the option for all jobs belonging
> >>> to a transaction to
Signed-off-by: Gerd Hoffmann
---
include/ui/console.h | 19 ---
ui/sdl.c | 24 +---
ui/sdl2.c| 17 +++--
vl.c | 15 +--
4 files changed, 29 insertions(+), 46 deletions(-)
diff
Signed-off-by: Gerd Hoffmann
---
configure| 2 +-
ui/Makefile.objs | 3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/configure b/configure
index 105f79ef3d..4b0bdef154 100755
--- a/configure
+++ b/configure
@@ -6027,7 +6027,7 @@ if test
On 27 February 2018 at 13:21, Cornelia Huck wrote:
> The following changes since commit 0a773d55ac76c5aa89ed9187a3bc5af8c5c2a6d0:
>
> maintainers: Add myself as a OpenBSD maintainer (2018-02-23 12:05:07 +)
>
> are available in the git repository at:
>
>
Signed-off-by: Gerd Hoffmann
---
include/ui/console.h | 12
ui/curses.c | 14 +-
vl.c | 17 ++---
3 files changed, 15 insertions(+), 28 deletions(-)
diff --git a/include/ui/console.h b/include/ui/console.h
index
Simplifies handling the X11 dependency,
also makes ui/Makefile.objs more readable.
Signed-off-by: Gerd Hoffmann
---
configure| 10 --
ui/Makefile.objs | 5 -
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/configure b/configure
index
On Wed, Feb 28, 2018 at 04:57:24AM -0800, no-re...@patchew.org wrote:
> Hi,
>
> This series failed build test on s390x host. Please find the details below.
Self-nack this pull. New patch series posted for review with build
issues fixed (hopefully).
cheers,
Gerd
If a requested user interface is not available, try loading it as
module, simliar to block layer modules. Needed to keep things working
when followup patches start to build user interfaces as modules.
Signed-off-by: Gerd Hoffmann
---
Makefile.objs | 1 +
Also drop curses libs from libs_softmmu. Add CURSES_{CFLAGS,LIBS}
variables so we can use them for linking the curses module.
Also make target/unicore32/helper.o depend on curses which uses curses
directly for some reason ...
Signed-off-by: Gerd Hoffmann
---
configure
Using the new display registry instead of #ifdefs in vl.c.
Signed-off-by: Gerd Hoffmann
---
include/ui/console.h | 1 +
ui/console.c | 19 +++
vl.c | 15 +--
3 files changed, 25 insertions(+), 10 deletions(-)
diff --git
Signed-off-by: Gerd Hoffmann
---
include/ui/console.h | 3 ---
ui/egl-headless.c| 20 +++-
vl.c | 12
3 files changed, 19 insertions(+), 16 deletions(-)
diff --git a/include/ui/console.h b/include/ui/console.h
index
Signed-off-by: Gerd Hoffmann
---
include/ui/console.h | 12
vl.c | 3 ---
ui/cocoa.m | 14 +-
3 files changed, 13 insertions(+), 16 deletions(-)
diff --git a/include/ui/console.h b/include/ui/console.h
index
So remove x11 from pkg-config check and don't
add x11 cflags/libs to opengl cflags/libs.
Signed-off-by: Gerd Hoffmann
---
configure | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/configure b/configure
index f6dc1c92b3..ab1ba9c47d 100755
---
On 1 March 2018 at 09:50, Igor Mammedov wrote:
> In QEMU on x86 (and I think ppc, s390 as well), we create vCPUs on demand.
>
> It would be nice if ARM would be able to do that too,
> so that it could take advantage of the same code.
It's not clear to me how that would work,
We often use a bootloader for this board. So lets set the uart in a state
which it can emit characters as if we were using a bootloader.
Signed-off-by: KONRAD Frederic
---
hw/char/grlib_apbuart.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
Add a registry for user interfaces. Add qemu_display_init and
qemu_display_early_init helper functions for display initialization.
Hook up gtk ui as first user.
Signed-off-by: Gerd Hoffmann
---
include/ui/console.h | 32
ui/console.c
This patch series adds a registry for user interfaces (aka displays),
adds support for user interface modules and allows to build sdl, gtk
and curses as modules. Especially gtk cuts down the number of shared
libraries qemu links against by a significant amount.
Note one: Modules are disabled by
On 27.02.2018 20:35, Collin L. Walling wrote:
> It is possible that certain QEMU configurations may not
> create an IPLB (such as when -kernel is provided). In
> this case, a misleading error message will be printed
> stating that the "boot menu is not supported for this
> device type".
>
> To
Am 28.02.2018 um 20:14 hat John Snow geschrieben:
>
>
> On 02/28/2018 01:15 PM, Kevin Wolf wrote:
> > Is it because you want to avoid that the user picks an automatic job for
> > completing the mixed transaction?
>
> I wanted to avoid the case that a job without the manual property would
> be
* Peter Xu (pet...@redhat.com) wrote:
> On Wed, Feb 28, 2018 at 05:43:50PM +, Dr. David Alan Gilbert wrote:
> > * Peter Xu (pet...@redhat.com) wrote:
> > > The old incoming migration is running in main thread and default
> > > gcontext. With the new qio_channel_add_watch_full() we can now let
01.03.2018 12:48, Kevin Wolf wrote:
Am 01.03.2018 um 08:25 hat Vladimir Sementsov-Ogievskiy geschrieben:
26.02.2018 17:05, Kevin Wolf wrote:
Essentially, assuming a simple backing chain 'base <- overlay', we got
these combinations to represent in NBD (with my suggestion of the flags
to use):
Hi,
Sorry too for long delay.
28.02.2018 16:08, Wouter Verhelst wrote:
Hi,
Sorry, I forgot to reply to this earlier.
On Fri, Feb 16, 2018 at 10:10:59AM -0600, Eric Blake wrote:
On 02/16/2018 07:53 AM, Vladimir Sementsov-Ogievskiy wrote:
Good idea. But it would be tricky thing to maintain
On Tue, 27 Feb 2018 14:21:31 +0100
Andrew Jones wrote:
> On Tue, Feb 27, 2018 at 01:46:04PM +0100, Christoffer Dall wrote:
> > On Tue, Feb 27, 2018 at 05:34:28PM +0530, btha...@codeaurora.org wrote:
> > > Hi Christoffer,
> > >
> > > Thanks for your reply.
> > >
> > > On
Am 01.03.2018 um 08:25 hat Vladimir Sementsov-Ogievskiy geschrieben:
> 26.02.2018 17:05, Kevin Wolf wrote:
> > Essentially, assuming a simple backing chain 'base <- overlay', we got
> > these combinations to represent in NBD (with my suggestion of the flags
> > to use):
> >
> > 1. Cluster
On Wed, Feb 28, 2018 at 12:02:14PM -0600, Wei Huang wrote:
> This patch moves the settings related migration-test from the
> migration-test.c file to a seperate header file. It also renames the
> x86-a-b-bootblock.s file extension from .s to .S, allowing gcc
> pre-processor to include the C-style
Hi
On Thu, Mar 1, 2018 at 8:08 AM, Julia Suvorova via Qemu-devel
wrote:
> basename(3) and dirname(3) modify their argument and may return
> pointers to statically allocated memory which may be overwritten by
> subsequent calls.
> g_path_get_basename and g_path_get_dirname
On Wed, Feb 28, 2018 at 12:02:15PM -0600, Wei Huang wrote:
> This patch adds migration test support for aarch64. The test code, which
> implements the same functionality as x86, is booted as a kernel in qemu.
> Here are the design choices we make for aarch64:
>
> * We choose this -kernel
Le 28/02/2018 à 23:16, Max Filippov a écrit :
> target_mprotect/target_munmap return value goes through get_errno at the
> call site, thus the functions must either set errno to host error code
> and return -1 or return negative guest error code. Do the latter.
>
> Cc: qemu-sta...@nongnu.org
>
On Thu, 1 Mar 2018 09:43:35 +0100
Auger Eric wrote:
> Hi Igor,
>
> On 28/02/18 15:23, Igor Mammedov wrote:
> > move FADT data initialization out of fadt_setup() into dedicated
> > init_fadt_data() that will set common for pc/q35 values in
> > AcpiFadtData structure and
On 01/03/18 10:21, Igor Mammedov wrote:
> On Thu, 1 Mar 2018 09:51:14 +0100
> Auger Eric wrote:
>
>> Hi,
>> On 28/02/18 15:23, Igor Mammedov wrote:
>>> Extend generic build_fadt() to support rev5.1 FADT
>>> and reuse it for 'virt' board, it would allow to
>>> phase out
Le 28/02/2018 à 23:16, Max Filippov a écrit :
> target_msync is not used, remove its declaration and implementation.
>
> Cc: Riku Voipio
> Cc: Laurent Vivier
> Signed-off-by: Max Filippov
> ---
> linux-user/mmap.c | 17
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