[Qemu-devel] [PATCH] block/mirror: honor ratelimit again

Commit b76e4458b1eb3c32e9824fe6aa51f67d2b251748 ("block/mirror: change the semantic of 'force' of block-job-cancel") accidentally removed the ratelimit in the mirror job. Reintroduce the ratelimit but keep the block-job-cancel force=true behavior that was added in commit

Re: [Qemu-devel] [PATCH v6 1/5] qobject: ensure base is at offset 0

On 24 April 2018 at 13:18, Markus Armbruster wrote: > We define hundreds of QOM types without ever bothering to check the > super type comes first. We don't even bother to clearly document it has > to come first. If you don't put the super type first then the first time you

Re: [Qemu-devel] [PATCH v6 1/5] qobject: ensure base is at offset 0

Marc-André Lureau writes: > On Thu, Apr 19, 2018 at 5:20 PM, Eric Blake wrote: >> On 04/19/2018 10:01 AM, Marc-André Lureau wrote: >>> All QObject types have the base QObject as their first field. This >>> allows the simplification of qobject_to().

Re: [Qemu-devel] [PATCH v2 2/4] pc-bios/s390-ccw/net: Add support for pxelinux-style config files

On 24.04.2018 13:23, Thomas Huth wrote: > On 24.04.2018 13:07, Viktor VM Mihajlovski wrote: >> On 23.04.2018 09:58, Thomas Huth wrote: >>> Since it is quite cumbersome to manually create a combined kernel with >>> initrd image for network booting, we now support loading via pxelinux >>>

Re: [Qemu-devel] [PATCH] Show values and description when using "qom-list"

Hi, As David mentioned and after using it for a while in my own project, I found very useful printing the values for these common types. I will summarize your comments and send a new patch. Kind regards, Ricardo Perez Blanco -Original Message- From: Dr. David Alan Gilbert

Re: [Qemu-devel] [PATCH v4 4/5] target/ppc: add hash MMU support for PowerNV POWER9 machines

> +hwaddr ppc_hash64_hpt_reg(PowerPCCPU *cpu) > +{ > +CPUPPCState *env = >env; > + > +/* We should not reach this routine on sPAPR machines */ > +assert(!cpu->vhyp); > + > +/* PowerNV machine */ > +if (msr_hv) { > +if (env->mmu_model & POWERPC_MMU_3_00) { > +

Re: [Qemu-devel] [RFC PATCH] hw/s390x: Allow to configure the consoles with the "-serial" parameter

On 04/24/2018 01:44 PM, Thomas Huth wrote: > The consoles ("sclpconsole" and "sclplmconsole") can only be configured > with "-device" and "-chardev" so far. Other machines use the convenience > option "-serial" to configure the default consoles, too, even for virtual > consoles like spapr-vty on

Re: [Qemu-devel] [PATCH] Show values and description when using "qom-list"

* QingFeng Hao (ha...@linux.vnet.ibm.com) wrote: > > > 在 2018/4/13 16:05, Perez Blanco, Ricardo (Nokia - BE/Antwerp) 写道: > > Dear all, > > > > Here you can find my first contribution to qemu. Please, do not hesitate to > > do any kind of remark. > > > > Based on

[Qemu-devel] [RFC PATCH] hw/s390x: Allow to configure the consoles with the "-serial" parameter

The consoles ("sclpconsole" and "sclplmconsole") can only be configured with "-device" and "-chardev" so far. Other machines use the convenience option "-serial" to configure the default consoles, too, even for virtual consoles like spapr-vty on the pseries machine. So let's support this option on

[Qemu-devel] [PATCH v4 5/5] target/ppc: generalize check on radix when in HV mode

On a POWER9 processor, the first doubleword of the partition table entry (as pointed to by the PTCR) indicates whether the host uses HPT or Radix Tree translation for that partition. Use that bit to check for radix mode on pseries and powernv QEMU machines. Signed-off-by: Cédric Le Goater

[Qemu-devel] [PATCH v4 1/5] target/ppc: return a nil HPT base address on sPAPR machines

commit e57ca75ce3b2 ("target/ppc: Manage external HPT via virtual hypervisor") exported a set of methods to manipulate the HPT from the core hash MMU. But SPR_SDR1 is still used under some circumstances to get the base address of the HPT, which is incorrect for the sPAPR machines. Only the

[Qemu-devel] [PATCH v4 2/5] target/ppc: add basic support for PTCR on POWER9

The Partition Table Control Register (PTCR) is a hypervisor privileged SPR. It contains the host real address of the Partition Table and its size. Signed-off-by: Cédric Le Goater Reviewed-by: David Gibson --- target/ppc/cpu.h| 2 ++

[Qemu-devel] [PATCH v4 3/5] target/ppc: add hash MMU definitions for ISA v3.0

The HPTE bits definitions are slightly modified in ISA v3.0. Let's add some helpers to hide the differences in the hash MMU code. Signed-off-by: Cédric Le Goater --- hw/ppc/spapr_hcall.c| 5 +++-- target/ppc/mmu-hash64.c | 30 ++

[Qemu-devel] [PATCH v4 4/5] target/ppc: add hash MMU support for PowerNV POWER9 machines

On a POWER9 processor, the Partition Table is composed of a pair of doublewords per partition. The first doubleword indicates whether the partition uses HPT or Radix Trees translation and contains the address of the host's translation table structure and size. The first doubleword of the PTCR

[Qemu-devel] [PATCH v4 0/5] target/ppc: add hash MMU support for the POWER9 PowerNV machine

Hello, This adds support for the Hash Page Table MMU mode on POWER9 PowerNV machines. The Radix Tree mode support for the host is still to be done but we are getting close. Thanks, C. Changes since v3: - removed spapr_hpt_base() ops - split hash MMU definitions patch Cédric Le Goater

Re: [Qemu-devel] [PATCH v2 2/4] pc-bios/s390-ccw/net: Add support for pxelinux-style config files

On 24.04.2018 13:07, Viktor VM Mihajlovski wrote: > On 23.04.2018 09:58, Thomas Huth wrote: >> Since it is quite cumbersome to manually create a combined kernel with >> initrd image for network booting, we now support loading via pxelinux >> configuration files, too. In these files, the kernel,

Re: [Qemu-devel] [PATCH v2 2/4] pc-bios/s390-ccw/net: Add support for pxelinux-style config files

On 23.04.2018 09:58, Thomas Huth wrote: > Since it is quite cumbersome to manually create a combined kernel with > initrd image for network booting, we now support loading via pxelinux > configuration files, too. In these files, the kernel, initrd and command > line parameters can be specified

[Qemu-devel] [Bug 1254443] Re: Periodic mode of LAPIC doesn't fire interrupts when using kvm

Ok, thanks for testing. So if this has been fixed in QEMU 2.3, I assume that it is still fixed, thus let's close this ticket. If you hit the problem again with the latest version of QEMU, please re-open this bug or create a new one. ** Changed in: qemu Status: Incomplete => Fix Released

[Qemu-devel] [Bug 1520730] Re: 32-bit editors vim/rhide broken keyboard handling in freedos 1.1 and ms-dos 6.22

Which user interface is this? -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1520730 Title: 32-bit editors vim/rhide broken keyboard handling in freedos 1.1 and ms-dos 6.22 Status in QEMU: New

[Qemu-devel] [PATCH v1] s390x: refactor reset/reipl handling

Calling pause_all_vcpus()/resume_all_vcpus() from a VCPU thread might not be the best idea. As pause_all_vcpus() temporarily drops the qemu mutex, two parallel calls to pause_all_vcpus() can be active at a time, resulting in a deadlock. (either by two VCPUs or by the main thread and a VCPU) Let's

Re: [Qemu-devel] [PATCH v3 04/35] spapr/xive: introduce a XIVE interrupt controller for sPAPR

On 04/24/2018 08:51 AM, David Gibson wrote: > On Thu, Apr 19, 2018 at 02:43:00PM +0200, Cédric Le Goater wrote: >> sPAPRXive is a model for the XIVE interrupt controller device of the >> sPAPR machine. It holds the routing XIVE table, the Interrupt >> Virtualization Entry (IVE) table which

Re: [Qemu-devel] [PATCH v3 03/35] ppc/xive: introduce the XiveFabric interface

On 04/24/2018 08:46 AM, David Gibson wrote: > On Mon, Apr 23, 2018 at 09:58:43AM +0200, Cédric Le Goater wrote: >> On 04/23/2018 08:46 AM, David Gibson wrote: >>> On Thu, Apr 19, 2018 at 02:42:59PM +0200, Cédric Le Goater wrote: The XiveFabric offers a simple interface, between the XiveSourve

Re: [Qemu-devel] [PATCH v5 2/5] qcow2: Document some maximum size constraints

On Tue 24 Apr 2018 12:33:34 AM CEST, Eric Blake wrote: > Although off_t permits up to 63 bits (8EB) of file offsets, in > practice, we're going to hit other limits first. Document some > of those limits in the qcow2 spec, and how choice of cluster size > can influence some of the limits. > >

Re: [Qemu-devel] [PATCH] blockjob: drop block_job_pause/resume_all()

Am 24.04.2018 um 10:52 hat Stefan Hajnoczi geschrieben: > Commit 8119334918e86f45877cfc139192d54f2449a239 ("block: Don't > block_job_pause_all() in bdrv_drain_all()") removed the only callers of > block_job_pause/resume_all(). > > Pausing and resuming now happens in child_job_drained_begin/end()

Re: [Qemu-devel] [PATCH RFC] s390x: refactor reset/reipl handling

Not a full test, but reboot and kdump seem to work ok with KVM. On 04/12/2018 09:26 PM, David Hildenbrand wrote: > Calling pause_all_vcpus()/resume_all_vcpus() from a VCPU thread might > not be the best idea. As pause_all_vcpus() temporarily drops the qemu > mutex, two parallel calls to

[Qemu-devel] [PATCH] blockjob: drop block_job_pause/resume_all()

Commit 8119334918e86f45877cfc139192d54f2449a239 ("block: Don't block_job_pause_all() in bdrv_drain_all()") removed the only callers of block_job_pause/resume_all(). Pausing and resuming now happens in child_job_drained_begin/end() so it's no longer necessary to globally pause/resume jobs.

Re: [Qemu-devel] [PATCH v3 05/35] spapr/xive: add a single source block to the sPAPR XIVE model

On 04/24/2018 08:58 AM, David Gibson wrote: > On Thu, Apr 19, 2018 at 02:43:01PM +0200, Cédric Le Goater wrote: >> Bare-metal systems (PowerNV) have multiples interrupt sources. The >> XIVE interrupt controller has an internal source for IPIs and generic >> IPIs, the PSIHB has one and also the

Re: [Qemu-devel] [PATCH 2/2] ui: introduce vfio_display_reset

Hi, > After reviewing this patch-set again, I think we might not need the > proposed dpy_gfx_switch_surface() any more. The reason I proposed it > was because I thought gfx.ds is changed to the surface related to > guest dma-buf framebuffer and we need to switch it with QemuConsole's >

Re: [Qemu-devel] [PATCH v3 02/35] ppc/xive: add support for the LSI interrupt sources

On 04/24/2018 08:41 AM, David Gibson wrote: > On Mon, Apr 23, 2018 at 09:31:24AM +0200, Cédric Le Goater wrote: >> On 04/23/2018 08:44 AM, David Gibson wrote: >>> On Thu, Apr 19, 2018 at 02:42:58PM +0200, Cédric Le Goater wrote: The 'sent' status of the LSI interrupt source is modeled with

Re: [Qemu-devel] [qemu RFC v3 1/3] qapi: add SysEmuTarget to "common.json"

On Sat, Apr 21, 2018 at 01:12:44AM +0200, Laszlo Ersek wrote: > We'll soon need an enumeration type that lists all the softmmu targets > that QEMU (the project) supports. Introduce @SysEmuTarget to > "common.json". [...] > Notes: > RFCv3: > > - The patch is new in this version.

Re: [Qemu-devel] [PATCH] acpi/nvdimm: remove forward name references

On Tue, 24 Apr 2018 04:02:40 +0300 "Michael S. Tsirkin" wrote: > On Tue, Apr 24, 2018 at 12:41:29AM +, Schmauss, Erik wrote: > > > > > > > -Original Message- > > > From: Michael S. Tsirkin [mailto:m...@redhat.com] > > > Sent: Monday, April 23, 2018 4:03 PM > > >

Re: [Qemu-devel] [PATCH v3 03/35] ppc/xive: introduce the XiveFabric interface

On Mon, Apr 23, 2018 at 09:58:43AM +0200, Cédric Le Goater wrote: > On 04/23/2018 08:46 AM, David Gibson wrote: > > On Thu, Apr 19, 2018 at 02:42:59PM +0200, Cédric Le Goater wrote: > >> The XiveFabric offers a simple interface, between the XiveSourve > >> object and the device model owning the

Re: [Qemu-devel] [PATCH v3 04/35] spapr/xive: introduce a XIVE interrupt controller for sPAPR

On Thu, Apr 19, 2018 at 02:43:00PM +0200, Cédric Le Goater wrote: > sPAPRXive is a model for the XIVE interrupt controller device of the > sPAPR machine. It holds the routing XIVE table, the Interrupt > Virtualization Entry (IVE) table which associates interrupt source > numbers with targets. > >

Re: [Qemu-devel] [PATCH v3 05/35] spapr/xive: add a single source block to the sPAPR XIVE model

On Thu, Apr 19, 2018 at 02:43:01PM +0200, Cédric Le Goater wrote: > Bare-metal systems (PowerNV) have multiples interrupt sources. The > XIVE interrupt controller has an internal source for IPIs and generic > IPIs, the PSIHB has one and also the PHBs. But, for simplicity on the > sPAPR machine, we

Re: [Qemu-devel] [PATCH v3 02/35] ppc/xive: add support for the LSI interrupt sources

On Mon, Apr 23, 2018 at 09:31:24AM +0200, Cédric Le Goater wrote: > On 04/23/2018 08:44 AM, David Gibson wrote: > > On Thu, Apr 19, 2018 at 02:42:58PM +0200, Cédric Le Goater wrote: > >> The 'sent' status of the LSI interrupt source is modeled with the 'P' > >> bit of the ESB and the assertion

[Qemu-devel] [ARM/FDPIC v3 4/4] linux-user: ARM-FDPIC: Add support for signals for FDPIC targets

The FDPIC restorer needs to deal with a function descriptor, hence we have to extend 'retcode' such that it can hold the instructions needed to perform this. The restorer sequence uses the same thumbness as the exception handler (mainly to support Thumb-only architectures). Compared to v2:

[Qemu-devel] [ARM/FDPIC v3 3/4] linux-user: ARM-FDPIC: Add support of FDPIC for ARM.

Add FDPIC info into image_info structure since interpreter info is on stack and needs to be saved to be accessed later on. Compared to v2: Do not add the is_fdpic field to TaskState, as the information can be retrieved from the 'info' data in TaskState. Co-Authored-By: Mickaël Guêné

Re: [Qemu-devel] [PATCH 2/2] ui: introduce vfio_display_reset

> -Original Message- > From: intel-gvt-dev [mailto:intel-gvt-dev-boun...@lists.freedesktop.org] On > Behalf Of Gerd Hoffmann > Sent: Monday, April 23, 2018 9:12 PM > To: Zhang, Tina > Cc: alex.william...@redhat.com; intel-gvt-...@lists.freedesktop.org; qemu- >

Re: [Qemu-devel] [PATCH v7 0/5] virtio-balloon: free page hint reporting support

On 04/24/2018 02:13 PM, Wei Wang wrote: This is the deivce part implementation to add a new feature, VIRTIO_BALLOON_F_FREE_PAGE_HINT to the virtio-balloon device. The device receives the guest free page hints from the driver and clears the corresponding bits in the dirty bitmap, so that those

[Qemu-devel] [PATCH] allocate pci id for mdpy

mdpy is a sample pci device for vfio-mdev. Not (yet) merged upstream, patch available here: https://www.kraxel.org/cgit/linux/commit/?h=vfio-sample-display=6fd86cff3d7df38ab89625b16fdd6434b1c18749 Cc: Alex Williamson Signed-off-by: Gerd Hoffmann

[Qemu-devel] [PATCH v7 4/5] virtio-balloon: VIRTIO_BALLOON_F_FREE_PAGE_HINT

The new feature enables the virtio-balloon device to receive hints of guest free pages from the free page vq. balloon_free_page_start - start guest free page hint reporting. balloon_free_page_stop - stop guest free page hint reporting. Note: balloon will report pages which were free at the time

[Qemu-devel] [PATCH v7 3/5] migration: API to clear bits of guest free pages from the dirty bitmap

This patch adds an API to clear bits corresponding to guest free pages from the dirty bitmap. Spilt the free page block if it crosses the QEMU RAMBlock boundary. Signed-off-by: Wei Wang CC: Dr. David Alan Gilbert CC: Juan Quintela

[Qemu-devel] [PATCH v7 5/5] migration: use the free page hint feature from balloon

Start the free page optimization after the migration bitmap is synchronized. This can't be used in the stop phase since the guest is paused. Make sure the guest reporting has stopped before synchronizing the migration dirty bitmap. Currently, the optimization is added to precopy only.

[Qemu-devel] [PATCH v7 2/5] migration: use bitmap_mutex in migration_bitmap_clear_dirty

The bitmap mutex is used to synchronize threads to update the dirty bitmap and the migration_dirty_pages counter. This patch makes migration_bitmap_clear_dirty update the bitmap and counter under the mutex. Signed-off-by: Wei Wang CC: Dr. David Alan Gilbert

[Qemu-devel] [PATCH v7 1/5] bitmap: bitmap_count_one_with_offset

Count the number of 1s in a bitmap starting from an offset. Signed-off-by: Wei Wang CC: Dr. David Alan Gilbert CC: Juan Quintela CC: Michael S. Tsirkin Reviewed-by: Dr. David Alan Gilbert

[Qemu-devel] [PATCH v7 0/5] virtio-balloon: free page hint reporting support

This is the deivce part implementation to add a new feature, VIRTIO_BALLOON_F_FREE_PAGE_HINT to the virtio-balloon device. The device receives the guest free page hints from the driver and clears the corresponding bits in the dirty bitmap, so that those free pages are not transferred by the

Re: [Qemu-devel] [qemu RFC v3 2/3] qapi: change the type of TargetInfo.arch from string to enum SysEmuTarget

Laszlo Ersek writes: > On 04/23/18 11:50, Markus Armbruster wrote: >> Laszlo Ersek writes: >> >>> Now that we have @SysEmuTarget, it makes sense to restict >>> @TargetInfo.@arch to valid sysemu targets at the schema level. >> >> We could mention that

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