After one round of checkpoint, the states between PVM and SVM
become consistent, so it is unnecessary to adjust the sequence
of net packets for old connections, besides, while failover
happens, filter-rewriter needs to check if it still needs to
adjust sequence of net packets.
Signed-off-by: zhang
There are several stages during loadvm/savevm process. In different stage,
migration incoming processes different types of sections.
We want to control these stages more accuracy, it will benefit COLO
performance, we don't have to save type of QEMU_VM_SECTION_START
sections everytime while do check
From: zhanghailiang
If some errors happen during VM's COLO FT stage, it's important to
notify the users of this event. Together with 'x-colo-lost-heartbeat',
Users can intervene in COLO's failover work immediately.
If users don't want to get involved in COLO's failover verdict,
it is still necess
From: zhanghailiang
Notify all net filters about the checkpoint and failover event.
Signed-off-by: zhanghailiang
Reviewed-by: Dr. David Alan Gilbert
---
migration/colo.c | 12
1 file changed, 12 insertions(+)
diff --git a/migration/colo.c b/migration/colo.c
index 0bff21d9e5..e38
We record the address of the dirty pages that received,
it will help flushing pages that cached into SVM.
Here, it is a trick, we record dirty pages by re-using migration
dirty bitmap. In the later patch, we will start the dirty log
for SVM, just like migration, in this way, we can record both
the
We should not load PVM's state directly into SVM, because there maybe some
errors happen when SVM is receving data, which will break SVM.
We need to ensure receving all data before load the state into SVM. We use
an extra memory to cache these data (PVM's ram). The ram cache in secondary side
is i
On Wed, May 16, 2018 at 2:56 AM, Dr. David Alan Gilbert wrote:
> * Zhang Chen (zhangc...@gmail.com) wrote:
> > From: zhanghailiang
> >
> > There are several stages during loadvm/savevm process. In different
> stage,
> > migration incoming processes different types of sections.
> > We want to con
Filter needs to process the event of checkpoint/failover or
other event passed by COLO frame.
Signed-off-by: zhanghailiang
---
include/net/filter.h | 5 +
net/filter.c | 17 +
net/net.c| 28
3 files changed, 50 insertions(+)
Libvirt or other high level software can use this command query colo status.
You can test this command like that:
{'execute':'query-colo-status'}
Signed-off-by: Zhang Chen
---
migration/colo.c| 39 +++
qapi/migration.json | 34 +
From: zhanghailiang
COLO thread may sleep at qemu_sem_wait(&s->colo_checkpoint_sem),
while failover works begin, It's better to wakeup it to quick
the process.
Signed-off-by: zhanghailiang
Reviewed-by: Dr. David Alan Gilbert
---
migration/colo.c | 8
1 file changed, 8 insertions(+)
It's a good idea to use notifier to notify COLO frame of
inconsistent packets comparing.
Signed-off-by: Zhang Chen
Signed-off-by: zhanghailiang
---
net/colo-compare.c | 32 +---
net/colo-compare.h | 2 ++
2 files changed, 27 insertions(+), 7 deletions(-)
diff --git
From: zhanghailiang
Don't need to flush all VM's ram from cache, only
flush the dirty pages since last checkpoint
Signed-off-by: Li Zhijian
Signed-off-by: Zhang Chen
Signed-off-by: zhanghailiang
Reviewed-by: Dr. David Alan Gilbert
---
migration/ram.c | 10 ++
1 file changed, 10 inse
During the time of VM's running, PVM may dirty some pages, we will transfer
PVM's dirty pages to SVM and store them into SVM's RAM cache at next checkpoint
time. So, the content of SVM's RAM cache will always be same with PVM's memory
after checkpoint.
Instead of flushing all content of PVM's RAM
While do checkpoint, we need to flush all the unhandled packets,
By using the filter notifier mechanism, we can easily to notify
every compare object to do this process, which runs inside
of compare threads as a coroutine.
Signed-off-by: zhanghailiang
Signed-off-by: Zhang Chen
---
include/migra
Make sure master start block replication after slave's block
replication started.
Besides, we need to activate VM's blocks before goes into
COLO state.
Signed-off-by: zhanghailiang
Signed-off-by: Li Zhijian
Signed-off-by: Zhang Chen
---
migration/colo.c | 43 +
After a net connection is closed, we didn't clear its releated resources
in connection_track_table, which will lead to memory leak.
Let't track the state of net connection, if it is closed, its related
resources will be cleared up.
Signed-off-by: zhanghailiang
Signed-off-by: Zhang Chen
---
net
For COLO FT, both the PVM and SVM run at the same time,
only sync the state while it needs.
So here, let SVM runs while not doing checkpoint, change
DEFAULT_MIGRATE_X_CHECKPOINT_DELAY to 200*100.
Besides, we forgot to release colo_checkpoint_semd and
colo_delay_timer, fix them here.
Signed-off-b
We need to know if migration is going into COLO state for
incoming side before start normal migration.
Instead by using the VMStateDescription to send colo_state
from source side to destination side, we use MIG_CMD_ENABLE_COLO
to indicate whether COLO is enabled or not.
Signed-off-by: zhanghailia
Hi~ All~
COLO Frame, block replication and COLO proxy(colo-compare,filter-mirror,
filter-redirector,filter-rewriter) have been exist in qemu
for long time, it's time to integrate these three parts to make COLO really
works.
In this series, we have some optimizations for COLO frame, including sep
Hi Peter,
On 2 June 2018 at 00:13, Peter Maydell wrote:
> Remove the now-unused armv7m_init() function. This was a legacy from
> before we properly QOMified ARMv7M, and it has some flaws:
>
> * it combines work that needs to be done by an SoC object (creating
>and initializing the TYPE_ARMV7
Public bug reported:
Greetings,
I've been using qemu-system-aarch64 to do some low-level programming
targeting the raspberry pi 3. While I was debugging a problem in my code
I noticed a very confusing inconsistency that I think is very likely a
bug somewhere in how qemu's monitor produces its dis
These commands got introduced by Spec v3.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 83426da133..ac202e05a1 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -1178,6 +1178,9 @@ static sd_rsp_type_t sd_nor
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/sd/sd.h | 1 +
hw/sd/sd.c | 13 +
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h
index 49f22b0b89..7c6ad3c8f1 100644
--- a/include/hw/sd/sd.h
+++ b/include/hw/sd/sd.h
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/sd/sd.h | 1 +
hw/sd/sd.c | 7 +--
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h
index 7c6ad3c8f1..b865aafc33 100644
--- a/include/hw/sd/sd.h
+++ b/include/hw/sd/sd.h
@@ -57,6
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/sd/sd.h | 4
hw/sd/sd.c | 11 +++
2 files changed, 15 insertions(+)
diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h
index 9bdb3c9285..49f22b0b89 100644
--- a/include/hw/sd/sd.h
+++ b/include/hw/sd/sd.h
@@ -54,6 +54,1
>From the "Physical Layer Simplified Specification Version 1.10"
Chapter 7.3 "SPI Mode Transaction Packets"
Table 57: "Commands and arguments"
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 14 --
1 file changed, 14 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
ind
SEND_IF_COND got introduced by Spec v2.
Firmwares use the CMD8 in SPI mode to poll the Spec version supported:
7.2.1 Mode Selection and Initialization (SPI mode)
The SD Card is powered up in the SD mode. It will enter
SPI mode if the CS signal is asserted (negative) during
the rece
This register now matches the description of the header:
* SD Memory Card emulation as defined in the "SD Memory Card Physical
* layer specification, Version 1.10."
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sd.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/
Hi,
This series adds a 'spec_version' property to the SD Card device,
to allow to limit some commands to specific spec version range
(some firmwares use this feature to detect which spec version the
card implements).
This restore the SSI/SD support of the Stellaris LM3S6965EVB board,
which allow
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/ssi-sd.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c
index ae04b6641b..c62fdc871c 100644
--- a/hw/sd/ssi-sd.c
+++ b/hw/sd/ssi-sd.c
@@ -253,6 +253,8 @@ static void ssi_sd_realize(SSISlave *d, Error **errp)
On 06/02/2018 05:52 AM, Stefan Hajnoczi wrote:
> Signed-off-by: Stefan Hajnoczi
> ---
> include/qemu/main-loop.h | 14 ++
> 1 file changed, 14 insertions(+)
>
> diff --git a/include/qemu/main-loop.h b/include/qemu/main-loop.h
> index 6b4b60bf6d..721aa2416a 100644
> --- a/include/qemu
On 06/02/2018 05:55 PM, Philippe Mathieu-Daudé wrote:
> These macros are always used to deposit a field in place.
> Update them to take the pointer argument.
>
> As these macros are constructed using compound statements,
> it is easy to not use the return value, and the compiler
> doesn't warn. Th
strchrnul is a GNU extension and thus unavailable on a number of targets.
In the review for a commit removing strchrnul from 9p, I was asked to
create a qemu_strchrnul helper to factor out this functionality.
Do so, and use it in a number of other places in the code base that inlined
the replacemen
As with unlinkat, these flags come from the client and need to
be translated to their host values. The protocol values happen
to match linux, but that need not be true in general.
Signed-off-by: Keno Fischer
---
Changes since v2: New patch
hw/9pfs/9p.c | 17 +++--
hw/9pfs/9p.h | 4
The 9p-local code previously relied on P9_DOTL_AT_REMOVEDIR and AT_REMOVEDIR
having the same numerical value and deferred any errorchecking to the
syscall itself. However, while the former assumption is true on Linux,
it is not true in general. 9p-handle did this properly however. Move
the translat
Both `stbuf` and `local_ioc_getversion` where unused when
FS_IOC_GETVERSION was not defined, causing a compiler warning.
Reorganize the code to avoid this warning.
Signed-off-by: Keno Fischer
---
hw/9pfs/9p-local.c | 40 +++-
1 file changed, 23 insertions(+),
If the size returned from llistxattr/lgetxattr is 0, we skipped
the malloc call, leaving xattr.value uninitialized. However, this
value is later passed to `g_free` without any further checks,
causing an error. Fix that by always calling g_malloc unconditionally.
If `size` is 0, it will return NULL,
Hi Greg,
this is a respin of just the first couple of patches of my 9p Darwin
series. These patches should be applicable independent of the darwin
work.
Keno Fischer (5):
cutils: Provide strchrnul
9p: xattr: Fix crashes due to free of uninitialized value
9p: local: Avoid warning if FS_IOC_G
These macros are always used to deposit a field in place.
Update them to take the pointer argument.
As these macros are constructed using compound statements,
it is easy to not use the return value, and the compiler
doesn't warn. Thus this change makes these macros safer.
This also helps having a
> I guess this calls for some defines in 9p.h:
>
> /* 9p2000.L says that the 'flags' argument of operation 'xattrcreate'
> * are derived from Linux setxattr.
> */
> #define P9_XATTR_CREATE 1
> #define P9_XATTR_REPLACE 2
>
> Please do that in a preparatory patch.
>
> I would also appreciate you l
On 2 June 2018 at 15:14, Stefan Hajnoczi wrote:
> Introduce armv6m_init() and the glue code needed to wire together an
> ARMv6-M ARMCPU with memory and the NVIC.
>
> The "microbit" board needs to use a Cortex M0 CPU instead of a Cortex
> M3.
>
> Signed-off-by: Stefan Hajnoczi
> ---
> hw/arm/Make
On 2 June 2018 at 15:14, Stefan Hajnoczi wrote:
> Define a "cortex-m0" ARMv6-M CPU model.
>
> Most of the register reset values set by other CPU models are not
> relevant for the cut-down ARMv6-M architecture.
>
> Signed-off-by: Stefan Hajnoczi
> ---
> target/arm/cpu.c | 12
> 1 fil
Introduce armv6m_init() and the glue code needed to wire together an
ARMv6-M ARMCPU with memory and the NVIC.
The "microbit" board needs to use a Cortex M0 CPU instead of a Cortex
M3.
Signed-off-by: Stefan Hajnoczi
---
hw/arm/Makefile.objs| 1 +
hw/intc/Makefile.objs |
Define a "cortex-m0" ARMv6-M CPU model.
Most of the register reset values set by other CPU models are not
relevant for the cut-down ARMv6-M architecture.
Signed-off-by: Stefan Hajnoczi
---
target/arm/cpu.c | 12
1 file changed, 12 insertions(+)
diff --git a/target/arm/cpu.c b/targ
This patch series adds a skeleton ARM Cortex M3 CPU model and updates the
"microbit" machine type to use it.
The Cortex M0 emulation is not complete. This just lays the groundwork so we
can implement the missing ARMv6-M feature tests in target/arm/.
These patches cannot be merged until ARMv6-M f
On Mon, May 28, 2018 at 3:26 PM, Stefan Hajnoczi wrote:
> Before we can tackle these tasks a Cortex M0 CPU needs to be defined.
> Adding the Cortex M0 involves a new element in
> target/arm/cpu.c:arm_cpus[]. The CPU needs ARM_FEATURE_V6 and
> ARM_FEATURE_M. Once that is in place most of these ta
libvirt compiled against 105bcdde76bc8c64f2d9aca9db684186a5e96e63
--
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https://bugs.launchpad.net/bugs/1773753
Title:
virsh start, after virsh managed save hangs and vm goes to paused
st
Yes, tested again with below levels and not issue is not reproducible.
Issue is fixed!
qemu: 2.12.50 (v2.12.0-949-g392fba9f58-dirty)
host/guest kernel: 4.17.0-rc7-00045-g0512e0134582
libvirt:
Compiled against library: libvirt 4.4.0
Using library: libvirt 4.4.0
Using API: QEMU 4.4.0
Running hype
Hello,
I get an invalid instruction exception for the icbt instruction on the
sam460ex machine (PPC440 core 460EX CPU) but I think this should not raise
exception as it's valid on BookE that this CPU should support. Commit
01662f3e PPC: Implement e500 (FSL) MMU has introduced an extended
inst
On 06/01/2018 03:28 PM, Max Reitz wrote:
> Hi,
>
> The @preconfig RunState documentation states:
>
>> The state is reachable only if the --preconfig CLI option is used.
>
> However, this is not true:
>
> $ echo | x86_64-softmmu/qemu-system-x86_64 -monitor stdio
> QEMU 2.12.50 monitor - type 'he
After 047f7038f586d215 it is possible for event loop to run two
times. First time whilst parsing command line options (the idea
is to bring up monitor early so that management applications can
tweak config before machine is initialized). And the second time
is after everything is set up (this is th
At 2018-06-02 01:15:14, "Eric Blake" wrote:
>On 06/01/2018 11:57 AM, Chen Hanxiao wrote:
>> From: Chen Hanxiao
...
>> fs->mountpoint = g_strdup("System Reserved");
>> } else {
>> fs->mountpoint = g_strndup(mnt_point, len);
>> +if (GetDiskFreeSpaceEx(fs->mountpoi
On 05/28/2018 08:17 AM, Thomas Huth wrote:
> On 25.05.2018 16:02, Greg Kurz wrote:
>> On Fri, 18 May 2018 18:44:02 +0200
>> Cédric Le Goater wrote:
>>
>>> This IRQ number hint can possibly be used by the VIO devices if the
>>> "irq" property is defined on the command line but it seems it is never
On 05/18/2018 06:44 PM, Cédric Le Goater wrote:
> This IRQ number hint can possibly be used by the VIO devices if the
> "irq" property is defined on the command line but it seems it is never
> the case. It is not used in libvirt for instance. So, let's remove it
> to simplify future changes.
>
> N
Signed-off-by: Stefan Hajnoczi
---
include/qemu/main-loop.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/include/qemu/main-loop.h b/include/qemu/main-loop.h
index 6b4b60bf6d..721aa2416a 100644
--- a/include/qemu/main-loop.h
+++ b/include/qemu/main-loop.h
@@ -168,6 +168,20 @
Hello,
This is indeed not implemented, patches welcome :)
Samuel
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https://bugs.launchpad.net/bugs/1724590
Title:
Usermode networking hostfwd only listens on IPv4
Status in QEMU:
N
Emilio G. Cota writes:
> On Wed, May 30, 2018 at 16:05:14 -0700, Richard Henderson wrote:
>> On 05/30/2018 03:46 PM, Richard Henderson wrote:
>> > Thanks. Queued to tcg-next.
>> Hmph. Unqueued, at least for now.
>>
>> ERROR:/home/rth/work/qemu/qemu/accel/tcg/translate-all.c:615:page_unlock__d
On Fri, Jun 1, 2018 at 4:58 PM, Peter Maydell wrote:
> On 1 June 2018 at 16:21, Julia Suvorova wrote:
>> On 31.05.2018 12:42, Stefan Hajnoczi wrote:
+static int uart_can_receive(void *opaque)
+{
+Nrf51UART *s = NRF51_UART(opaque);
+
+return (s->rx_fifo_len < sizeo
Hi,
This series failed docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 20180602031629.3925-1-cont...@steffen-goertz.de
Subject: [Qemu-devel] [RFC] qapi: command
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20180602031629.3925-1-cont...@steffen-goertz.de
Subject: [Qemu-devel] [RFC] qapi: command category to stimulate high-level
machine devices
=== TEST SCRIPT BEGIN ===
#!/bin/b
From: Steffen Goertz
Add a new category "stimulate" to host commands that
act upon high-level devices associated with machines/boards.
This is patch is part of an effort to add support for BBC:microbit
educational computer to QEMU.
The microbit board, as many other microcontroller boards,
conta
Am 01.06.2018 um 17:39 schrieb Ricardo Perez Blanco:
> For debugging purposes it is very useful to:
> - See the description of the field. This information is already filled
>in but not shown in "qom-list" command.
No objection on this part.
> - Display value of the field.
That is by defini
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