[Qemu-devel] [PATCH v5 28/28] target/mips: Add I6500 core configuration

2018-10-12 Thread Aleksandar Markovic
From: Yongbok Kim Add I6500 core configuration. Note that this configuration is supported only by best-effort due to lack of certain features in QEMU. Signed-off-by: Yongbok Kim Signed-off-by: Aleksandar Markovic --- target/mips/translate_init.inc.c | 43

Re: [Qemu-devel] [PATCH v2 2/8] block: Add auto-read-only option

2018-10-12 Thread Eric Blake
On 10/12/18 6:55 AM, Kevin Wolf wrote: If a management application builds the block graph node by node, the protocol layer doesn't inherit its read-only option from the format layer any more, so it must be set explicitly. The documentation for this option is consciously phrased in a way that

[Qemu-devel] [PATCH v5 22/28] target/mips: Add CP0 Config2 to DisasContext

2018-10-12 Thread Aleksandar Markovic
From: Stefan Markovic Add field corresponding to CP0 Config2 to DisasContext. This is needed for availability control via Config2 bits. Signed-off-by: Stefan Markovic Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 2 ++ 1 file changed, 2 insertions(+) diff --git

[Qemu-devel] [PATCH v5 14/28] target/mips: Extend WatchHi registers

2018-10-12 Thread Aleksandar Markovic
From: Yongbok Kim WatchHi is extended by the field MemoryMapID with the GINVT instruction. The field is accessible by MTHC0/MFHC0 in 32-bit architectures and DMTC0/DMFC0 in 64-bit architectures. Signed-off-by: Yongbok Kim Signed-off-by: Aleksandar Markovic --- target/mips/cpu.h | 2 +-

[Qemu-devel] [PATCH v5 26/28] target/mips: Add DEC feature to mips32r6-generic CPU

2018-10-12 Thread Aleksandar Markovic
From: Yongbok Kim Set Config5.DEC Dual Endian Capability bit of mips32r6-generic CPU. Signed-off-by: Yongbok Kim Signed-off-by: Aleksandar Markovic --- target/mips/translate_init.inc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/mips/translate_init.inc.c

[Qemu-devel] [PATCH v5 21/28] target/mips: Add opcodes for nanoMIPS EVA instructions

2018-10-12 Thread Aleksandar Markovic
From: Dimitrije Nikolic Add opcodes for nanoMIPS EVA instructions: CACHEE, LBE, LBUE, LHE, LHUE, LLE, LLWPE, LWE, PREFE, SBE, SCE, SCWPE, SHE, SWE. Signed-off-by: Dimitrije Nikolic Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 34 ++ 1 file

[Qemu-devel] [PATCH v5 15/28] target/mips: Add CPO MemoryMapID register

2018-10-12 Thread Aleksandar Markovic
From: Yongbok Kim Add CPO MemoryMapID register. It is used by Global TLB Invalidate instruction (GINVT). Signed-off-by: Yongbok Kim Signed-off-by: Aleksandar Markovic --- target/mips/cpu.h | 1 + target/mips/internal.h | 1 + target/mips/machine.c | 4 3 files changed, 6

[Qemu-devel] [PATCH v5 20/28] target/mips: Fix emulation of microMIPS R6 .

2018-10-12 Thread Aleksandar Markovic
From: Matthew Fortune Fix emulation of microMIPS R6 . instructions. Their handling was permuted. Reviewed-by: Aleksandar Markovic Signed-off-by: Matthew Fortune Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 16 1 file changed, 8 insertions(+), 8

[Qemu-devel] [PATCH v5 17/28] target/mips: Add bit definitions for DSP R3 ASE

2018-10-12 Thread Aleksandar Markovic
From: Stefan Markovic Add DSP R3 ASE related bit definition for insn_flags and hflags. Reviewed-by: Aleksandar Markovic Signed-off-by: Stefan Markovic Signed-off-by: Aleksandar Markovic --- target/mips/cpu.h | 1 + target/mips/mips-defs.h | 1 + 2 files changed, 2 insertions(+) diff

[Qemu-devel] [PATCH v5 12/28] target/mips: Add reset state for PWSize and PWField registers

2018-10-12 Thread Aleksandar Markovic
From: Yongbok Kim Add reset state for PWSize and PWField registers. The reset state is different for pre-R6 and R6 (and post-R6) ISAa. Reviewed-by: Aleksandar Markovic Signed-off-by: Yongbok Kim Signed-off-by: Aleksandar Markovic --- target/mips/translate.c | 18 ++ 1 file

[Qemu-devel] [PATCH v5 16/28] target/mips: Add CP0 SAARI and SAAR registers

2018-10-12 Thread Aleksandar Markovic
From: Yongbok Kim SAARI (Special Address Access Register Index) provides an index into the SAAR register to indicate whether the ITU or other block is being accessed. SAAR (Special Address Access Register) stores the base address where the ITU will be located, as well as the block size.

[Qemu-devel] [PATCH v5 13/28] target/mips: Implement hardware page table walker

2018-10-12 Thread Aleksandar Markovic
From: Yongbok Kim Implement hardware page table walker. Reviewed-by: Aleksandar Markovic Signed-off-by: Yongbok Kim Signed-off-by: Aleksandar Markovic --- target/mips/helper.c| 369 +++- target/mips/internal.h | 1 + target/mips/op_helper.c

[Qemu-devel] [PATCH v5 18/28] target/mips: Add availability control for DSP R3 ASE

2018-10-12 Thread Aleksandar Markovic
From: Stefan Markovic Add infrastructure for availability control for DSP R3 ASE MIPS instructions. Only BPOSGE32C currently belongs to DSP R3 ASE, but this is likely to be changed in near future. Reviewed-by: Aleksandar Markovic Signed-off-by: Stefan Markovic Signed-off-by: Aleksandar

[Qemu-devel] [PATCH v5 10/28] target/mips: Add CPO PWSize register

2018-10-12 Thread Aleksandar Markovic
From: Yongbok Kim Add PWSize register (CP0 Register 5, Select 7). The PWSize register configures hardware page table walking for TLB refills. This register is required for the hardware page walker feature. It exists only if Config3 PW bit is set to 1. It contains following fields: GDW

[Qemu-devel] [PATCH v5 11/28] target/mips: Add CPO PWCtl register

2018-10-12 Thread Aleksandar Markovic
From: Yongbok Kim Add PWCtl register (CP0 Register 5, Select 6). The PWCtl register configures hardware page table walking for TLB refills. This register is required for the hardware page walker feature. It exists only if Config3 PW bit is set to 1. It contains following fields: PWEn (31)

[Qemu-devel] [PATCH v5 05/28] linux-user: Add infrastructure for handling MIPS-specific prctl()

2018-10-12 Thread Aleksandar Markovic
From: Stefan Markovic Add infrastructure for handling MIPS-specific prctl(). This is, for now, just an empty placeholder. The real handling will be implemented in subsequent patches. Signed-off-by: Stefan Markovic Signed-off-by: Aleksandar Markovic --- linux-user/syscall.c | 8 1

[Qemu-devel] [PATCH v5 08/28] target/mips: Add CPO PWBase register

2018-10-12 Thread Aleksandar Markovic
From: Yongbok Kim Add PWBase register (CP0 Register 5, Select 5). The PWBase register contains the Page Table Base virtual address. This register is required for the hardware page walker feature. It exists only if Config3 PW bit is set to 1. Reviewed-by: Aleksandar Markovic Signed-off-by:

[Qemu-devel] [PATCH v5 07/28] linux-user: Add the field for kernel thread info flags

2018-10-12 Thread Aleksandar Markovic
From: Stefan Markovic Add the field for kernel thread info flags. This is essentially copied form kernel header mips/include/asm/thread_info.h. Signed-off-by: Stefan Markovic Signed-off-by: Aleksandar Markovic --- linux-user/qemu.h | 12 1 file changed, 12 insertions(+) diff

[Qemu-devel] [PATCH v5 09/28] target/mips: Add CPO PWField register

2018-10-12 Thread Aleksandar Markovic
From: Yongbok Kim Add PWField register (CP0 Register 5, Select 6). The PWField register configures hardware page table walking for TLB refills. This register is required for the hardware page walker feature. It exists only if Config3 PW bit is set to 1. It contains following fields: GDI

[Qemu-devel] [PATCH v5 02/28] elf: Add MIPS_ABI_FP_XXX constants

2018-10-12 Thread Aleksandar Markovic
From: Stefan Markovic Add MIPS_ABI_FP_XXX constants to elf.h. The source of information is kernel header arch/mips/include/asm/elf.h. Reviewed-by: Aleksandar Markovic Signed-off-by: Stefan Markovic Signed-off-by: Aleksandar Markovic --- include/elf.h | 8 1 file changed, 8

[Qemu-devel] [PATCH v5 03/28] elf: Add Mips_elf_abiflags_v0 structure

2018-10-12 Thread Aleksandar Markovic
From: Stefan Markovic Add Mips_elf_abiflags_v0 structure to elf.h. The source of information is kernel header arch/mips/include/asm/elf.h. Reviewed-by: Aleksandar Markovic Signed-off-by: Stefan Markovic Signed-off-by: Aleksandar Markovic --- include/elf.h | 15 +++ 1 file

[Qemu-devel] [PATCH v5 06/28] linux-user: Add fields that correspond to kernel arch_elf_state

2018-10-12 Thread Aleksandar Markovic
From: Stefan Markovic Add fields that correspond to kernel arch_elf_state. This is essentially copied from kernel arch/mips/kernel/elf.c. Signed-off-by: Stefan Markovic Signed-off-by: Aleksandar Markovic --- linux-user/qemu.h | 9 + 1 file changed, 9 insertions(+) diff --git

[Qemu-devel] [PATCH v5 01/28] elf: Fix PT_MIPS_XXX constants

2018-10-12 Thread Aleksandar Markovic
From: Stefan Markovic Fix existing and add missing PT_MIPS_XXX constants in elf.h. This is copied from kernel header arch/mips/include/asm/elf.h. Reviewed-by: Aleksandar Markovic Signed-off-by: Stefan Markovic Signed-off-by: Aleksandar Markovic --- include/elf.h | 7 +-- 1 file changed,

[Qemu-devel] [PATCH v5 04/28] linux-user: Add MIPS-specific prctl() options

2018-10-12 Thread Aleksandar Markovic
From: Stefan Markovic Add MIPS-specific prctl() options TARGET_PR_SET_FP_MODE and TARGET_PR_SET_FP_MODE. These values are essentially copied from linux kernel header include/uapi/linux/prctl.h. This is done in a way consistent with a similar case of aarch64-specific prctl() options

[Qemu-devel] [PATCH v5 00/28] Misc MIPS fixes and improvements for October 2018

2018-10-12 Thread Aleksandar Markovic
From: Aleksandar Markovic This series contains support for MIPS ABI flags in elf.h, MIPS-specifics of prctl(), hardware page table walker, DSP R3 availability control, and emulation of nanoMIPS EVA instructions. It also contains support for WatchHi, MemoryMapID, SAARI, and SAAR registers, ITU

[Qemu-devel] [PATCH] Makefile: Install new vgabios binaries

2018-10-12 Thread Alex Williamson
Difficult to make use of if not installed Fixes: cd1bfd5ef336 ("seabios: update bios and vgabios binaries") Signed-off-by: Alex Williamson --- Makefile |1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index 1144d6e3ba0e..f2947186a4c3 100644 --- a/Makefile +++

Re: [Qemu-devel] [PULL 0/3] Ui 20181012 patches

2018-10-12 Thread Peter Maydell
the git repository at: > > git://git.kraxel.org/qemu tags/ui-20181012-pull-request > > for you to fetch changes up to 1d454c3fee00d9d1e46e1ec6788d49da5a0bfdb0: > > gtk: fix uninitialized variable (2018-10-12 14:49:03 +0200) > > ---

Re: [Qemu-devel] [PATCH v2 1/8] block: Update flags in bdrv_set_read_only()

2018-10-12 Thread Eric Blake
On 10/12/18 6:55 AM, Kevin Wolf wrote: To fully change the read-only state of a node, we must not only change bs->read_only, but also update bs->open_flags. Signed-off-by: Kevin Wolf --- block.c | 7 +++ 1 file changed, 7 insertions(+) Reviewed-by: Eric Blake diff --git a/block.c

Re: [Qemu-devel] [PATCH v5 0/5] Connect a PCIe host and graphics support to RISC-V

2018-10-12 Thread Alistair Francis
On Fri, Oct 12, 2018 at 6:46 AM Andrea Bolognani wrote: > > On Thu, 2018-10-11 at 10:40 -0700, Alistair Francis wrote: > > On Wed, Oct 10, 2018 at 11:00 PM Andrea Bolognani > > wrote: > > > The gpex-pcihost device was introduced at the same time as > > > aarch64/virt gained PCI support, so we

Re: [Qemu-devel] [PULL 0/5] Vga 20181012 patches

2018-10-12 Thread Peter Maydell
the git repository at: > > git://git.kraxel.org/qemu tags/vga-20181012-pull-request > > for you to fetch changes up to b398f03c60bb5739ae68c161c315c7cce8ef2fde: > > hw/display/cirrus_vga: Move "isa-cirrus-vga" device into

Re: [Qemu-devel] [PATCH v5 0/9] Clock framework API.

2018-10-12 Thread Damien Hedde
Hi Peter, Sorry to bother you with this, but you said some time ago you would write something about reset. On 10/2/18 4:24 PM, Damien Hedde wrote: > There is also the problem of initialization which is very much like the > migration. Currently, in the zynq example, clocks outputs are initialized

Re: [Qemu-devel] [PATCH v3 8/8] qcow2: Read outside array bounds in qcow2_pre_write_overlap_check()

2018-10-12 Thread Max Reitz
On 31.08.18 20:16, Liam Merwick wrote: > The commit for 0e4e4318eaa5 increments QCOW2_OL_MAX_BITNR but does not > add an array entry for QCOW2_OL_BITMAP_DIRECTORY_BITNR to metadata_ol_names[]. > As a result, an array dereference of metadata_ol_names[8] in > qcow2_pre_write_overlap_check() could

Re: [Qemu-devel] [PATCH v3 6/8] block: dump_qlist() may dereference a Null pointer

2018-10-12 Thread Max Reitz
On 31.08.18 20:16, Liam Merwick wrote: > A NULL 'list' passed into function dump_qlist() isn't correctly > validated and can be passed to qlist_first() where it is dereferenced. > > Given that dump_qlist() is static, and callers already do the right > thing, just add an assert to catch future

Re: [Qemu-devel] [PATCH v3 5/8] block: Fix potential Null pointer dereferences in vvfat.c

2018-10-12 Thread Max Reitz
On 31.08.18 20:16, Liam Merwick wrote: > The calls to bdrv_new_open_driver(), find_mapping_for_cluster(), > and array_get_next() may return NULL but it isn't always checked for > before dereferencing the value returned. > > Signed-off-by: Liam Merwick > Reviewed-by: Darren Kenny > Reviewed-by:

Re: [Qemu-devel] [PATCH 30/31] blockdev: Convert drive_new() to Error

2018-10-12 Thread Kevin Wolf
Am 12.10.2018 um 14:28 hat Max Reitz geschrieben: > >>> @@ -1155,8 +1155,7 @@ static void default_drive(int enable, int snapshot, > >>> BlockInterfaceType type, > >>> drive_enable_snapshot(NULL, opts, NULL); > >>> } > >>> > >>> -dinfo = drive_new(opts, type); > >>> -

Re: [Qemu-devel] [PATCH v3 4/8] qemu-img: potential Null pointer deref in img_commit()

2018-10-12 Thread Max Reitz
On 31.08.18 20:16, Liam Merwick wrote: > The function block_job_get() may return NULL so before dereferencing > the 'job' pointer in img_commit() it should be checked. It may not because the job yields before executing anything (if it started successfully; but otherwise, commit_active_start()

[Qemu-devel] [PATCH 10/10] target/arm: Report correct syndrome for FP/SIMD traps to Hyp mode

2018-10-12 Thread Peter Maydell
For traps of FP/SIMD instructions to AArch32 Hyp mode, the syndrome provided in HSR has more information than is reported to AArch64. Specifically, there are extra fields TA and coproc which indicate whether the trapped instruction was FP or SIMD. Add this extra information to the syndromes we

Re: [Qemu-devel] [PATCH v3 3/8] block: Null pointer dereference in blk_root_get_parent_desc()

2018-10-12 Thread Max Reitz
Hi, On 31.08.18 20:16, Liam Merwick wrote: > The dev_id returned by the call to blk_get_attached_dev_id() in > blk_root_get_parent_desc() can be NULL (an internal call to > object_get_canonical_path may have returned NULL) so it should > be checked before dereferencing. > > Signed-off-by: Liam

[Qemu-devel] [PATCH 06/10] target/arm: Implement HCR.VI and VF

2018-10-12 Thread Peter Maydell
The HCR_EL2 VI and VF bits are supposed to track whether there is a pending virtual IRQ or virtual FIQ. For QEMU we store the pending VIRQ/VFIQ status in cs->interrupt_request, so this means: * if the register is read we must get these bit values from cs->interrupt_request * if the register

[Qemu-devel] [PATCH 05/10] target/arm: ISR_EL1 bits track virtual interrupts if IMO/FMO set

2018-10-12 Thread Peter Maydell
The A/I/F bits in ISR_EL1 should track the virtual interrupt status, not the physical interrupt status, if the associated HCR_EL2.AMO/IMO/FMO bit is set. Implement this, rather than always showing the physical interrupt status. We don't currently implement anything to do with external aborts, so

[Qemu-devel] [PATCH 09/10] target/arm: Get IL bit correct for v7 syndrome values

2018-10-12 Thread Peter Maydell
For the v7 version of the Arm architecture, the IL bit in syndrome register values where the field is not valid was defined to be UNK/SBZP. In v8 this is RES1, which is what QEMU currently implements. Handle the desired v7 behaviour by squashing the IL bit for the affected cases: * EC ==

[Qemu-devel] [PATCH 07/10] target/arm: Implement HCR.PTW

2018-10-12 Thread Peter Maydell
If the HCR_EL2 PTW virtualizaiton configuration register bit is set, then this means that a stage 2 Permission fault must be generated if a stage 1 translation table access is made to an address that is mapped as Device memory in stage 2. Implement this. Signed-off-by: Peter Maydell ---

[Qemu-devel] [PATCH 08/10] target/arm: New utility function to extract EC from syndrome

2018-10-12 Thread Peter Maydell
Create and use a utility function to extract the EC field from a syndrome, rather than open-coding the shift. Signed-off-by: Peter Maydell --- target/arm/internals.h | 5 + target/arm/helper.c| 4 ++-- target/arm/kvm64.c | 2 +- target/arm/op_helper.c | 2 +- 4 files changed, 9

[Qemu-devel] [PATCH 03/10] target/arm: Implement HCR.FB

2018-10-12 Thread Peter Maydell
The HCR.FB virtualization configuration register bit requests that TLB maintenance, branch predictor invalidate-all and icache invalidate-all operations performed in NS EL1 should be upgraded from "local CPU only to "broadcast within Inner Shareable domain". For QEMU we NOP the branch predictor

[Qemu-devel] [PATCH 00/10] target/arm: more HCR bits, improve syndrome reporting

2018-10-12 Thread Peter Maydell
I'm currently trying to track down why my AArch32 Hyp mode test images don't work, and thought I'd start by patching a few of the holes we have in our implementation. (Haven't found the problem yet, sadly.) This patchset: * implements HCR.{FB,DC,VI,VF,PTW} * fixes ISR_EL1 in the

[Qemu-devel] [PATCH 01/10] target/arm: Improve debug logging of AArch32 exception return

2018-10-12 Thread Peter Maydell
For AArch32, exception return happens through certain kinds of CPSR write. We don't currently have any CPU_LOG_INT logging of these events (unlike AArch64, where we log in the ERET instruction). Add some suitable logging. This will log exception returns like this: Exception return from AArch32

[Qemu-devel] [PATCH 02/10] target/arm: Make switch_mode() file-local

2018-10-12 Thread Peter Maydell
The switch_mode() function is defined in target/arm/helper.c and used only in that file and nowhere else, so we can make it file-local rather than global. Signed-off-by: Peter Maydell --- target/arm/internals.h | 1 - target/arm/helper.c| 6 -- 2 files changed, 4 insertions(+), 3

[Qemu-devel] [PATCH 04/10] target/arm: Implement HCR.DC

2018-10-12 Thread Peter Maydell
The HCR.DC virtualization configuration register bit has the following effects: * SCTLR.M behaves as if it is 0 for all purposes except direct reads of the bit * HCR.VM behaves as if it is 1 for all purposes except direct reads of the bit * the memory type produced by the first stage of

Re: [Qemu-devel] [PATCH 14/31] numa: Fix QMP command set-numa-node error handling

2018-10-12 Thread Igor Mammedov
On Mon, 8 Oct 2018 19:31:08 +0200 Markus Armbruster wrote: > Calling error_report() in a function that takes an Error ** argument > is suspicious. parse_numa_node() does that, and then exit()s. It > also passes _fatal to machine_set_cpu_numa_node(). Both wrong. > Attempting to configure numa

Re: [Qemu-devel] [PATCH v4 18/24] qdev: hotplug: provide do_unplug handler

2018-10-12 Thread Igor Mammedov
On Fri, 12 Oct 2018 10:45:41 +0200 David Hildenbrand wrote: > > > > The correct order should be opposite to one that created a devices, > > i.e. unplug -> unrealize -> delete. > > Doing unplug stuff after device was unrealized looks outright wrong > > (essentially device doesn't exists anymore

Re: [Qemu-devel] [PATCH v2 4/8] nbd: Support auto-read-only option

2018-10-12 Thread Eric Blake
On 10/12/18 6:55 AM, Kevin Wolf wrote: If read-only=off, but auto-read-only=on is given, open a read-write NBD connection if the server provides a read-write export, but instead of erroring out for read-only exports, just degrade to read-only. Signed-off-by: Kevin Wolf --- block/nbd-client.c

[Qemu-devel] [PULL 0/2] Ui2 20181012 patches

2018-10-12 Thread Gerd Hoffmann
The following changes since commit 69ac8c4cb93f2685839ff7b857cef306b388ff3c: Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20181012' into staging (2018-10-12 12:40:04 +0100) are available in the git repository at: git://git.kraxel.org/qemu tags/ui2-20181012-pull-request for you

[Qemu-devel] [PULL 2/2] ui: increase min required GTK3 version to 3.14.0

2018-10-12 Thread Gerd Hoffmann
From: Daniel P. Berrangé Per supported platforms doc[1], the various min GTK3 on relevant distros is: RHEL-7.0: 3.8.8 RHEL-7.2: 3.14.13 RHEL-7.4: 3.22.10 RHEL-7.5: 3.22.26 Debian (Stretch): 3.22.11 Debian (Jessie): 3.14.5 OpenBSD (Ports): 3.22.30 FreeBSD (Ports): 3.22.29

[Qemu-devel] [PULL 1/2] ui: remove support for GTK2 in favour of GTK3

2018-10-12 Thread Gerd Hoffmann
From: Daniel P. Berrangé GTK2 was deprecated in the 2.12.0 release with: commit b7715af2b31f47060cc5b4be930d16c13be93fa9 Author: Daniel P. Berrange Date: Tue Dec 12 11:34:40 2017 + ui: deprecate use of GTK 2.x in favour of 3.x series The GTK 3.0 release was made in Feb,

Re: [Qemu-devel] [PATCH v5 0/5] Connect a PCIe host and graphics support to RISC-V

2018-10-12 Thread Andrea Bolognani
On Thu, 2018-10-11 at 10:40 -0700, Alistair Francis wrote: > On Wed, Oct 10, 2018 at 11:00 PM Andrea Bolognani wrote: > > The gpex-pcihost device was introduced at the same time as > > aarch64/virt gained PCI support, so we can probe the binary[1] and, > > if the device is present, we know that

Re: [Qemu-devel] [PATCH v5 8/9] hw/char/cadence_uart: add clock support

2018-10-12 Thread Damien Hedde
Hi Philippe, On 10/3/18 1:26 AM, Philippe Mathieu-Daudé wrote: > Hi Damien, > > On 10/2/18 4:24 PM, Damien Hedde wrote: >> Add bus interface and uart reference clock inputs. >> >> Note: it is hard to find out from the doc what is the behavior when only one >> of the clock is disabled. >> >>

Re: [Qemu-devel] [PATCH] sdl2: Support all virtio-gpu formats

2018-10-12 Thread Max Reitz
On 12.10.18 14:48, Gerd Hoffmann wrote: > On Mon, Oct 08, 2018 at 08:50:13PM +0200, Max Reitz wrote: >> There are some 2D resource formats that can be used through virtio-gpu, >> but which are not supported by SDL2 when used for a scanout; these are >> all alpha-channel formats and also XBGR (RGBX

Re: [Qemu-devel] [PATCH v4 07/22] target/mips: Add CPO PWCtl register

2018-10-12 Thread Aleksandar Markovic
> From: Yongbok Kim > > Add PWCtl register (CP0 Register 5, Select 6). Please bump version_id and minimum_version_id of vmstate_mips_cpu in machine.c. Other than this: Reviewed-by: Aleksandar Markovic

Re: [Qemu-devel] [PATCH v4 15/22] target/mips: Fix emulation of microMIPS R6 SELEQZ. SELNEZ.

2018-10-12 Thread Aleksandar Markovic
> From: Matthew Fortune > > Fix emulation of microMIPS R6 SELEQZ. SELNEZ. instructions. > Their handling was permuted. "." can be used in the title and commit message.. Other than this: Reviewed-by: Aleksandar Markovic

Re: [Qemu-devel] [PATCH v4 04/22] target/mips: Add CPO PWBase register

2018-10-12 Thread Aleksandar Markovic
> From: Yongbok Kim > > Add PWBase register (CP0 Register 5, Select 5). > > The PWBase register contains the Page Table Base virtual address. > > This register is required for the hardware page walker feature. It > exists only if Config3 PW bit is set to 1. > > Signed-off-by: Yongbok Kim >

Re: [Qemu-devel] [PATCH v4 14/22] target/mips: Improve DSP R2/R3-related naming

2018-10-12 Thread Aleksandar Markovic
> From: Stefan Markovic > > Do following replacements: > > ASE_DSPR2 -> ASE_DSP_R2 > ASE_DSPR3 -> ASE_DSP_R3 > check_dspr2() -> check_dsp_r2() > check_dspr3() -> check_dsp_r3() There may be a couple of other similar cases. They should be included in this patch. Other than this: Reviewed-by:

Re: [Qemu-devel] [PATCH v4 08/22] target/mips: Implement hardware page table walker

2018-10-12 Thread Aleksandar Markovic
> From: Yongbok Kim > > Implement hardware page table walker. What is missing is initialization of PWField and PWsize register. This initialization is very well documented, and it should be straightforward. Probably the best dobne in a separate patch. Other than this: Reviewed-by: Aleksandar

Re: [Qemu-devel] [PATCH v4 00/22] Misc MIPS fixes and improvements for October 2018

2018-10-12 Thread Aleksandar Markovic
> From: Aleksandar Markovic > > This series contains support for MIPS ABI flags in elf.h... > > Stefan Markovic (6): > elf: Fix PT_MIPS_XXX constants > elf: Add MIPS_ABI_FP_XXX constants > elf: Add Mips_elf_abiflags_v0 structure Hi, Laurent The three patches above are fairly trivial

Re: [Qemu-devel] [PATCH v4 06/22] target/mips: Add CPO PWSize register

2018-10-12 Thread Aleksandar Markovic
> From: Yongbok Kim > > Add PWSize register (CP0 Register 5, Select 7). Please bump version_id and minimum_version_id of vmstate_mips_cpu in machine.c. Other than this: Reviewed-by: Aleksandar Markovic

Re: [Qemu-devel] [PATCH v4 05/22] target/mips: Add CPO PWField register

2018-10-12 Thread Aleksandar Markovic
> From: Yongbok Kim > > Add PWField register (CP0 Register 5, Select 6). > Please bump version_id and minimum_version_id of vmstate_mips_cpu in machine.c. Other than this: Reviewed-by: Aleksandar Markovic

[Qemu-devel] [PULL 0/3] Ui 20181012 patches

2018-10-12 Thread Gerd Hoffmann
The following changes since commit 75e50c80e051423a6f55a34ee4a1eec842444a5b: Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2018-10-10' into staging (2018-10-11 10:43:37 +0100) are available in the git repository at: git://git.kraxel.org/qemu tags/ui-20181012-pull-request

Re: [Qemu-devel] [PATCH v5 7/9] hw/misc/zynq_slcr: add clock generation for uarts

2018-10-12 Thread Peter Maydell
On 12 October 2018 at 14:24, Damien Hedde wrote: > I'm wondering if in such a case (a fixed frequency base clock), we > should have a way to change the frequency through command line ? (In > order to start the machine with, for example, a 50MHz base clock). > But I don't know what's the right way

Re: [Qemu-devel] [PATCH RFC v5 1/7] Fix segmentation fault when qemu_signal_init fails

2018-10-12 Thread Markus Armbruster
Fei Li writes: > On 10/12/2018 03:56 PM, Markus Armbruster wrote: >> Fei Li writes: >> >>> On 10/11/2018 06:02 PM, Markus Armbruster wrote: Fei Li writes: > Currently, when qemu_signal_init() fails it only returns a non-zero > value but without propagating any Error. But its

Re: [Qemu-devel] [PATCH v4 03/22] elf: Add Mips_elf_abiflags_v0 structure

2018-10-12 Thread Aleksandar Markovic
> From: Stefan Markovic > > Add Mips_elf_abiflags_v0 structure to elf.h. The source of information > is kernel header arch/mips/include/asm/elf.h. > > Signed-off-by: Stefan Markovic > Signed-off-by: Aleksandar Markovic > --- Reviewed-by: Aleksandar Markovic

Re: [Qemu-devel] [PATCH v5 7/9] hw/misc/zynq_slcr: add clock generation for uarts

2018-10-12 Thread Damien Hedde
Hi Philippe, On 10/3/18 1:10 AM, Philippe Mathieu-Daudé wrote: > Hi Damien, > > On 10/2/18 4:24 PM, Damien Hedde wrote: >> Add 2 clock outputs for each uart (uart0 & 1): >> + the reference clock >> + the bus interface clock >> >> The clock frequencies are computed using the internal pll & uart

[Qemu-devel] [PULL 1/3] gtk: Don't vte_terminal_set_encoding() on new VTE versions

2018-10-12 Thread Gerd Hoffmann
From: Kevin Wolf The function vte_terminal_set_encoding() is deprecated since VTE 0.54, so stop calling it from that version on. This fixes a build error because of our use of warning flags [-Werror=deprecated-declarations]. Fixes: https://bugs.launchpad.net/bugs/1794939 Reported-by: Bastian

Re: [Qemu-devel] [PATCH v4 02/22] elf: Add MIPS_ABI_FP_XXX constants

2018-10-12 Thread Aleksandar Markovic
> From: Stefan Markovic > > Add MIPS_ABI_FP_XXX constants to elf.h. The source of information > is kernel header arch/mips/include/asm/elf.h. > >Signed-off-by: Stefan Markovic > Signed-off-by: Aleksandar Markovic > --- Reviewed-by: Aleksandar Markovic

[Qemu-devel] [PULL 3/3] gtk: fix uninitialized variable

2018-10-12 Thread Gerd Hoffmann
From: Paolo Bonzini zoom_to_fit is never initialized to false, Coverity complains (not sure why GCC does not). Fixes: e8b1386ea1719525a1a92df03377764703fe8c64 Cc: kra...@redhat.com Signed-off-by: Paolo Bonzini Reviewed-by: Philippe Mathieu-Daudé Message-id:

[Qemu-devel] [PULL 2/3] sdl2: Support all virtio-gpu formats

2018-10-12 Thread Gerd Hoffmann
From: Max Reitz There are some 2D resource formats that can be used through virtio-gpu, but which are not supported by SDL2 when used for a scanout; these are all alpha-channel formats and also XBGR (RGBX in non-BE pixman). Add these formats in the switch converting pixman to SDL format

Re: [Qemu-devel] [PATCH v4 01/22] elf: Fix PT_MIPS_XXX constants

2018-10-12 Thread Aleksandar Markovic
> From: Stefan Markovic > > Fix existing and add missing PT_MIPS_XXX constants in elf.h. > This is copied from kernel header arch/mips/include/asm/elf.h. > > Signed-off-by: Stefan Markovic > Signed-off-by: Aleksandar Markovic > --- Reviewed-by: Aleksandar Markovic

[Qemu-devel] [PATCH v2 1/2] qapi: move to QOM path for x-block-latency-histogram-set

2018-10-12 Thread Vladimir Sementsov-Ogievskiy
Move to way of device selecting, however fall back to device name if path is not found. Signed-off-by: Vladimir Sementsov-Ogievskiy --- qapi/block-core.json | 4 ++-- blockdev.c | 16 2 files changed, 14 insertions(+), 6 deletions(-) diff --git

[Qemu-devel] [PATCH v2 2/2] qapi: drop x- from x-block-latency-histogram-set

2018-10-12 Thread Vladimir Sementsov-Ogievskiy
Drop x- and x_ prefixes for latency histograms and update version to 3.1 Signed-off-by: Vladimir Sementsov-Ogievskiy --- qapi/block-core.json | 20 ++-- block/qapi.c | 12 ++-- blockdev.c | 2 +- 3 files changed, 17 insertions(+), 17 deletions(-) diff

[Qemu-devel] [PATCH v2 0/2] improve block-latency-histogram-set

2018-10-12 Thread Vladimir Sementsov-Ogievskiy
Support QOM path for block-latency-histogram-set and drop x- prefix. Libvirt discussion (not yet updated for using id instead of device): https://www.redhat.com/archives/libvir-list/2018-September/msg00011.html v2: id,device -> id (with fall back to device name) fix versions and all

Re: [Qemu-devel] QOM: Can devices having link properties be user-creatable?

2018-10-12 Thread Peter Maydell
On 12 October 2018 at 14:06, Philippe Mathieu-Daudé wrote: > On 12/10/2018 15:01, Peter Maydell wrote: >> On 12 October 2018 at 13:47, Philippe Mathieu-Daudé >> wrote: >>> While looking at Mao's series >>> (https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg02519.html) I >>> wondered if

Re: [Qemu-devel] QOM: Can devices having link properties be user-creatable?

2018-10-12 Thread Philippe Mathieu-Daudé
On 12/10/2018 15:01, Peter Maydell wrote: > On 12 October 2018 at 13:47, Philippe Mathieu-Daudé wrote: >> While looking at Mao's series >> (https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg02519.html) I >> wondered if devices having link properties can be user-creatable. >> >> Using the

Re: [Qemu-devel] [PATCH v2 2/2] hw/vfio/display: add ramfb support

2018-10-12 Thread Alex Williamson
On Fri, 12 Oct 2018 10:43:02 +0200 Gerd Hoffmann wrote: > Hi, > > > > OnOffAuto display; > > > +bool enable_ramfb; > > > int32_t bootindex; > > > uint32_t igd_gms; > > > OffAutoPCIBAR msix_relo; > > > > Hi Gerd, > > > > One tiny nit here, we can move this new bool

Re: [Qemu-devel] QOM: Can devices having link properties be user-creatable?

2018-10-12 Thread Peter Maydell
On 12 October 2018 at 13:47, Philippe Mathieu-Daudé wrote: > While looking at Mao's series > (https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg02519.html) I > wondered if devices having link properties can be user-creatable. > > Using the following patch (I don't think this is correct to

Re: [Qemu-devel] [Spice-devel] [PATCH] spice: prepare for upcoming spice-server change

2018-10-12 Thread Lukáš Hrázký
On Fri, 2018-10-12 at 13:45 +0200, Gerd Hoffmann wrote: > Future spice-server versions will call the client_monitors_config > callback with the monitors list filtered to only include the monitors > of the given display channel (aka QXLInstance). Luckily this is easily > detectable at runtime, so

Re: [Qemu-devel] [PATCH] sdl2: Support all virtio-gpu formats

2018-10-12 Thread Gerd Hoffmann
On Mon, Oct 08, 2018 at 08:50:13PM +0200, Max Reitz wrote: > There are some 2D resource formats that can be used through virtio-gpu, > but which are not supported by SDL2 when used for a scanout; these are > all alpha-channel formats and also XBGR (RGBX in non-BE pixman). > > Add these formats in

[Qemu-devel] QOM: Can devices having link properties be user-creatable?

2018-10-12 Thread Philippe Mathieu-Daudé
While looking at Mao's series (https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg02519.html) I wondered if devices having link properties can be user-creatable. Using the following patch (I don't think this is correct to put qdev code into qobject, but I used this as PoC): -- >8 -- diff

Re: [Qemu-devel] [PATCH v2] ui/vnc.c: polish vnc_init_func

2018-10-12 Thread Philippe Mathieu-Daudé
Hi Fei, On 12/10/2018 13:50, Fei Li wrote: > Add a new Error parameter for vnc_display_init() to handle errors > in its caller: vnc_init_func(), just like vnc_display_open() does. > And let its callees propagate the Error, like init_keyboard_layout(). > > Signed-off-by: Fei Li > --- >

Re: [Qemu-devel] [PULL 0/8] s390x updates

2018-10-12 Thread Peter Maydell
the Git repository at: > > git://github.com/cohuck/qemu tags/s390x-20181012 > > for you to fetch changes up to 0161215d435ef5680c4623bcbdfe89ce5b35cf42: > > hw/s390x: Include the tod-qemu also for builds with --disab

[Qemu-devel] [PULL 0/5] Vga 20181012 patches

2018-10-12 Thread Gerd Hoffmann
The following changes since commit 75e50c80e051423a6f55a34ee4a1eec842444a5b: Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2018-10-10' into staging (2018-10-11 10:43:37 +0100) are available in the git repository at: git://git.kraxel.org/qemu tags/vga-20181012-pull-request

[Qemu-devel] [PULL 2/5] bochs-display: wire up edid support

2018-10-12 Thread Gerd Hoffmann
Signed-off-by: Gerd Hoffmann Message-id: 20181005160147.892-3-kra...@redhat.com --- hw/display/bochs-display.c | 13 + hw/display/Makefile.objs | 1 + 2 files changed, 14 insertions(+) diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c index

[Qemu-devel] [PULL 1/5] display: add separate config option for bochs-display

2018-10-12 Thread Gerd Hoffmann
This allows modern architectures which don't care about vga compatibility (risc-v for example) build bochs-display without including all vga emulation too. Signed-off-by: Gerd Hoffmann Reviewed-by: Alistair Francis Message-id: 20181005160147.892-2-kra...@redhat.com --- default-configs/pci.mak

[Qemu-devel] [PULL 5/5] hw/display/cirrus_vga: Move "isa-cirrus-vga" device into a separate file

2018-10-12 Thread Gerd Hoffmann
From: Thomas Huth In downstream distros like RHEL we'd like to disable some of the "legacy" devices of QEMU. The ISA version of the Cirrus VGA device is one of these legacy devices. So let's make the build process a little bit more flexible here by putting the Cirrus ISA code into a separate

[Qemu-devel] [PULL 3/5] qxl: check qxl_phys2virt return value

2018-10-12 Thread Gerd Hoffmann
Fixes: CID 1395986 Fixes: 979f7ef8966bc4495a710ed9e4af42098f92ee79 Signed-off-by: Gerd Hoffmann Reviewed-by: Philippe Mathieu-Daudé Message-id: 20181005134608.1251-1-kra...@redhat.com --- hw/display/qxl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/display/qxl.c

[Qemu-devel] [PULL 4/5] i2c: switch ddc to use the new edid generator

2018-10-12 Thread Gerd Hoffmann
This also makes the default display resolution configurable, via xres and yres properties. The default is 1024x768. The old code had a hard-coded resolution of 1600x1200. Cc: Linus Walleij Cc: BALATON Zoltan Signed-off-by: Gerd Hoffmann Message-id: 20181005110837.28209-1-kra...@redhat.com

Re: [Qemu-devel] [PATCH v2 2/3] audio: use object link instead ofqdev property to pass wm8750 reference

2018-10-12 Thread Philippe Mathieu-Daudé
Cc'ing Eduardo and Thomas. On 12/10/2018 13:51, maozy wrote: > Hi, Philippe > > On 10/12/18 5:53 PM, Philippe Mathieu-Daudé wrote: >> Hi Mao, >> >> On 12/10/2018 10:30, Mao Zhongyi wrote: >>> According to qdev-properties.h, properties of pointer type should >>> be avoided, it seems a link type

Re: [Qemu-devel] [PATCH 30/31] blockdev: Convert drive_new() to Error

2018-10-12 Thread Max Reitz
On 12.10.18 07:44, Markus Armbruster wrote: > Copying Marc-André for a possible connection to his recent work on > improving help. Marc-André, search for "format=help". Just in case you > have further observations to offer. > > Max Reitz writes: > >> On 08.10.18 19:31, Markus Armbruster

[Qemu-devel] about qemu crash in scsi_handle_rw_error

2018-10-12 Thread Wangguang
Hi qemu had a assert when we use scsi-3 reservation。 This happen when scsi sence is recoverd error。 And which lead scsi_req_complete twice. static bool scsi_handle_rw_error(SCSIDiskReq *r, int error, bool acct_failed) { bool is_read = (r->req.cmd.mode == SCSI_XFER_FROM_DEV);

Re: [Qemu-devel] [PATCH v2] ui/vnc.c: polish vnc_init_func

2018-10-12 Thread Fei Li
On 10/12/2018 07:50 PM, Fei Li wrote: Add a new Error parameter for vnc_display_init() to handle errors in its caller: vnc_init_func(), just like vnc_display_open() does. And let its callees propagate the Error, like init_keyboard_layout(). Signed-off-by: Fei Li As this version do a big

[Qemu-devel] [PATCH v2 8/8] iscsi: Support auto-read-only option

2018-10-12 Thread Kevin Wolf
If read-only=off, but auto-read-only=on is given, open the volume read-write if we have the permissions, but instead of erroring out for read-only volumes, just degrade to read-only. Signed-off-by: Kevin Wolf --- block/iscsi.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff

[Qemu-devel] [PATCH v2 6/8] curl: Support auto-read-only option

2018-10-12 Thread Kevin Wolf
If read-only=off, but auto-read-only=on is given, just degrade to read-only. Signed-off-by: Kevin Wolf --- block/curl.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/block/curl.c b/block/curl.c index fabb2b4da7..db5d2bd8ef 100644 --- a/block/curl.c +++

[Qemu-devel] [PATCH v2 5/8] file-posix: Support auto-read-only option

2018-10-12 Thread Kevin Wolf
If read-only=off, but auto-read-only=on is given, open the file read-write if we have the permissions, but instead of erroring out for read-only files, just degrade to read-only. Signed-off-by: Kevin Wolf --- block/file-posix.c | 13 + 1 file changed, 13 insertions(+) diff --git

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