[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/965867
Title:
9p virtual f
[Expired for qemu-kvm (Ubuntu) because there has been no activity for 60
days.]
** Changed in: qemu-kvm (Ubuntu)
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/965
[Expired for qemu-kvm (Ubuntu) because there has been no activity for 60
days.]
** Changed in: qemu-kvm (Ubuntu)
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/118
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1180777
Title:
RDP traffic
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1681439
Title:
qemu-system
bFLT format header doesn't have enough information to register a handler
for a specific architecture. Add switch -f / --flat that registers one
of the qemu binaries as a handler for bFLT executable images.
Signed-off-by: Max Filippov
---
Changes v1->v2:
- drop unintended changes to dtc;
scripts
On Sat, Oct 20, 2018 at 7:45 PM Max Filippov wrote:
>
> bFLT format header doesn't have enough information to register a handler
> for a specific architecture. Add switch -f / --flat that registers one
> of the qemu binaries as a handler for bFLT executable images.
>
> Signed-off-by: Max Filippov
bFLT format header doesn't have enough information to register a handler
for a specific architecture. Add switch -f / --flat that registers one
of the qemu binaries as a handler for bFLT executable images.
Signed-off-by: Max Filippov
---
dtc | 2 +-
scripts/qemu-binfmt-c
Thanks for replying Roman, I switched to your tap but even before that
I'm not struggling to get the machines to boot even without the smp/numa
lines... vga std flashes a lot then hangs with a black screen and a
blinking cursor whereas vga vmware quite unexpectedly.
Command to start QEMU:
qemu-sy
Also seeing quite a few of these errors
Unimplemented handler (7f7a56978294) for 0 (f 7f)
Unimplemented handler (7f2eaa6c8849) for 0 (f 7f)
Unimplemented handler (7f82f92a9294) for 0 (f 7f)
Unimplemented handler (7f04702f2294) for 0 (f 7f)
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You received this bug notification because you are
On 19/10/2018 18:54, Peter Maydell wrote:
> On 19 October 2018 at 17:44, Paolo Bonzini wrote:
>> On 19/10/2018 18:25, Philippe Mathieu-Daudé wrote:
>>>
>>> First because I'm using it heavily on MIPS and PPC boards, when no
>>> datashits are available.
>>> I'll submit that during the next merge win
On 10/19/18 10:49 AM, Peter Maydell wrote:
> This patchset fixes a minor bug in our handling of SIGTRAP
> in linux-user.
>
> The CPU main-loop routines for linux-user generally call
> gdb_handlesig() when they're about to queue a SIGTRAP signal. This
> is wrong, because queue_signal() will cause
On 10/20/18 12:14 AM, Bastian Koppelmann wrote:
> -case OPC_RISC_AUIPC:
> -if (rd == 0) {
> -break; /* NOP */
> -}
> -tcg_gen_movi_tl(cpu_gpr[rd], (sextract64(ctx->opcode, 12, 20) << 12)
> +
> - ctx->base.pc_next);
> -break;
This shoul
On 10/20/18 12:14 AM, Bastian Koppelmann wrote:
> +static int32_t ex_shift_##amount(int imm) \
Not that it'll matter in practice, but s/int32_t/int/.
That's the type that's passed in, and it's the type that
is stored in the argument set structures.
r~
Signed-off-by: Kevin Wolf
---
tests/qemu-iotests/232 | 147 +
tests/qemu-iotests/232.out | 59 +++
tests/qemu-iotests/group | 1 +
3 files changed, 207 insertions(+)
create mode 100755 tests/qemu-iotests/232
create mode 100644 tests/qemu-
While we want machine interfaces like -blockdev and QMP blockdev-add to
add as little auto-detection as possible so that management tools are
explicit about their needs, -drive is a convenience option for human
users. Enabling auto-read-only=on by default there enables users to use
read-only images
On Fri, Oct 19, 2018 at 08:58:31 +0200, Paolo Bonzini wrote:
> On 19/10/2018 03:06, Emilio G. Cota wrote:
> > Soon we will call cpu_has_work without the BQL.
> >
> > Cc: David Gibson
> > Cc: Alexander Graf
> > Cc: qemu-...@nongnu.org
> > Signed-off-by: Emilio G. Cota
> > ---
> > target/ppc/tra
On 19/10/2018 22:23, Eduardo Habkost wrote:
On Fri, Oct 19, 2018 at 09:53:45PM +0200, Igor Mammedov wrote:
On Fri, 19 Oct 2018 15:44:08 -0300
Eduardo Habkost wrote:
On Fri, Oct 19, 2018 at 03:12:31PM +0100, Peter Maydell wrote:
On 18 October 2018 at 21:03, Eduardo Habkost wrote:
The follow
I've had issues with multiple vcpus previously.
But I've tried that recently and it worked fine with the fix:
https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03864.html.
And I've checked your command, no issues.
Could you please try to install qemu from my tap and check if it's gone?
b
On 20/10/2018 00:51, Cleber Rosa wrote:
>
>
> On 10/19/18 5:17 PM, Cleber Rosa wrote:
>>
>>
>> On 10/19/18 2:41 PM, Philippe Mathieu-Daudé wrote:
>>> On 19/10/2018 19:42, Cleber Rosa wrote:
On 10/13/18 11:15 AM, Philippe Mathieu-Daudé wrote:
> Similar to the test_x86_64_pc test
gen_arith_imm() does a lot of decoding manually, which was hard to read in
case of the shift instructions and is not necessary anymore with decodetree.
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- trans_arith_imm -> gen_arith_imm
- Add missing TARGET_RISC64
Signed-off-by: Bastian Koppelmann
---
target/riscv/insn_trans/trans_rvi.inc.c | 14 +++---
target/riscv/insn_trans/trans_rvm.inc.c | 14 +++---
target/riscv/translate.c| 4 ++--
3 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/target/riscv/insn_tra
with all 16 bit insns moved to decodetree no path is falling back to
gen_system(), so we can remove it.
Reviewed-by: Richard Henderson
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
target/riscv/translate.c | 32
1 file changed, 32 deletions(-)
Reviewed-by: Richard Henderson
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- trans_shift -> gen_shift
target/riscv/insn_trans/trans_rvi.inc.c | 79 +
target/riscv/translate.c| 59 ++
2 files chang
This also removes all functions that now became obsolete.
Signed-off-by: Bastian Koppelmann
---
target/riscv/insn16.decode | 34 +-
target/riscv/insn_trans/trans_rvc.inc.c | 103
target/riscv/translate.c| 151 +---
3 files ch
trans_jalr() is the only caller, so move the code into trans_jalr().
Reviewed-by: Richard Henderson
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
target/riscv/insn_trans/trans_rvi.inc.c | 28 +-
target/riscv/translate.c| 38
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- Stack allocate arg_c_* structs
- ex_rvc_register returns int
- special case of trans_c_addi4spn() returns false
target/riscv/Makefile.objs | 9 ++-
target/riscv/insn16.decode | 55
manual decoding in gen_arith() is not necessary with decodetree. For now
the function is called trans_arith as the original gen_arith still
exisits. The former will be renamed to gen_arith as soon as the old
gen_arith can be removed.
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
--
With decodetree we don't need to convert RISC-V opcodes into to MemOps
as the old gen_store() did.
Reviewed-by: Richard Henderson
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- trans_store -> gen_store
- removed negative memop check
target/riscv/insn_trans/
With decodetree we don't need to convert RISC-V opcodes into to MemOps
as the old gen_load() did.
Reviewed-by: Richard Henderson
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- trans_load -> gen_load
- removed negative memop check
target/riscv/insn_trans/tr
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- Add missing TARGET_RISCV64 conditions
- trans_arith_w -> gen_arith_w
target/riscv/insn_trans/trans_rvm.inc.c | 75 ---
target/riscv/translate.c| 268 +++-
2 files changed
Reviewed-by: Richard Henderson
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
target/riscv/insn32.decode | 8 +
target/riscv/insn_trans/trans_rvd.inc.c | 94 +
target/riscv/translate.c| 484 +---
3 files changed, 103 inser
Reviewed-by: Richard Henderson
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- REQUIRE_FPU uses do {} while (0)
- Add REQUIRE_FPU to arithm helpers
target/riscv/insn32.decode | 35 +++
target/riscv/insn_trans/trans_rvf.inc.c | 334 +
decodetree handles all instructions now so the fallback is not necessary
anymore.
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- Add missing gen_exception_illegal
target/riscv/translate.c | 24 +---
1 file changed, 1 insertion(+), 23 deletio
We now utilizes argument-sets of decodetree such that no manual
decoding is necessary.
Reviewed-by: Richard Henderson
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- trans_branch -> gen_branch
target/riscv/insn_trans/trans_rvi.inc.c | 46 +--
we cannot remove the call to gen_arith() in decode_RV32_64G() since it
is used to translate multiply instructions.
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- RISCV32 now returns false instead of raising an exception
- shift translators now also use gen_ar
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- simplified fence/fence_i as suggested by Richard
target/riscv/insn32.decode | 6 ++
target/riscv/insn_trans/trans_rvi.inc.c | 20
target/riscv/translate.c| 14 -
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- Add REQUIRE_FPU to arithm helpers
target/riscv/insn32.decode | 28 +++
target/riscv/insn_trans/trans_rvd.inc.c | 319
target/riscv/translate.c| 1 +
3 files c
Reviewed-by: Richard Henderson
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
target/riscv/insn32.decode | 9 +++
target/riscv/insn_trans/trans_rvi.inc.c | 79 +
target/riscv/translate.c| 43 +-
3 files changed,
CPURISCVState is rarely used, so there is no need to pass it to every
translate function. This paves the way for decodetree which only passes
DisasContext to translate functions.
Signed-off-by: Bastian Koppelmann
---
target/riscv/translate.c | 15 ---
1 file changed, 8 insertions(+),
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- simplified gen_amo() with function pointers
- rs2 @atom_ld is now decimal
target/riscv/insn32.decode | 17 +++
target/riscv/insn_trans/trans_rva.inc.c | 145
target/riscv/t
Hi,
this patchset converts the RISC-V decoder to decodetree in three major steps:
1) Convert 32-bit instructions to decodetree [Patch 1-14]:
Many of the gen_* functions are called by the decode functions for 16-bit
and 32-bit functions. If we move translation code from the gen_*
funct
Reviewed-by: Richard Henderson
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- fixed spacing
target/riscv/insn32.decode | 17 +
target/riscv/insn_trans/trans_rvm.inc.c | 98 +
target/riscv/translate.c| 10
Reviewed-by: Richard Henderson
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
target/riscv/insn32.decode| 15 +++
.../riscv/insn_trans/trans_privileged.inc.c | 111 ++
target/riscv/translate.c | 49 +---
3 files c
Reviewed-by: Richard Henderson
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- fixed spacing
target/riscv/insn32.decode | 15 +
target/riscv/insn_trans/trans_rvi.inc.c | 78 +
target/riscv/translate.c| 7
for now only LUI & AUIPC are decoded and translated. If decodetree fails, we
fall back to the old decoder.
Reviewed-by: Richard Henderson
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- ex_shift_amount returns uint32_t
target/riscv/Makefile.objs
Reviewed-by: Richard Henderson
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- RISCV32 now returns false instead of raising an exception
target/riscv/insn32.decode | 6 +++
target/riscv/insn_trans/trans_rvf.inc.c | 68 +
2 f
Reviewed-by: Richard Henderson
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- use simplfied gen_amo() with function pointers
target/riscv/insn32.decode | 13 +++
target/riscv/insn_trans/trans_rva.inc.c | 99 +
target/riscv/transla
Signed-off-by: Bastian Koppelmann
Signed-off-by: Peer Adelt
---
v1 -> v2:
- use ctx->env instead of current_cpu->env_ptr
target/riscv/insn32.decode | 19 ++
target/riscv/insn_trans/trans_rvi.inc.c | 49 +
target/riscv/translate.c|
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