Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.inc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
index 5c88f1f36b..28192f4608 100644
--- a/tcg/i386/tcg-target.inc.c
+++ b/tcg/i386
This does require an extra two checks within the slow paths
to replace the assert that we're moving.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.inc.c | 22 --
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/tcg/arm/tcg-tar
From: "Emilio G. Cota"
It's unused since 75e8b9b7aa0b95a761b9add7e2f09248b101a392.
Signed-off-by: Emilio G. Cota
Message-Id: <20181209193749.12277-9-c...@braap.org>
Reviewed-by: Richard Henderson
Signed-off-by: Richard Henderson
---
tcg/tcg.h | 4 ++--
tcg/optimize.c | 4 ++--
tcg/tcg
From: "Emilio G. Cota"
Before moving them all to include/qemu/xxhash.h.
Reviewed-by: Alex Bennée
Signed-off-by: Emilio G. Cota
Signed-off-by: Richard Henderson
---
include/exec/tb-hash-xx.h | 41 +--
include/exec/tb-hash.h| 2 +-
tests/qht-bench.c
For now, defined universally as true, since we previously required
backends to implement swapped memory operations. Future patches
may now remove that support where it is onerous.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 1 +
tcg/arm/tcg-target.h | 1 +
tcg/i386/t
Somehow we forgot these operations, once upon a time.
This will allow immediate stores to have their bswap
optimized away.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 12
1 file changed, 12 insertions(+)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 5dbe11c3c8..6b98e
From: "Emilio G. Cota"
Change the order in which we extract a/b and c/d to
match the output of the upstream xxhash32.
Tested with:
https://github.com/cota/xxhash/tree/qemu
Reviewed-by: Alex Bennée
Tested-by: Alex Bennée
Signed-off-by: Emilio G. Cota
Signed-off-by: Richard Henderson
---
i
From: Alistair Francis
Instead of hard coding 31 for the shift right use TCG_TARGET_REG_BITS - 1.
Signed-off-by: Alistair Francis
Message-Id:
<7dfbddf7014a595150aa79011ddb342c3cc17ec3.1544648105.git.alistair.fran...@wdc.com>
Reviewed-by: Richard Henderson
Signed-off-by: Richard Henderson
---
On 21/11/2018 05:27, Alistair Francis wrote:
> On Tue, Nov 13, 2018 at 12:42 AM Alexey Kardashevskiy wrote:
>>
>> sPAPR code will use it too so move it from VFIO to the common code.
>>
>> Signed-off-by: Alexey Kardashevskiy
>
> Reviewed-by: Alistair Francis
Aand who is taking this? I
On 12/13/18 9:18 PM, Richard Henderson wrote:
> I didn't get this fix pushed back into the patch set that I actually
> sent last week. The patch is in target-arm.next, and I'm sure you
> would have eventually seen the error in testing.
>
>
> r~
> ---
> target/arm/kvm64.c | 4 ++--
> 1 file chan
On Thu, 2018-12-13 at 21:01 -0600, Richard Henderson wrote:
> On 12/13/18 5:58 PM, Benjamin Herrenschmidt wrote:
> > +#ifdef CONFIG_ATOMIC64
> > +/* This is meant to be used for atomic PTE updates under MT-TCG */
> > +uint32_t glue(address_space_cmpxchgq_notdirty, SUFFIX)(ARG1_DECL,
> > +hwaddr
When deciding about the huge DMA window, the typical Linux pseries guest
uses the maximum allowed RAM size as the upper limit. We did the same
on QEMU side to match that logic. Now we are going to support a GPU RAM
pass through which is not available at the guest boot time as it requires
the guest
On 2018/12/13 下午10:56, Michael S. Tsirkin wrote:
On Thu, Dec 13, 2018 at 11:41:06AM +0800, Yongji Xie wrote:
On Thu, 13 Dec 2018 at 10:58, Jason Wang wrote:
On 2018/12/12 下午5:18, Yongji Xie wrote:
Ok, then we can simply forbid increasing the avail_idx in this case?
Basically, it's a quest
Lots of little changes since v1, but many of which are noted
within each patch. This version works in system mode, using
https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git/log/?h=for-next/core
r~
Richard Henderson (27):
target/arm: Add state for the ARMv8.3-PAuth extension
tar
Not that there are any stores involved, but why argue with ARM's
naming convention.
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 62 ++
1 file changed, 62 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
Add storage space for the 5 encryption keys.
Signed-off-by: Richard Henderson
v2: Remove pointless double migration.
Use a struct to make it clear which half is which.
---
target/arm/cpu.h | 30 +-
1 file changed, 29 insertions(+), 1 deletion(-)
diff --git a
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 93 +-
1 file changed, 81 insertions(+), 12 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 7c1cc1ce8e..0df344f9e8 100644
--- a/target/arm/translate-a64.c
Post v8.4 bits taken from SysReg_v85_xml-00bet8.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
v2: Review fixups from Peter.
---
target/arm/cpu.h | 45 +
1 file changed, 33 insertions(+), 12 deletions(-)
diff --git a/target/arm/cpu
Now properly signals unallocated for REV64 with SF=0.
Allows for the opcode2 field to be decoded shortly.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 31 ++-
1 file changed, 22 insertions(+), 9 deletions(-)
diff --git
The cryptographic internals are stubbed out for now,
but the enable and trap bits are checked.
Signed-off-by: Richard Henderson
v2: Remove trap from xpac* helpers; these are now side-effect free.
Use struct ARMPACKey.
---
target/arm/helper-a64.h | 12 +++
target/arm/internals.h | 6
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 82 +-
1 file changed, 81 insertions(+), 1 deletion(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 30086a5d7f..e62d248894 100644
--- a/target/arm/translate-a64.c
+
There are 5 bits of state that could be added, but to save
space within tbflags, add only a single enable bit.
Helpers will determine the rest of the state at runtime.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
v2: Fix whitespace, comment grammar.
---
target/arm/cpu.h
This function is, or will shortly become, too big to inline.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/cpu.h| 48 +
target/arm/helper.c | 44 +
2 files changed, 49 insertions
Signed-off-by: Richard Henderson
---
target/arm/cpu64.c | 4
1 file changed, 4 insertions(+)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 1d57be0c91..84f70b2a24 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -316,6 +316,10 @@ static void aarch64_max_initfn(Object
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.h| 2 +-
target/arm/helper-a64.c| 10 +-
target/arm/translate-a64.c | 7 ++-
3 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64
While we could expose stage_1_mmu_idx, the combination is
probably going to be more useful.
Signed-off-by: Richard Henderson
---
target/arm/internals.h | 15 +++
target/arm/helper.c| 7 +++
2 files changed, 22 insertions(+)
diff --git a/target/arm/internals.h b/target/arm/i
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 8
1 file changed, 8 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 7ba4c996cf..d034a5edf3 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/tra
FIXME: We should have an attribute that controls the EL1 enable bits.
We may not always want to turn on pointer authentication with -cpu max.
Signed-off-by: Richard Henderson
---
target/arm/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index
NAK, expect v2 to correct the commit message accident pointed out by
Eric.
The pattern
ARMMMUIdx mmu_idx = core_to_arm_mmu_idx(env, cpu_mmu_index(env, false));
is computing the full ARMMMUIdx, stripping off the ARM bits,
and then putting them back.
Avoid the extra two steps with the appropriate helper function.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Hend
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 146 +
1 file changed, 146 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index c5ec430b42..7ba4c996cf 100644
--- a/target/arm/translate-a64.c
+++ b/target/ar
Signed-off-by: Richard Henderson
---
target/arm/helper.c | 70 +
1 file changed, 70 insertions(+)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index b9ffc07fbc..f1e9254c9a 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5061,6
This function is only used by AArch64. Code movement only.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.h | 2 +
target/arm/helper.h | 1 -
target/arm/helper-a64.c | 155
target/arm/op_helper.c | 155 ---
This is not really functional yet, because the crypto is not yet
implemented. This, however follows the Auth pseudo function.
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.c | 21 -
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/target/arm/helper-
This is the main crypto routine, an implementation of QARMA.
This matches, as much as possible, ARM pseudocode.
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.c | 241 +++-
1 file changed, 240 insertions(+), 1 deletion(-)
diff --git a/target/arm/h
This will enable PAuth decode in a subsequent patch.
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 47 +-
1 file changed, 36 insertions(+), 11 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index c84c2dbb
Split out functions to extract the virtual address parameters.
Let the functions choose T0 or T1 address space half, if present.
Extract (most of) the control bits that vary between EL or Tx.
Signed-off-by: Richard Henderson
v2: Incorporate feedback wrt VTCR, HTCR, and more.
---
target/arm/
This is not really functional yet, because the crypto is not yet
implemented. This, however follows the AddPAC pseudo function.
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.c | 40 +++-
1 file changed, 39 insertions(+), 1 deletion(-)
diff --git
The arm_regime_tbi{0,1} functions are replacable with the new function
by giving the lowest and highest address.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h| 35 --
target/arm/helper.c | 61 -
2 files changed, 16 i
Stripping out the authentication data does not require any crypto,
it merely requires the virtual address parameters.
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/target/arm/helper-a64.c b/target/a
We need to reuse this from helper-a64.c. Provide a stub
definition for CONFIG_USER_ONLY. This matches the stub
definitions that we removed for arm_regime_tbi{0,1} before.
Signed-off-by: Richard Henderson
---
target/arm/internals.h | 17 +
target/arm/helper.c| 4 ++--
2 fil
We can perform this with fewer operations.
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 65 ++
1 file changed, 23 insertions(+), 42 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index c57c89d98a..5c06e4
git-request-pull master public pull-qapi-2018-12-13-v2
The following changes since commit c3ec0fa1a8e815ecfec9eabb9c20ee206c313e07:
Merge remote-tracking branch 'remotes/armbru/tags/pull-monitor-2018-12-12'
into staging (2018-12-13 13:41:44 +)
are available in the Git repository at:
git
From: Marc-André Lureau
Wrap generated enum and struct members and their supporting code with
#if/#endif, using the .ifcond members added in the previous patches.
We do enum and struct in a single patch because union tag enum and the
associated variants tie them together, and dealing with that t
Eric Blake writes:
> On 12/13/18 12:43 PM, Markus Armbruster wrote:
>> From: Marc-André Lureau
>>
>> Wrap generated enum and struct members and their supporting code with
>>
>
> Git ate the line because it started with #. Not sure if you can sneak
> in a v2 pull request that puts something sane
Paolo Bonzini writes:
> There are not many, and they are all simple mistakes that ended up
> being committed. Remove them.
>
> Signed-off-by: Paolo Bonzini
The cover letter states "I am not touching space-tab in the middle of
the line, many of which are in #define lines." I think the actual
c
Paolo Bonzini writes:
> On 13/12/18 19:21, Peter Maydell wrote:
>> On Thu, 13 Dec 2018 at 18:07, Paolo Bonzini wrote:
>>> On 13/12/18 19:01, Peter Maydell wrote:
I sent a patch to do this a little while back:
https://patchwork.kernel.org/patch/10561557/
It didn't get applied
On 12/13/2018 10:28 PM, Dr. David Alan Gilbert wrote:
* Wei Wang (wei.w.w...@intel.com) wrote:
BITMAP_LAST_WORD_MASK(nbits) returns 0x when "nbits=0", which
makes bitmap_count_one fail to handle the "nbits=0" case. It appears to be
preferred to remain BITMAP_LAST_WORD_MASK identical to t
On 12/13/2018 11:45 PM, Dr. David Alan Gilbert wrote:
* Wei Wang (wei.w.w...@intel.com) wrote:
The new feature enables the virtio-balloon device to receive hints of
guest free pages from the free page vq.
A notifier is registered to the migration precopy notifier chain. The
notifier calls free_
> -Original Message-
> From: Juan Quintela [mailto:quint...@redhat.com]
> Sent: Friday, December 14, 2018 5:01 AM
> To: qemu-devel@nongnu.org
> Cc: Michael S. Tsirkin ; Thomas Huth ;
> Gerd Hoffmann ; Gonglei (Arei)
> ; Juan Quintela
> Subject: [PATCH v3 00/16] Virtio devices split from
On Thu, Dec 13, 2018 at 10:37:06PM +, Michael Hanselmann wrote:
> The filename length in MTP metadata is specified by the guest. By
> trusting it directly it'd theoretically be possible to get the host to
> write memory parts outside the filename buffer into a filename. In
> practice though the
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