From: Aleksandar Markovic
Comment the decoder of 'gpr2.reg1' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 22 ++
1 file changed, 22 insertions(+)
diff --git a/disas/nanomips.cpp b/di
From: Aleksandar Markovic
Add missing opcodes and decoding engine for LXB, LXH, LXW, LXBU,
and LXHU instructions. They were for some reason forgotten in
previous commits. The MXU opcode list and decoding engine should
be now complete.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Marko
From: Aleksandar Markovic
Improve textual description of MXU extension. These are mostly
comment formatting changes.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 74 +
1 file changed, 44 insertion
From: Aleksandar Markovic
Comment the decoder of 'gpr3.src.store' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 32
1 file changed, 32 insertions(+)
diff --git a/disas/na
From: Aleksandar Markovic
Add generic naming involving generig suffixes OPTN0, OPTN1, OPTN2,
OPTN3 for four optn2 constants. Existing suffixes WW, LW, HW, XW
are not quite appropriate for some instructions using optn2.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target
From: Aleksandar Markovic
Rename NMD::extract_fd_10_9_8_7_6(uint64 instruction) to
NMD::extract_fd_15_14_13_12_11(uint64 instruction).
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 142 ++---
disas/na
From: Aleksandar Markovic
The following changes since commit 1b3e80082bcd9b760113bbc023496cd22efad2dc:
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20181226' into
staging (2019-01-03 10:42:21 +)
are available in the git repository at:
https://github.com/AMarkovic/qemu tags/
From: Aleksandar Markovic
Rename some functions that have names that are hard to understand.
Reviewed-by: Aleksandar Rikalo
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 112 ++---
disas/nanomips.h |
From: Aleksandar Markovic
Add Aleksandar Rikalo as a reviewer for MIPS content. Aleksandar
brings to us more than six years of experience in working on a variety
of development tools for MIPS architectures, and will greatly help
QEMU community understand and support intricacies of MIPS better.
A
From: Aleksandar Markovic
Rename the decoder of 'gpr3.src.store' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 10 +-
disas/nanomips.h | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
From: Aleksandar Markovic
Add following files as maintained within the main MIPS target
section in MAINTAINERS:
default-configs/mips64el-linux-user.mak
default-configs/mips64-linux-user.mak
default-configs/mipsn32el-linux-user.mak
default-configs/mipsn32-linux-user.mak
default-configs/mipsel-lin
From: Aleksandar Markovic
Fix several mistakes in preambles of nanomips disassembler source
files.
Reviewed-by: Aleksandar Rikalo
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 7 ---
disas/nanomips.h | 7 ---
2 files changed, 8 insertions(
From: Aleksandar Markovic
Reorder items alphabetically for better visibility.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Aleksandar Markovic
---
MAINTAINERS | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0543bbe..b3b60c3
From: Paul Burton
ATOMIC_REG_SIZE is currently defined as the default sizeof(void *) for
all MIPS host builds, including those using the n32 ABI. n32 is the
MIPS64 ILP32 ABI and as such tcg/mips/tcg-target.h defines
TCG_TARGET_REG_BITS as 64 for n32 builds. If we attempt to build QEMU
for an n32
From: Aleksandar Markovic
Add ability to redirect mails (sent to qemu-devel) containing
"mips" in the subject line to MIPS maintainers and reviewers.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Aleksandar Markovic
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAIN
*** This bug is a duplicate of bug 1714750 ***
https://bugs.launchpad.net/bugs/1714750
Your crystal ball is correct! I was untarring in a Linux vbox, and was
blindly assuming since it was on linux it was case sensitive. However,
it was on a vboxsf shared with OSX, and apple's file system is ca
On Thu, Jan 03, 2019 at 06:18:14PM +0800, elohi...@gmail.com wrote:
> From: Xie Yongji
>
> This patch introduces two new messages VHOST_USER_GET_SHM_SIZE
> and VHOST_USER_SET_SHM_FD to support providing shared
> memory to backend.
So this seems a bit vague. Since we are going to use it
for track
On 03/01/2019 16:20, Peter Maydell wrote:
> On Tue, 11 Dec 2018 at 12:27, Nick Hudson wrote:
>>
>>
>> noload kernels are loaded with the u-boot image header and as a result
>> the header size needs adding to the entry point. Fake up a hdr so the
>> kernel image is loaded at the right address a
On Wed, 26 Dec 2018 at 17:20, Palmer Dabbelt wrote:
>
> The following changes since commit b72566a4ffaddbc0c0c1f6f5ee91b42ab13ff429:
>
> Merge remote-tracking branch
> 'remotes/vivier2/tags/trivial-patches-pull-request' into staging (2018-12-19
> 15:31:02 +)
>
> are available in the Git re
Get rid of code from MIPS Malta board used to create SPD EEPROM data
(parts of which was not even needed for sam460ex) and use the generic
spd_data_generate() function to simplify this.
Signed-off-by: BALATON Zoltan
---
v2: update for changes in patch 1
hw/ppc/sam460ex.c | 173 +++--
There's already a struct with the same name in ppc4xx_devs.c. They are
not used outside their files so don't clash but they are also not
identical so rename the ppc440 specific one to distinguish them.
Signed-off-by: BALATON Zoltan
Reviewed-by: David Gibson
---
hw/ppc/ppc440_uc.c | 16 -
The sdram_set_bcr() function in ppc440_uc.c takes a pointer into an
array then calculates its index from that. It's simpler and easier to
just pass the index which simplifies both the function and its callers.
Do similar cleanup in ppc4xx_devs.c to similar function.
Signed-off-by: BALATON Zoltan
There are several boards with SPD EEPROMs that are now using
duplicated or slightly different hard coded data. Add a helper to
generate SPD data for a memory module of given type and size that
could be used by these boards (either as is or with further changes if
needed) which should help cleaning
Fix the encoding of larger memory modules in the SoC registers which
allows specifying more than 1GB memory for sam460ex. Well, only 2GB
due to SoC and firmware restrictions which was the only missing value
compared to what the real hardware supports. The SoC should support up
to 4GB but when setti
From: Aleksandar Markovic
Use preprocessor constants for 32 major CP0 registers.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 272
1 file changed, 136 insertions(+), 136 deletions(-)
diff --git a/target/mips/translate.c b/ta
To avoid overflow if larger values are added later use ram_addr_t for
the sdram_bank_sizes parameter to match ram_size to which it is compared.
Signed-off-by: BALATON Zoltan
---
v2: No change. Review comment suggested ram_size should be hwaddr too
but it's ram_addr_t in MachineState now so th
The last code patch in this series fixes memory size larger than 1GB
for sam460ex, other patches are just clean ups I've made along the way.
The first patch is intended to be generic and may be useful for other
boards which currently have their own SPD EEPROM data or don't yet
generate any SPD dat
[ ... ]
> Please update the changelog at https://wiki.qemu.org/ChangeLog/4.0
> for any user-visible changes.
Are the machine properties documented any where else than in
"-machine pseries,?" ?
Thanks,
C.
From: Aleksandar Markovic
Add preprocessor constants for 32 major CP0 registers.
Signed-off-by: Aleksandar Markovic
---
target/mips/cpu.h | 32
1 file changed, 32 insertions(+)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 6c2a7e4..b095422 100644
--
From: Aleksandar Markovic
Move comment containing summary of CP0 registers. Checkpatch
script reported some tabs in the resutling diff, so convert
these tabs to spaces too.
Signed-off-by: Aleksandar Markovic
---
target/mips/cpu.h | 165 +++---
1
From: Yongbok Kim
Add fields for SAARI and SAAR CP0 registers.
Signed-off-by: Yongbok Kim
Signed-off-by: Aleksandar Markovic
---
target/mips/cpu.h | 10 --
target/mips/machine.c | 6 --
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/target/mips/cpu.h b/target
From: Yongbok Kim
Update ITU to utilize SAARI and SAAR CP0 registers.
Signed-off-by: Yongbok Kim
Signed-off-by: Aleksandar Markovic
---
hw/mips/cps.c | 8
hw/misc/mips_itu.c | 28 ++--
include/hw/misc/mips_itu.h | 4
target/mips/cpu
From: Yongbok Kim
Provide R/W access to SAARI and SAAR CP0 registers.
Signed-off-by: Yongbok Kim
Signed-off-by: Aleksandar Markovic
---
target/mips/cpu.h | 1 +
target/mips/helper.h| 6 +
target/mips/internal.h | 1 +
target/mips/op_helper.c | 50
From: Aleksandar Markovic
Inter-Thread Communication Unit (or ITU) represents and important
part of contemporary MIPS cores. This series extends support for
ITU in QEMU. The changes will not be visible for end users
immediatelly, but there are plans to enable corresponding features
for certain CP
From: Yongbok Kim
Update ITU to handle bus errors.
Signed-off-by: Yongbok Kim
Signed-off-by: Aleksandar Markovic
---
hw/misc/mips_itu.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c
index 5c49bdd..e8860dc 100644
--- a/hw/mi
From: Yongbok Kim
Add field and R/W access to ITU control register ICR0.
Signed-off-by: Yongbok Kim
Signed-off-by: Aleksandar Markovic
---
hw/misc/mips_itu.c | 22 +-
include/hw/misc/mips_itu.h | 4
2 files changed, 25 insertions(+), 1 deletion(-)
diff --git
On Tue, 11 Dec 2018 at 03:11, Joel Stanley wrote:
>
> This register does not exist in hardware. It is here to allow the guest
> code to cause Qemu to exit when required.
>
> The register address chosen is unused in the emulated machines
> datasheets.
>
> Signed-off-by: Joel Stanley
> ---
> hw/mi
On Tue, 11 Dec 2018 at 12:27, Nick Hudson wrote:
>
>
> noload kernels are loaded with the u-boot image header and as a result
> the header size needs adding to the entry point. Fake up a hdr so the
> kernel image is loaded at the right address and the entry point is
> adjusted appropriately.
>
>
Hello
When using an initrd > 5M, I hit the following kernel crash:
qemu-system-sparc -kernel vmlinux -initrd rootfs.cpio.gz -nographic
Configuration device id QEMU version 1 machine id 32
Probing SBus slot 0 offset 0
Probing SBus slot 1 offset 0
Probing SBus slot 2 offset 0
Probing SBus slot 3 off
On 2018-12-27 07:34, Yang Zhong wrote:
> From: Paolo Bonzini
>
> Instead of including the same list of devices for each target,
> set CONFIG_PCI to true, and make the devices default to present
> whenever PCI is available.
>
> Done mostly with the following script:
>
> while read i; do
>
On 2018-12-27 07:34, Yang Zhong wrote:
> From: Paolo Bonzini
>
> Signed-off-by: Paolo Bonzini
> ---
[...]
> diff --git a/hw/ide/Kconfig b/hw/ide/Kconfig
> index 5ec449525f..091f3a81c9 100644
> --- a/hw/ide/Kconfig
> +++ b/hw/ide/Kconfig
> @@ -3,33 +3,44 @@ config IDE_CORE
>
> config IDE_QDEV
Signed-off-by: Stefan Hajnoczi
---
Dear mentors,
Let's post an overview of what was achieved in GSoC/Outreachy 2018. I
have populated a blog post with information available to me, but I'm
sure it can be improved to explain how the project went and the current
status.
Please let me know what shou
On Tue 11 Dec 2018 05:43:12 PM CET, Vladimir Sementsov-Ogievskiy wrote:
> Use thread_pool_submit_co, instead of reinventing it here. Note, that
> thread_pool_submit_aio() never returns an error, so checking it was an
> extra thing.
"never returns NULL" is perhaps a bit more explicit.
> Signed-off
I’m inspired by the function ‘ich9_pm_device_unplug_cb’.
>From the ‘plug’ ich9_pm_device_plug_cb it set an error.
So I think we can also set this is this s390 device plug.
I will send out revised patch soon.
Thanks,
Li Qiang
发件人: Cornelia Huck
发送时间: 2019年1月3日 22:54
收件人: Li Qiang
抄送: wall...@linu
This test is failing on the Travis CI [*] since some time now,
disable it until it get fixed.
[*] https://travis-ci.org/qemu/qemu/builds/474821674
Signed-off-by: Philippe Mathieu-Daudé
---
v2: Use CONFIG_GPROF via config_host_mak (check-unit isn't target)
---
configure | 1 +
tests
Disable test-qht-par when using gprof, as this break Travis CI.
v2: Add CONFIG_GPROF (check-unit use host_mak, not target_mak)
See: https://lists.gnu.org/archive/html/qemu-devel/2018-12/msg01638.html
Philippe Mathieu-Daudé (2):
configure: Let the TARGET_GPROF var use the regular 'y' for Yes
When getting the 'pbdev', the if...else has no default branch.
>From Coverity, the 'pbdev' maybe null when the 'dev' is not
the TYPE_PCI_BRIDGE/TYPE_PCI_DEVICE/TYPE_S390_PCI_DEVICE.
This patch adds a default branch for device plug and unplug.
Spotted by Coverity: CID 1398593
Signed-off-by: Li Qia
BZ: #1594054
guest-file-read command is currently implelmented to read from a
file handle count number of bytes. when executed with a very large count number
qemu-ga crashes.
after some digging turns out that qemu-ga crashes after trying to allocate
a buffer large enough to save the data read in it
Sometimes qemu-ga fails to send a response to client due to memory allocation
issues due to a large response message, this can be experienced while trying
to read large number of bytes using QMP command guest-file-read.
Added a check to send an error response to qemu-ga client in such cases.
Sign
From: Sameeh Jubran
This patch handles the case where VSS Provider is already registered,
where in such case qga uninstalls the provider and registers it again.
Signed-off-by: Sameeh Jubran
Signed-off-by: Basil Salman
---
qga/vss-win32/install.cpp | 10 ++
1 file changed, 10 insertion
On Tue 11 Dec 2018 05:43:11 PM CET, Vladimir Sementsov-Ogievskiy wrote:
> Move compression-on-threads to separate file. Encryption will be in it
> too.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Alberto Garcia
Berto
This patch series addresses serveral issues with qga-win please review
them and share your thoughts.
Basil Salman (3):
qga-win: prevent crash when executing guest-file-read with large count
qga: fix send_response error handling
qga: Installer: Wait for installation to finish
Sameeh Jubran (
Installation might fail if we don't wait for the provider
unregisteration process to finish.
Signed-off-by: Sameeh Jubran
Signed-off-by: Basil Salman
---
qga/installer/qemu-ga.wxs | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qga/installer/qemu-ga.wxs b/qga/installer/qemu-
All other variables are set using 'y', which is what the rules.mak
functions expect to parse.
Signed-off-by: Philippe Mathieu-Daudé
---
configure | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure b/configure
index 79375affc1..fa5c079f98 100755
--- a/configure
+++ b/co
On 2018-12-27 07:34, Yang Zhong wrote:
> From: Paolo Bonzini
>
> The Kconfig files were generated mostly with this script:
>
> for i in `grep -ho CONFIG_[A-Z0-9_]* default-configs/* | sort -u`; do
> set fnord `git grep -lw $i -- 'hw/*/Makefile.objs' `
> shift
> if test $# = 1; then
On Thu, Jan 3, 2019 at 3:29 PM Philippe Mathieu-Daudé wrote:
> This test is failing on the Travis CI [*] since some time now,
> disable it until it get fixed.
>
> [*] https://travis-ci.org/qemu/qemu/builds/474821674
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> tests/Makefile.include | 3 ++-
On 18/12/2018 09:49, Mark Cave-Ayland wrote:
> Following on from this, the next patch "target/ppc: convert vsplt[bhw] to use
> vector
> operations" causes corruption of the OS X splash screen
> (https://www.ilande.co.uk/tmp/qemu/badapple2.png) in a way that suggests
> there may be
> an endian is
On Thu, 3 Jan 2019 06:02:46 -0800
Li Qiang wrote:
> When getting the 'pbdev', the if...else has no default branch.
> From Coverity, the 'pbdev' maybe null when the 'dev' is not
> the TYPE_PCI_BRIDGE/TYPE_PCI_DEVICE/TYPE_S390_PCI_DEVICE.
>
> Spotted by Coverity: CID 1398593
>
> Signed-off-by: L
On 2018-12-27 07:34, Yang Zhong wrote:
> Use CONFIG_EDID to make edid-generate.c and edid-region.c
> configurable.
>
> Signed-off-by: Yang Zhong
> ---
> default-configs/pci.mak | 1 +
> hw/display/Makefile.objs | 4 +---
> 2 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/defau
This reverts commit 01fd41ab3fb69971c24a69ed49cde96086d81278.
The generic loader device (-device loader,file=kernel.bin) can be used
to load a kernel instead of the -kernel option. Some boards have flash
memory (pflash) that is set via the -pflash or -drive options.
Allow starting QEMU without t
On 2018-12-27 07:33, Yang Zhong wrote:
> From: Paolo Bonzini
>
> CONFIG_PIIX and CONFIG_Q35 created for the pc board object files. These
> are enabled automatically at default-configs/i386-softmmu.mak and
> default-configs/x86_64-softmmu.mak
>
> Signed-off-by: Ákos Kovács
> Signed-off-by: Paolo
This test is failing on the Travis CI [*] since some time now,
disable it until it get fixed.
[*] https://travis-ci.org/qemu/qemu/builds/474821674
Signed-off-by: Philippe Mathieu-Daudé
---
tests/Makefile.include | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tests/Makefil
All other variables are set using 'y', which is what the rules.mak
functions expect to parse.
Signed-off-by: Philippe Mathieu-Daudé
---
configure | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure b/configure
index 79375affc1..fa5c079f98 100755
--- a/configure
+++ b/co
Disable test-qht-par when using gprof, as this break Travis CI.
See: https://lists.gnu.org/archive/html/qemu-devel/2018-12/msg01638.html
Philippe Mathieu-Daudé (2):
configure: Let the TARGET_GPROF var use the regular 'y' for Yes
tests: Disable qht-bench parallel test when using gprof
config
Reviewed-by: Laurent Vivier
Signed-off-by: Juan Quintela
---
hw/virtio/virtio-crypto-pci.c | 14 ++
hw/virtio/virtio-pci.h| 14 --
2 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/hw/virtio/virtio-crypto-pci.c b/hw/virtio/virtio-crypto-pci.c
index
Signed-off-by: Juan Quintela
---
default-configs/virtio.mak | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/default-configs/virtio.mak b/default-configs/virtio.mak
index 5ae4a61018..ecb4420e74 100644
--- a/default-configs/virtio.mak
+++ b/default-configs/virtio.mak
@@ -1,7 +1,
Virtio console and qga tests also depend on CONFIG_VIRTIO_SERIAL.
Reviewed-by: Thomas Huth
Reviewed-by: Laurent Vivier
Signed-off-by: Juan Quintela
---
hw/virtio/Makefile.objs | 1 +
hw/virtio/virtio-pci.c| 79 ---
hw/virtio/virtio-pci.h| 14 -
Reviewed-by: Laurent Vivier
Signed-off-by: Juan Quintela
---
hw/display/virtio-gpu-pci.c | 14 ++
hw/display/virtio-vga.c | 1 +
hw/virtio/virtio-pci.h | 14 --
3 files changed, 15 insertions(+), 14 deletions(-)
diff --git a/hw/display/virtio-gpu-pci.c b/hw/dis
Hey,
On Thu, Jan 03, 2019 at 10:54:25AM +, Stefan Hajnoczi wrote:
> On Fri, Dec 14, 2018 at 11:56:42AM +0100, Christophe Fergeau wrote:
> > +static void qemu_log_func(const gchar *log_domain,
> > + GLogLevelFlags log_level,
> > + const gchar *m
On Thu, Jan 3, 2019 at 1:07 PM Peter Maydell wrote:
> On Fri, 14 Dec 2018 at 14:51, Stefan Hajnoczi wrote:
> > ARMv7M machine types support -kernel for ELF and raw image files.
> > Microbit programs are typically in Intel HEX (.hex) format. The generic
> > loader supports .hex files but it doesn
Reviewed-by: Thomas Huth
Reviewed-by: Laurent Vivier
Signed-off-by: Juan Quintela
---
hw/virtio/Makefile.objs| 1 +
hw/virtio/virtio-net-pci.c | 98 ++
hw/virtio/virtio-pci.c | 59 ---
hw/virtio/virtio-pci.h | 14 --
tests
Reviewed-by: Thomas Huth
Reviewed-by: Laurent Vivier
Signed-off-by: Juan Quintela
---
hw/virtio/Makefile.objs| 1 +
hw/virtio/virtio-blk-pci.c | 100 +
hw/virtio/virtio-pci.c | 61 --
hw/virtio/virtio-pci.h | 14 --
tes
Reviewed-by: Laurent Vivier
Signed-off-by: Juan Quintela
---
hw/virtio/Makefile.objs | 1 +
hw/virtio/vhost-user-scsi-pci.c | 103
hw/virtio/virtio-pci.c | 60 ---
hw/virtio/virtio-pci.h | 11
4 files changed, 10
Hi,
On 2018-12-27 07:33, Yang Zhong wrote:
> From: Paolo Bonzini
>
> Do not link it unconditionally into all binaries.
>
> Signed-off-by: Paolo Bonzini
> ---
> hw/pci-host/Makefile.objs | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/pci-host/Makefile.objs b/hw/p
Notice that we can't still run tests with it disabled. Both cdrom-test and
drive_del-test use virtio-scsi without checking if it is enabled.
Reviewed-by: Thomas Huth
Reviewed-by: Laurent Vivier
Signed-off-by: Juan Quintela
---
hw/virtio/Makefile.objs | 1 +
hw/virtio/virtio-pci.c |
Reviewed-by: Laurent Vivier
Signed-off-by: Juan Quintela
---
Also disable virtio9p test (lvivier)
---
hw/virtio/Makefile.objs | 1 +
hw/virtio/virtio-9p-pci.c | 88 +++
hw/virtio/virtio-pci.c| 54
hw/virtio/virtio-pci.h| 2
Reviewed-by: Thomas Huth
Reviewed-by: Laurent Vivier
Signed-off-by: Juan Quintela
---
hw/virtio/Makefile.objs| 1 +
hw/virtio/vhost-user-blk-pci.c | 103 +
hw/virtio/virtio-pci.c | 62
hw/virtio/virtio-pci.h | 18 -
For consistency with other devices, rename
virtio_host_{initfn,pci_info} to virtio_input_host_{initfn,info}.
Reviewed-by: Laurent Vivier
Signed-off-by: Juan Quintela
---
default-configs/virtio.mak| 1 +
hw/virtio/Makefile.objs | 1 +
hw/virtio/virtio-input-host-pci.c | 48 ++
Reviewed-by: Laurent Vivier
Signed-off-by: Juan Quintela
---
hw/virtio/Makefile.objs| 1 +
hw/virtio/vhost-scsi-pci.c | 97 ++
hw/virtio/virtio-pci.c | 61
hw/virtio/virtio-pci.h | 19
4 files changed, 98 insertio
Reviewed-by: Laurent Vivier
Signed-off-by: Juan Quintela
---
hw/virtio/Makefile.objs | 1 +
hw/virtio/virtio-input-pci.c | 157 +++
hw/virtio/virtio-pci.c | 113 -
hw/virtio/virtio-pci.h | 22 -
4 files changed, 158
Reviewed-by: Laurent Vivier
Signed-off-by: Juan Quintela
---
Remove the "contributions after" clause. This is based on
commit 59ccd20a9ac719cff82180429458728f03ec612f
Author: KONRAD Frederic
Date: Wed Apr 24 10:07:56 2013 +0200
Fix duplicated test entry (lvivier)
---
hw/virtio/Makefile.o
Reviewed-by: Thomas Huth
Reviewed-by: Laurent Vivier
Signed-off-by: Juan Quintela
---
hw/virtio/Makefile.objs| 1 +
hw/virtio/virtio-balloon-pci.c | 95 ++
hw/virtio/virtio-pci.c | 61 +-
hw/virtio/virtio-pci.h | 14 --
Hi
v4:
- rebase to master (have conflict with other changes)
v3:
- rebase to master
- only compile them if CONFIG_PCI is set (thomas)
Please review.
Later, Juan.
V2:
- Rebase on top of master
Please review.
Later, Juan.
[v1]
>From previous verision (in the middle of make check tests):
- sp
Reviewed-by: Laurent Vivier
Signed-off-by: Juan Quintela
---
Updated copyright info
Also split virtio-pci.h bits
---
hw/virtio/Makefile.objs | 3 ++
hw/virtio/vhost-vsock-pci.c | 86 +
hw/virtio/virtio-pci.c | 53 ---
hw/virtio/
On 2019-01-03 14:32, Philippe Mathieu-Daudé wrote:
> On 1/3/19 2:23 PM, Peter Maydell wrote:
>> On Mon, 31 Dec 2018 at 14:56, Aleksandar Markovic
>> wrote:
>>> MIPS queue for December 2018 - v2
> [...]
>> Hi; I'm afraid this doesn't build on all my test hosts:
>>
>> target/mips/translate.c: In fun
On Wed, 2 Jan 2019, David Gibson wrote:
On Wed, Jan 02, 2019 at 03:06:38AM +0100, BALATON Zoltan wrote:
To avoid overflow if larger values are added later use ram_addr_t for
the sdram_bank_sizes parameter to match ram_size to which it is
compared.
So, technically I think these should be 'hwadd
When getting the 'pbdev', the if...else has no default branch.
>From Coverity, the 'pbdev' maybe null when the 'dev' is not
the TYPE_PCI_BRIDGE/TYPE_PCI_DEVICE/TYPE_S390_PCI_DEVICE.
Spotted by Coverity: CID 1398593
Signed-off-by: Li Qiang
---
hw/s390x/s390-pci-bus.c | 4
1 file changed, 4
To avoid overflow if larger values are added later use ram_addr_t for
the sdram_bank_sizes parameter to match ram_size to which it is compared.
Signed-off-by: BALATON Zoltan
---
v2: No change. Review comment suggested ram_size should be hwaddr too
but it's ram_addr_t in MachineState now so th
There's already a struct with the same name in ppc4xx_devs.c. They are
not used outside their files so don't clash but they are also not
identical so rename the ppc440 specific one to distinguish them.
Signed-off-by: BALATON Zoltan
Reviewed-by: David Gibson
---
hw/ppc/ppc440_uc.c | 16 -
Fix the encoding of larger memory modules in the SoC registers which
allows specifying more than 1GB memory for sam460ex. Well, only 2GB
due to SoC and firmware restrictions which was the only missing value
compared to what the real hardware supports. The SoC should support up
to 4GB but when setti
Get rid of code from MIPS Malta board used to create SPD EEPROM data
(parts of which was not even needed for sam460ex) and use the generic
spd_data_generate() function to simplify this.
Signed-off-by: BALATON Zoltan
---
v2: update for changes in patch 1
hw/ppc/sam460ex.c | 173 +++--
There are several boards with SPD EEPROMs that are now using
duplicated or slightly different hard coded data. Add a helper to
generate SPD data for a memory module of given type and size that
could be used by these boards (either as is or with further changes if
needed) which should help cleaning
The sdram_set_bcr() function in ppc440_uc.c takes a pointer into an
array then calculates its index from that. It's simpler and easier to
just pass the index which simplifies both the function and its callers.
Signed-off-by: BALATON Zoltan
Reviewed-by: David Gibson
---
hw/ppc/ppc440_uc.c | 36 +
The last code patch in this series fixes memory size larger than 1GB
for sam460ex, other patches are just clean ups I've made along the way.
The first patch is intended to be generic and may be useful for other
boards which currently have their own SPD EEPROM data or don't yet
generate any SPD dat
> From: Peter Maydell
> Sent: Thursday, January 3, 2019 2:23 PM
> Subject: Re: [PULL v2 00/44] MIPS pull request for December 2018 - v2
>
> On Mon, 31 Dec 2018 at 14:56, Aleksandar Markovic
> wrote:
> >
> > From: Aleksandar Markovic
> >
> > The following changes since commit 9b2e891ec5ccdb4a7d5
On 1/3/19 8:19 AM, Thomas Huth wrote:
> On 2019-01-02 20:34, Philippe Mathieu-Daudé wrote:
[...]
>> I sent a patch to trivial@ with other sun4u changes, reviewed by Mark:
>> https://lists.gnu.org/archive/html/qemu-devel/2018-12/msg04467.html
>
> Oh, right, sorry!
>
>> Neither mine nor your are co
On 1/3/19 2:03 PM, Li Qiang wrote:
> Spotted by Coverity: CID 1398595
>
Fixes: 2b05705dc8
> Signed-off-by: Li Qiang
Reviewed-by: Philippe Mathieu-Daudé
> ---
> hw/rdma/vmw/pvrdma_qp_ops.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/hw/rdma/vmw/pvrdma_qp_ops.c b/hw/rdma/vmw/p
Oh, sorry, I always forget to add this “Fixs: xxx” for these small issues.
Thanks,
Li Qiang
发件人: Philippe Mathieu-Daudé
发送时间: 2019年1月3日 21:38
收件人: Li Qiang; kra...@redhat.com
抄送: peter.mayd...@linaro.org; qemu-devel@nongnu.org
主题: Re: [Qemu-devel] [PATCH] usb: dev-mtp: fix memory leak in error p
On 1/3/19 2:31 PM, Li Qiang wrote:
> Spotted by Coverity: CID 1397070
Closing a CVE to open a CID :)
Fixes: bab9df35ce
>
> Signed-off-by: Li Qiang
> ---
> hw/usb/dev-mtp.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/hw/usb/dev-mtp.c b/hw/usb/dev-mtp.c
> index b19b576278..666ba
在 2019/1/3 上午11:43, David Gibson 写道:
On Wed, Jan 02, 2019 at 02:44:17PM +0800, 李菲 wrote:
在 2019/1/2 上午10:36, David Gibson 写道:
On Tue, Dec 25, 2018 at 10:04:43PM +0800, Fei Li wrote:
Add a local_err to hold the error, and return the corresponding
error code to replace the temporary &error_abo
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