On Mon, Feb 04, 2019 at 12:09:04PM +1100, David Gibson wrote:
> On Sat, Feb 02, 2019 at 12:23:58AM +0530, P J P wrote:
> > From: Prasad J Pandit
> >
> > On ppc hosts, hypervisor shares following system attributes
> >
> > - /proc/device-tree/system-id
> > - /proc/device-tree/model
> >
> > wi
On Mon, Feb 04, 2019 at 10:56:28AM +0100, Kevin Wolf wrote:
> Am 29.01.2019 um 16:58 hat Daniel P. Berrangé geschrieben:
> > On Fri, Jan 25, 2019 at 06:46:53PM +0100, Kevin Wolf wrote:
> > > We should never have exposed BlockBackend names to the guest, it's a
> > > host detail. Deprecate this behav
On 25/01/19 11:30, Kevin Wolf wrote:
>> On the other hand, the AioContext lock is only used in
>> some special cases around block jobs and blk_set_aio_context, and in
>> general the block devices already should not have any dependencies
>> (unless they crept in without me noticing).
> It's also use
On Mon, Feb 04, 2019 at 11:33:07AM +0800, Stefan Hajnoczi wrote:
> On Fri, Feb 01, 2019 at 06:18:52PM +0100, Stefano Garzarella wrote:
> > On Fri, Feb 1, 2019 at 4:17 PM Michael S. Tsirkin wrote:
> > > On Thu, Jan 31, 2019 at 04:19:11PM +0100, Stefano Garzarella wrote:
> > > > In order to avoid mi
Calls the new SPICE QXL interface function spice_qxl_set_device_info to
set the hardware address of the graphics device represented by the QXL
interface (e.g. a PCI path) and the device display IDs (the IDs of the
device's monitors that belong to this QXL interface).
Also stops using the deprecate
On Fri, Feb 01, 2019 at 05:19:32PM -0500, Michael S. Tsirkin wrote:
> On Mon, Jan 28, 2019 at 03:48:57PM -0200, Eduardo Habkost wrote:
> > On Fri, Jan 18, 2019 at 01:38:26PM +, Daniel P. Berrangé wrote:
> > > A number of virtio devices (gpu, crypto, mouse, keyboard, tablet) only
> > > support t
On 01/02/19 03:49, Ning, Yu wrote:
> Thank you both for outlining the changes we have to make in order to
> support ROMD memory regions! The only question is whether we should
> pass a new flag to HAX_VM_IOCTL_SET_RAM2 for ROMD, so the hypervisor
> could respond differently to writes to ROM and RO
Inspired by GObject/GType pretty printer.
Example:
machine_set_accel (obj=0x56807550 [pc-i440fx-4.0-machine],...
Signed-off-by: Marc-André Lureau
---
v2:
- simplify python 2 compatibility code, suggested by Eduardo
scripts/qemu-gdb.py | 58 +
1
On Mon, 4 Feb 2019 at 09:05, Thomas Huth wrote:
> On 2019-02-02 09:41, Palmer Dabbelt wrote:
> >> My mail filter finds these RFC pullrequests, yes. I'm then
> >> relying on my manual brain to not actually apply them.
> >> (If it's a slow day I might do a test merge on them, but
> >> usually my que
Am 29.01.2019 um 16:58 hat Daniel P. Berrangé geschrieben:
> On Fri, Jan 25, 2019 at 06:46:53PM +0100, Kevin Wolf wrote:
> > We should never have exposed BlockBackend names to the guest, it's a
> > host detail. Deprecate this behaviour. Users who need to maintain the
> > guest ABI can explicitly se
Peter Maydell writes:
> Update the copyright string we use in version/help output,
> since we're well into the new year now.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Alex Bennée
> ---
> Better than last year, where we didn't get round to doing
> the year bump until September :-)
> ---
Am 04.02.2019 um 08:53 hat Vladimir Sementsov-Ogievskiy geschrieben:
> 01.02.2019 20:14, Kevin Wolf wrote:
> > Am 31.01.2019 um 14:46 hat Andrey Shinkevich geschrieben:
> >> A new test file 239 added to the qemu-iotests set. It checks
> >> the output format of 'qemu-img info' for bitmaps extension
Am 01.02.2019 um 19:39 hat Markus Armbruster geschrieben:
> Andrey Shinkevich writes:
>
> > In the 'Format specific information' section of the 'qemu-img info'
> > command output, the supplemental information about existing QCOW2
> > bitmaps will be shown, such as a bitmap name, flags and granula
Eric Blake writes:
> Commit 2cade3d wired up new tests, but did not exclude the
> new *.out files produced by running the tests.
Queued to fpu/next, thanks.
>
> Signed-off-by: Eric Blake
> ---
> tests/.gitignore | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/tests/.gitignore b/tes
On 2/1/19 9:22 PM, Philippe Mathieu-Daudé wrote:
> Hi Cédric,
>
> On 1/21/19 5:00 PM, Cédric Le Goater wrote:
>> JEDEC STANDARD JESD216 for Serial Flash Discovery Parameters (SFDP)
>> provides a mean to describe the features of a serial flash device
>> using a set of internal parameter tables.
>>
On 2019-02-04 01:06, Philippe Mathieu-Daudé wrote:
> On Sun, Feb 3, 2019 at 11:07 PM Philippe Mathieu-Daudé
> wrote:
>>
>> Express the MIPS machine dependencies with Kconfig.
>
> I forgot this serie misses a rule such "depends of MIPS64".
> Asked here:
> https://lists.gnu.org/archive/html/qemu-d
Patchew URL:
https://patchew.org/QEMU/20190204052712.30833-1-richard.hender...@linaro.org/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT
From: Murilo Opsfelder Araujo
Unfold parts of qemu_ram_mmap() for the sake of understanding, moving
declarations to the top, and keeping architecture-specifics in the
ifdef-else blocks. No changes in the function behaviour.
Give ptr and ptr1 meaningful names:
ptr -> guardptr : pointer to the
From: Thomas Huth
These files don't use anything from m48t59.h, so no need to include
this header here.
Signed-off-by: Thomas Huth
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: David Gibson
---
hw/ppc/mac_newworld.c | 1 -
hw/ppc/mac_oldworld.c | 1 -
hw/ppc/ppc.c | 2 --
hw/pp
From: Alexey Kardashevskiy
reg->phys_hi and assigned->phys_hi are big endian but we do an extra
byteswap anyway when copying reg->phys_hi to assigned->phys_hi.
To make things slightly more messy, we also add a relocatable bit (b_n())
although in the right endianness.
This fixes endianness of ass
On 2019-02-02 09:41, Palmer Dabbelt wrote:
> On Thu, 31 Jan 2019 01:51:52 PST (-0800), Peter Maydell wrote:
>> On Thu, 31 Jan 2019 at 06:39, Thomas Huth wrote:
>>>
>>> On 2019-01-30 20:01, Palmer Dabbelt wrote:
>>> > On Wed, 30 Jan 2019 09:45:33 PST (-0800), ebl...@redhat.com wrote:
>>> >> On 1/30
From: Mark Cave-Ayland
The original purpose of these macros was to correctly reference the high and low
parts of the VSRs regardless of the host endianness.
Replace these direct references to high and low parts with the relevant VsrD
macro instead, and completely remove the now-unused HI_IDX and
From: Mark Cave-Ayland
Following on from the previous work, there are numerous endian-related hacks
in int_helper.c that can now be replaced with Vsr* macros.
There are also a few places where the VECTOR_FOR_INORDER_I macro can be
replaced with a normal iterator since the processing order is irr
From: Murilo Opsfelder Araujo
The commit 7197fb4058bcb68986bae2bb2c04d6370f3e7218 ("util/mmap-alloc:
fix hugetlb support on ppc64") fixed Huge TLB mappings on ppc64.
However, we still need to consider the underlying huge page size
during munmap() because it requires that both address and length
From: Mark Cave-Ayland
These macros can be eliminated by instead using the relavant Vsr* macros in
the few locations where they appear.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target/ppc/int_helper.c | 66 +---
From: Mark Cave-Ayland
Richard points out that these macros suffer from a -fsanitize=shift bug in that
they improperly handle n == 0 turning it into a shift by 32/64 respectively.
Replace them with QEMU's existing ror32() and ror64() functions instead.
Signed-off-by: Mark Cave-Ayland
Reviewed-b
From: Thomas Huth
Currently, it is not possible to build a QEMU binary without the
ppc405_uc.c file, even if you do not want to have the embedded machines
in the binary. This is bad since it's quite a bit of code and this code
pulls in some more dependencies (e.g. via the usage of serial_mm_init(
From: Mark Cave-Ayland
As pointed out by Richard: it does not need the mask argument, nor does it need
the recast argument. The masking is implied by the cast argument, and the
recast is implied by the assignment.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Richard Henderson
Signed-off-by: Da
From: Thomas Huth
The cirrus VGA card has been enabled in the PPC builds with
commit 29f9cef39eb1ae55e82c ("ppc: Include vga cirrus card into
the compiling process") last year. It also works on the pseries
machine, even SLOF contains support for this card, so we can
also support this for the "-vg
From: Mark Cave-Ayland
This update to qemu_vga.ndrv includes the following changes:
- Build guest resolution list from QEMU EDID data if enabled
- Fixes to re-enable 256 color mode
Signed-off-by: Mark Cave-Ayland
Signed-off-by: David Gibson
---
pc-bios/qemu_vga.ndrv | Bin 14752 -> 18752 byte
From: Cédric Le Goater
Include the interrupt presenter under the machine_data as we plan to
remove it from under PowerPCCPU
Signed-off-by: Cédric Le Goater
Reviewed-by: Greg Kurz
Signed-off-by: David Gibson
---
hw/ppc/pnv.c | 7 ---
hw/ppc/pnv_core.c | 12 ++
From: Alexey Kardashevskiy
spapr_load_rtas() handles now RTAS address and size information in the FDT
so drop them from spapr_build_fdt().
While we are here, fix a small typo.
Fixes: 3f5dabceba24 "pseries: Consolidate construction of /rtas device tree
node"
Signed-off-by: Alexey Kardashevskiy
From: Thomas Huth
The "XIVE" section is currently listed in the "PowerPC Machines"
section, which is weird, since this is an interrupt controller
device. Move it to the "Devices" section instead.
Signed-off-by: Thomas Huth
Reviewed-by: Cédric Le Goater
Signed-off-by: David Gibson
---
MAINTAI
From: Mark Cave-Ayland
The current implementations make use of the endian-specific macros HI_IDX and
LO_IDX directly to calculate array offsets.
Rework the implementation to use the Vsr* macros so that these per-endian
references can be removed.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Ric
From: Cédric Le Goater
These fields have now been replaced by equivalents under the machine
data.
Signed-off-by: Cédric Le Goater
Reviewed-by: Greg Kurz
Signed-off-by: David Gibson
---
target/ppc/cpu.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.
From: Mark Cave-Ayland
I've unofficially been doing most of the work on the Mac machines for a while
now, so update MAINTAINERS to reflect this. David is still happy to be listed
as a reviewer as per our discussion at KVM forum.
Signed-off-by: Mark Cave-Ayland
Acked-by: David Gibson
Signed-off
From: Thomas Huth
There is currently a "e500" machine section and a "ppce500" device
section in the maintainers file - with some oddities: The wildcard
in the device section also covers the files from the machine section.
And hw/pci-host/ppce500.c is in the device section, while its header
is in
From: Cédric Le Goater
Next step is to remove them from under the PowerPCCPU
Signed-off-by: Cédric Le Goater
Reviewed-by: Greg Kurz
Signed-off-by: David Gibson
---
hw/intc/spapr_xive.c| 3 ++-
hw/intc/xics_spapr.c| 11 ++-
hw/ppc/spapr.c | 2
From: BALATON Zoltan
To avoid overflow if larger values are added later use ram_addr_t for
the sdram_bank_sizes parameter to match ram_size to which it is compared.
Signed-off-by: BALATON Zoltan
Signed-off-by: David Gibson
---
hw/ppc/ppc440_bamboo.c | 2 +-
hw/ppc/ppc4xx_devs.c| 4 ++--
From: BALATON Zoltan
The sdram_set_bcr() function in ppc440_uc.c takes a pointer into an
array then calculates its index from that. It's simpler and easier to
just pass the index which simplifies both the function and its callers.
Do similar cleanup in ppc4xx_devs.c to similar function.
Signed-o
From: Thomas Huth
In hw/scsi/spapr_vio.c we declare that the controller supports multiple
buses by specifying "max_channel = 7" there. So in the code that fixes
up the device tree nodes, we must encode the channel number (a.k.a. bus
number in the "Logical unit addressing format" table of SAM5) in
From: Mark Cave-Ayland
This prepares us for eliminating the use of direct array access within the VMX
instruction implementations.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target/ppc/internal.h | 9 -
1 file changed, 8 insertions(
From: BALATON Zoltan
When reading base register of RAM slot with no RAM we should not try
to calculate register value because that will result printing an error
due to invalid RAM size. Just return 0 without the error in this case.
Signed-off-by: BALATON Zoltan
Signed-off-by: David Gibson
---
From: BALATON Zoltan
Fix the encoding of larger memory modules in the SoC registers which
allows specifying more than 1GB memory for sam460ex. Well, only 2GB
due to SoC and firmware restrictions which was the only missing value
compared to what the real hardware supports. The SoC should support u
From: Cédric Le Goater
Signed-off-by: Cédric Le Goater
Reviewed-by: Greg Kurz
Signed-off-by: David Gibson
---
hw/intc/xive.c| 6 +++---
include/hw/ppc/xive.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index a3cb0cf0e3..7f567a
From: BALATON Zoltan
There's already a struct with the same name in ppc4xx_devs.c. They are
not used outside their files so don't clash but they are also not
identical so rename the ppc440 specific one to distinguish them.
Signed-off-by: BALATON Zoltan
Reviewed-by: David Gibson
Signed-off-by:
From: Greg Kurz
It has been there since the enablement of PR KVM for PAPR, ie, commit
f61b4bedaf35 in 2011. Not sure why at that time, but it is definitely
not needed with the current code.
Signed-off-by: Greg Kurz
Signed-off-by: David Gibson
---
target/ppc/kvm.c | 1 -
1 file changed, 1 dele
From: Cédric Le Goater
commit efe2add7cb7f ("spapr/vio: deprecate the "irq" property") was
merged in QEMU version 3.0. The "irq" property" can be removed for
QEMU version 4.0.
Signed-off-by: Cédric Le Goater
Reviewed-by: Thomas Huth
Reviewed-by: Greg Kurz
Signed-off-by: David Gibson
---
hw/
From: Cédric Le Goater
It provides a mean to retrieve the XiveTCTX of a CPU. This will become
necessary with future changes which move the interrupt presenter
object pointers under the PowerPCCPU machine_data.
The PowerNV machine has an extra requirement on TIMA accesses that
this new method add
The following changes since commit b3fc0af1ff5e922d4dd7c875394dbd26dc7313b4:
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
(2019-02-01 17:58:27 +)
are available in the Git repository at:
git://github.com/dgibson/qemu.git tags/ppc-for-4.0-2019020
From: Mark Cave-Ayland
The current implementations make use of the endian-specific macros MRGLO/MRGHI
and also reference HI_IDX and LO_IDX directly to calculate array offsets.
Rework the implementation to use the Vsr* macros so that these per-endian
references can be removed.
Signed-off-by: Mar
From: Greg Kurz
Machine types 3.0 and older only know about the legacy XICS backend.
Make it clear by erroring out if the user tries to set ic-mode on
such machines.
Signed-off-by: Greg Kurz
Tested-by: Cédric Le Goater
Reviewed-by: Cédric Le Goater
Signed-off-by: David Gibson
---
hw/ppc/spa
From: BALATON Zoltan
There are several boards with SPD EEPROMs that are now using
duplicated or slightly different hard coded data. Add a helper to
generate SPD data for a memory module of given type and size that
could be used by these boards (either as is or with further changes if
needed) whic
From: David Hildenbrand
While looking at the s390x implementation, looks like spapr has a
similar BUG when building the topology.
The primary bus number corresponds always to the bus number of the
bus the bridge is attached to.
Right now, if we have two bridges attached to the same bus (e.g. ro
From: BALATON Zoltan
Get rid of code from MIPS Malta board used to create SPD EEPROM data
(parts of which was not even needed for sam460ex) and use the generic
spd_data_generate() function to simplify this.
Signed-off-by: BALATON Zoltan
Signed-off-by: David Gibson
---
hw/ppc/sam460ex.c | 173
Hi
On Sun, Feb 3, 2019 at 3:34 PM Samuel Thibault
wrote:
>
> Only slirp actually needs it, and will need it along in libslirp.
>
> Signed-off-by: Samuel Thibault
Reviewed-by: Marc-André Lureau
> ---
> include/glib-compat.h | 57 ---
> slirp/misc.c
On Mon, Feb 4, 2019 at 5:56 AM Michael S. Tsirkin wrote:
>
> This update switched structures from __u64 to uint64_t.
> Accordingly, need to print with PRIx64.
>
> Signed-off-by: Michael S. Tsirkin
Reviewed-by: Marc-André Lureau
> ---
> contrib/libvhost-user/libvhost-user.c | 8
> 1 f
On 2019-02-03 23:07, Philippe Mathieu-Daudé wrote:
> Ease the kconfig selection by introducing CONFIG_PCI_BONITO to select
> the Bonito North Bridge. Select it for the Loongson 2E machine.
I think you should either rather drop the last sentence here (since the
"select" is only done in the next pat
On 2019-02-03 23:07, Philippe Mathieu-Daudé wrote:
> The Loongson 2E uses a Bonito64 system controller as North Bridge and a
> VT82C686 chipset as South Bridge. The network card chipset is a RTL8139D.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
[...]
> diff --git a/hw/mips/Kconfig b/hw/mips/K
On 2019-02-03 23:07, Philippe Mathieu-Daudé wrote:
> This platform use standard PC devices connected to an ISA bus.
> Networking is provided by a ne2000 chipset.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> default-configs/mips-softmmu-common.mak | 1 -
> hw/mips/Kconfig
no-re...@patchew.org writes:
> Patchew URL:
> https://patchew.org/QEMU/20190201171229.3361-1-alex.ben...@linaro.org/
>
>
>
> Hi,
>
> This series failed the docker-mingw@fedora build test. Please find the
> testing commands and
> their output below. If you have Docker installed, you can probabl
On 2019-02-03 23:07, Philippe Mathieu-Daudé wrote:
> The Jazz use the RC4030 Asic to provide an EISA bus and DMA/IRQ. The
> framebuffer display is managed by a G364, the network card is a Sonic
> DP83932. A QLogic ESP216 provides a SCSI bus.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> defa
On 2019-02-04 09:31, Thomas Huth wrote:
> On 2019-02-03 23:07, Philippe Mathieu-Daudé wrote:
>> The MIPSsim machine only emulates an 8250 UART and a simple network
>> controller, connected via an ISA bus.
>>
>> Signed-off-by: Philippe Mathieu-Daudé
>> ---
>> default-configs/mips-softmmu-common.ma
On 2019-02-03 23:07, Philippe Mathieu-Daudé wrote:
> The MIPSsim machine only emulates an 8250 UART and a simple network
> controller, connected via an ISA bus.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> default-configs/mips-softmmu-common.mak | 2 --
> hw/mips/Kconfig
Patchew currently reports failures with the mingw docker test - this
is due to --with-sdlabi=2.0 configure flag which does not exist anymore.
Remove this remainder from the docker test and the docs now.
Signed-off-by: Thomas Huth
---
docs/multiseat.txt | 2 +-
tests/docker/test-mingw | 3 +-
Yuval Shaia writes:
> On Fri, Feb 01, 2019 at 08:33:44AM +0100, Markus Armbruster wrote:
>> Eric Blake writes:
>>
>> > On 1/31/19 2:08 PM, Yuval Shaia wrote:
>> >> On Thu, Jan 31, 2019 at 07:17:16AM -0600, Eric Blake wrote:
>> >>> On 1/31/19 7:08 AM, Yuval Shaia wrote:
>> Signed-off-by: Yu
Support for SDL1.2 has been removed recently in commit:
0015ca5cbabe0b31d31610ddfaafd90a9e5911a4
("ui: remove support for SDL1.2 in favour of SDL2")
So we can drop the SDL1.2-specific code in sdl_keysym.h now, too.
Signed-off-by: Thomas Huth
---
ui/sdl_keysym.h | 73 ---
On Sun, Feb 3, 2019 at 11:56 PM Stefan Hajnoczi wrote:
>
> How can userspace applications query the size of devdax character
> devices?
>
> stat(1) doesn't know how large the device is:
>
> # stat /dev/dax0.0
> File: /dev/dax0.0
> Size: 0 Blocks: 0 IO Block: 4096 c
Yuval Shaia writes:
> On Thu, Jan 31, 2019 at 07:17:16AM -0600, Eric Blake wrote:
>> On 1/31/19 7:08 AM, Yuval Shaia wrote:
>> > Signed-off-by: Yuval Shaia
>> > ---
>> > hmp-commands-info.hx | 14 ++
>> > monitor.c| 6 ++
>> > 2 files changed, 20 insertions(+)
>
> H
Patchew URL:
https://patchew.org/QEMU/1549266858-5043-1-git-send-email-th...@redhat.com/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BE
Hello,
On Mon, Feb 4, 2019 at 6:38 AM Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/cpu.h | 10 +
> target/arm/helper.h| 2 +
> target/arm/cpu.c | 1 +
> target/arm/cpu64.c | 2 +
> target/arm/op_helper.c | 91 +++
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