05.02.2019 23:14, Andrey Shinkevich wrote:
> A new test file 242 added to the qemu-iotests set. It checks
> the format of qcow2 specific information for the new added
> section that lists details of bitmaps.
>
> Signed-off-by: Andrey Shinkevich
> ---
> tests/qemu-iotests/242 | 100 +
On 06/02/2019 07:28, Corentin Labbe wrote:
>>> Hello
>>>
>>> Sorry even with the patch I still hit the issue.
>>>
>>> I have added some debug and at least qemu set initrd_size correctly now.
>>>
>>> I have tried to compile openbios-sparc32 for debugging but fail with
>>> arch/sparc32/context.c:116
On Tue, Feb 05, 2019 at 03:23:53PM +0100, Philippe Mathieu-Daudé wrote:
> Hi Brad,
>
> On 2/5/19 2:57 PM, Brad Smith wrote:
> > If someone could point me in the right direction as to how the image is
> > created
> > I could look at coming up with something newer. I would prefer that over
> > some
On Tue, Feb 05, 2019 at 04:45:16PM +, Mark Cave-Ayland wrote:
> On 05/02/2019 09:11, Corentin Labbe wrote:
>
> > On Fri, Feb 01, 2019 at 02:15:15PM +, Mark Cave-Ayland wrote:
> >> On 18/01/2019 13:33, Mark Cave-Ayland wrote:
> >>
> >>> On 03/01/2019 15:48, Corentin Labbe wrote:
> >>>
> >>>
On 06/02/2019 03:37, Richard Henderson wrote:
> On 2/5/19 9:29 PM, Mark Cave-Ayland wrote:
>> The only minor question I had with the patchset in its current form is
>> whether to use
>> the new VsrD() macro for vscr_sat, or whether we don't really care enough?
>
> Given the comment
>
> /* Whi
I can now confirm that the same happens with virtio-blk and virtio-scsi.
Please find below the qemu log enhanced with the new information added by the
patch provided by Stefan:
vdev 0x55d22b8e10f0 ("virtio-blk")
vq 0x55d22b8ebe40 (idx 0)
inuse 128 vring.num 128
2019-02-06T00:40:41.742552Z qemu-sy
Hello,
On Wed, Feb 6, 2019 at 6:32 AM Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
Tested-by: Laurent Desnogues
Thanks,
Laurent
> ---
> v2: Return 0 for NaN
> ---
> target/arm/cpu.h | 10 +
> target/arm/helper.h| 2 +
> target/arm/cpu.c |
05.02.2019 23:33, Eric Blake wrote:
> On 2/5/19 2:14 PM, Andrey Shinkevich wrote:
>> In the 'Format specific information' section of the 'qemu-img info'
>> command output, the supplemental information about existing QCOW2
>> bitmaps will be shown, such as a bitmap name, flags and granularity:
>>
>
On 1/29/19 7:14 PM, Sven Schnelle wrote:
> PA-RISC specification says: "Setting the PSW Q-bit, PSW{28}, to 1
> with this instruction, if it was not already 1, is an undefined
> operation." However, at least HP-UX 10.20 sets the Q bit from 0 to 1
> with the SSM instruction. Tested this both on HP900
On 1/28/19 4:53 PM, Sven Schnelle wrote:
> While doing 'set $pcoqh=0xf000' i triggered the assertion below. From
> looking
> at the source, it looks like the argument order for deposit64() is wrong, and
> val
> needs to be moved to the end.
>
> Signed-off-by: Sven Schnelle
Queued, thanks.
Ping.
On 12/7/18 5:09 PM, Richard Henderson wrote:
> This covers inc, dec, and the bit test instructions.
>
> I believe we've finally covered all of the cases for
> which we have an atomic path that would use the cpu_A0
> temp, which is only initialized for address sources.
>
> Fixes: https://bu
Signed-off-by: Richard Henderson
---
v2: Return 0 for NaN
---
target/arm/cpu.h | 10 +
target/arm/helper.h| 2 +
target/arm/cpu.c | 1 +
target/arm/cpu64.c | 2 +
target/arm/op_helper.c | 76 ++
target/arm/translat
Changes since v1:
* Typo fixed in patch 2, which had scrogged FMOV
* Return 0 for NaN, as for any other ARM fp conversion.
r~
Richard Henderson (3):
target/arm: Force result size into dp after operation
target/arm: Restructure disas_fp_int_conv
target/arm: Implement ARMv8.3-JSConv
t
For opcodes 0-5, move some if conditions into the structure
of a switch statement. For opcodes 6 & 7, decode everything
at once with a second switch.
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 94 --
1 file changed, 49 insertions(+), 45
Rather than a complex set of cases testing for writeback,
adjust DP after performing the operation.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/targe
Generic tcg now has support for folding of OR,
and has grown min/max primitives.
r~
Richard Henderson (5):
target/arm: Rely on optimization within tcg_gen_gvec_or
target/arm: Use vector minmax expanders for aarch64
target/arm: Use vector minmax expanders for aarch32
target/arm: Use tcg
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 25 +++--
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 9d2dba7ed2..df1cd3fa3e 100644
--- a/target/arm/translate.c
+
Since we're now handling a == b generically, we no longer need
to do it by hand within target/arm/.
Reviewed-by: David Gibson
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 6 +-
target/arm/translate-sve.c | 6 +-
target/arm/translate.c | 12 +++-
3 file
These are now unused.
Signed-off-by: Richard Henderson
---
target/arm/helper.h | 12
target/arm/neon_helper.c | 12
2 files changed, 24 deletions(-)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index 53a38188c6..9874c35ea9 100644
--- a/target/arm/helper.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 35 ++-
1 file changed, 14 insertions(+), 21 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index a12bfac719..fd5ceb6613 100644
--- a/t
The 32-bit PMIN/PMAX has been decomposed to scalars,
and so can be trivially expanded inline.
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index df1cd3fa3e..
From: Catherine Ho
Without this patch, gcc might up the Input/Output registers and
cause unpredictable error.
Fixes: 1ec182c33379 ("target/arm: Convert to HAVE_CMPXCHG128")
Signed-off-by: Catherine Ho
Message-Id: <1548838794-23757-1-git-send-email-catherine.h...@gmail.com>
Signed-off-by: Richa
The following changes since commit 47994e16b1d66411953623e7c0bf0cdcd50bd507:
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190205'
into staging (2019-02-05 18:25:07 +)
are available in the Git repository at:
https://github.com/rth7680/qemu.git tag
From: Peter Maydell
In commit f7b78602fdc6c6e4be we added the CPU cluster number to the
cflags field of the TB hash; this included adding it to the value
kept in tb->cflags, since we pass that field directly into the hash
calculation in some places. Unfortunately we forgot to check whether
other
On 2/5/19 3:18 PM, Peter Maydell wrote:
> In commit f7b78602fdc6c6e4be we added the CPU cluster number to the
> cflags field of the TB hash; this included adding it to the value
> kept in tb->cflags, since we pass that field directly into the hash
> calculation in some places. Unfortunately we forg
On 2/5/19 9:29 PM, Mark Cave-Ayland wrote:
> The only minor question I had with the patchset in its current form is
> whether to use
> the new VsrD() macro for vscr_sat, or whether we don't really care enough?
Given the comment
/* Which bit we set is completely arbitrary, but clear the rest.
On 2/5/19 6:12 PM, Peter Maydell wrote:
> HACR_EL2 is a register with IMPDEF behaviour, which allows
> implementation specific trapping to EL2. Implement it as RAZ/WI,
> since QEMU's implementation has no extra traps. This also
> matches what h/w implementations like Cortex-A53 and A57 do.
>
> Sig
On Mon, Jan 07, 2019 at 07:39:36PM +0100, Cédric Le Goater wrote:
> This extends the KVM XIVE device backend with 'synchronize_state'
> methods used to retrieve the state from KVM. The HW state of the
> sources, the KVM device and the thread interrupt contexts are
> collected for the monitor usage
On Mon, Jan 07, 2019 at 07:39:37PM +0100, Cédric Le Goater wrote:
> This handler is in charge of stabilizing the flow of event notifications
> in the XIVE controller before migrating a guest. This is a requirement
> before transferring the guest EQ pages to a destination.
>
> When the VM is stoppe
On Mon, Jan 07, 2019 at 07:39:35PM +0100, Cédric Le Goater wrote:
> This introduces a set of helpers when KVM is in use, which create the
> KVM XIVE device, initialize the interrupt sources at a KVM level and
> connect the interrupt presenters to the vCPU.
>
> They also handle the initialization o
On 2/5/19 4:22 PM, David Hildenbrand wrote:
> +static inline bool float128_is_normal(float128 a)
> +{
> +return ((a.high + (1ULL << 47)) & -1ULL >> 1) >= 1ULL << 48;
I believe this is off by one: 1 << 48 and >= 1 << 49.
The exponent is at [62:48]. The trick is adding 1, letting Inf+NaN overf
On 2/5/19 3:18 PM, Peter Maydell wrote:
> In commit f7b78602fdc6c6e4be we added the CPU cluster number to the
> cflags field of the TB hash; this included adding it to the value
> kept in tb->cflags, since we pass that field directly into the hash
> calculation in some places. Unfortunately we forg
On Tue, Feb 05, 2019 at 03:59:15PM +0100, Greg Kurz wrote:
> On Tue, 5 Feb 2019 17:13:46 +1100
> David Gibson wrote:
>
> > On Thu, Jan 17, 2019 at 06:14:46PM +0100, Greg Kurz wrote:
> > > The current code assumes that an interrupt is allocated as soon as its
> > > type is set to MSI or LSI. PHB h
On 2/5/19 8:49 AM, Marc-André Lureau wrote:
> Commit fcfab7541 ("qmp-shell: learn to send commands with quoted
> arguments") introduces the usage of Python 'shlex' to handle quoted
> arguments, but it accidentally broke generation of nested JSON
> structs.
>
> shlex drops quotes, which breaks p
Do not add/del coalesced IO ranges in the case where the
same FlatRanges are present in both old and new FlatViews
Fixes: 3ac7d43a6fbb ("memory: update coalesced_range on transaction_commit")
Signed-off-by: Jagannathan Raman
---
memory.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
Hi,
I noticed the following backtrace while launching upstream QEMU with
virtio devices.
#0 0x7fffdf7292c7 in raise () at /lib64/libc.so.6
#1 0x7fffdf72a9b8 in abort () at /lib64/libc.so.6
#2 0x5589a0c5 in kvm_mem_ioeventfd_add (listener=0x56946ac8,
section=0x7ffdc5ff8140,
On 2/5/2019 9:23 AM, Philippe Mathieu-Daudé wrote:
Hi Brad,
On 2/5/19 2:57 PM, Brad Smith wrote:
If someone could point me in the right direction as to how the image is
created
I could look at coming up with something newer. I would prefer that over
some
of the workarounds I've seen to date.
From: Stefan Berger
This is a backport of rev 24cf5413aa0 to 3.0.x and 3.1.x.
This patch makes the a TPM 2.0 with TIS interface available under the
HID 'MSF0101'. This is supported by Linux and also Windows now
recognizes the TPM 2.0 with TIS interface. Leave the TPM 1.2 as before.
Signed-off-b
On 23/01/2019 05:09, Richard Henderson wrote:
> On 1/7/19 5:11 AM, Mark Cave-Ayland wrote:
>> #7 0x55852e53 in expand_4_vec (vece=2, dofs=197872,
>> aofs=198288, bofs=197776, cofs=197792, oprsz=16, tysz=16,
>> type=TCG_TYPE_V128, write_aofs=true, fni=0x5599182a
>> ) at
>> /home/hsp/sr
On Thu, Jan 31, 2019 at 06:37:13PM +0100, Stefano Garzarella wrote:
> On Thu, Jan 31, 2019 at 11:43:07AM -0500, Michael S. Tsirkin wrote:
> > On Thu, Jan 31, 2019 at 04:50:46PM +0100, Stefano Garzarella wrote:
> > > On Thu, Jan 31, 2019 at 03:40:38PM +, Dr. David Alan Gilbert wrote:
> > > > * S
On 2/4/19 7:35 PM, Paolo Bonzini wrote:
> This makes it easier to follow what is going on.
>
> Signed-off-by: Paolo Bonzini
This one also misses:
Reviewed-by: Philippe Mathieu-Daudé
> ---
> scripts/tap-driver.pl | 1 +
> scripts/tap-merge.pl | 1 +
> 2 files changed, 2 insertions(+)
>
> dif
Hmm that's not surprising because coalesced ranges were completely
broken before that commit. I'll take a look.
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https://bugs.launchpad.net/bugs/1813940
Title:
kvm_mem_ioeventfd_add:
On 2/5/19 2:14 PM, Andrey Shinkevich wrote:
> A new test file 242 added to the qemu-iotests set. It checks
> the format of qcow2 specific information for the new added
> section that lists details of bitmaps.
>
> Signed-off-by: Andrey Shinkevich
> ---
> +
> +disk = file_path('disk')
> +chunk = 2
On 2/5/19 2:14 PM, Andrey Shinkevich wrote:
> In the 'Format specific information' section of the 'qemu-img info'
> command output, the supplemental information about existing QCOW2
> bitmaps will be shown, such as a bitmap name, flags and granularity:
>
> +##
> +# @Qcow2BitmapInfo:
> +#
> +# Qco
On 05/02/19 21:05, Peter Maydell wrote:
> This part looks like the usual "foo-softmmu/config-devices.mak isn't updated
> if a file that's #included from default-configs/foo-softmmu.mak is
> changed" dependency bug -- I guess the fix for that isn't in this
> patchset ?
No, this pull request is not
On 2/5/19 6:42 PM, Peter Maydell wrote:
> Coverity warns (CID 1390634) that open_net_route() is not
> checking the return value from sscanf(), which means that
> it might then use values that aren't initialized.
>
> Errors here should in general not happen since we're passing
> an assumed-good /pr
Patchew URL:
https://patchew.org/QEMU/20190205182848.29887-1-samuel.thiba...@ens-lyon.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PULLv3 00/32] More work towards libslirp
Message-id: 20190205182848.29887-1-samuel
A new test file 242 added to the qemu-iotests set. It checks
the format of qcow2 specific information for the new added
section that lists details of bitmaps.
Signed-off-by: Andrey Shinkevich
---
tests/qemu-iotests/242 | 100 +++
tests/qemu-iotests/242.out | 167 +
On Tue, 5 Feb 2019 at 20:01, Peter Maydell wrote:
>
> On Tue, 5 Feb 2019 at 18:18, Paolo Bonzini wrote:
> >
> > The following changes since commit 1c3d45df5e94042d5fb2bb31416072563ab30e49:
> >
> > Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2019-02-04'
> > into staging (2019-02-0
On 1/31/19 3:08 PM, Yuval Shaia wrote:
The function rdma_poll_cq is called from two contexts - completion
handler thread which sense new completion on backend channel and
explicitly as result of guest issuing poll_cq command.
Add lock to protect against concurrent executions.
Signed-off-by:
On 1/31/19 3:08 PM, Yuval Shaia wrote:
The function argument rdma_dev_res is not needed as it is stored in the
backend_dev object at init.
Signed-off-by: Yuval Shaia
---
hw/rdma/rdma_backend.c | 13 ++---
hw/rdma/rdma_backend.h | 1 -
hw/rdma/vmw/pvrdma_qp_ops.c | 3 +
On Tue, 5 Feb 2019 at 18:18, Paolo Bonzini wrote:
>
> The following changes since commit 1c3d45df5e94042d5fb2bb31416072563ab30e49:
>
> Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2019-02-04' into
> staging (2019-02-05 12:46:18 +)
>
> are available in the git repository at:
>
>
Patchew URL:
https://patchew.org/QEMU/20190205182848.29887-1-samuel.thiba...@ens-lyon.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PULLv3 00/32] More work towards libslirp
Type: series
Message-id: 20190205182848.2
Inform a user in case qcow2_get_specific_info fails to obtain
QCOW2 image specific information. This patch is preliminary to
the one "qcow2: Add list of bitmaps to ImageInfoSpecificQCow2".
Signed-off-by: Andrey Shinkevich
Reviewed-by: Eric Blake
Reviewed-by: Vladimir Sementsov-Ogievskiy
Reviewe
Hi,
I've re-spun the cpuid patches with the changes suggested by Peter's
review. The biggest change is the squashing of bits is now all data
driven with ARMCPRegUserSpaceInfo being used to control how bits are
altered for userspace presentation. This includes using glob matching
to set whole bunch
In the 'Format specific information' section of the 'qemu-img info'
command output, the supplemental information about existing QCOW2
bitmaps will be shown, such as a bitmap name, flags and granularity:
image: /vz/vmprivate/VM1/harddisk.hdd
file format: qcow2
virtual size: 64G (68719476736 bytes)
v12:
In the function block_crypto_get_specific_info_luks(),
checking the format was replaced with assertion.
The 'unknown flag' was removed from the structure Qcow2BitmapInfo.
A new case added to the test file 242 to check QEMU behavior in case of
unknown flag in a bitmap directory entry of QCOW2 i
On Mon, 14 Jan 2019 at 01:11, Richard Henderson
wrote:
>
> This is TFSRE0_EL1, TFSR_EL1, TFSR_EL2, TFSR_EL3,
> RGSR_EL1, GCR_EL1, and PSTATE.TCO.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/cpu.h | 5 +
> target/arm/translate.h | 11 ++
> target/arm/helper.
On Mon, 14 Jan 2019 at 01:11, Richard Henderson
wrote:
>
> Based-on: 20190110124951.15473-1-richard.hender...@linaro.org
> aka the TBID patch set, which itself is based on the BTI patch set.
>
> The full tree is available at
>
> https://github.org/rth7680/qemu.git tgt-arm-mte
>
> This extension
From: Marc-André Lureau
Remove hard-coded dependency on slirp in main-loop, and use a "poll"
notifier instead. The notifier is registered per slirp instance.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
include/qemu/main-loop.h | 15 ++
net/slirp.c | 24 +
On Tue, Feb 5, 2019 at 7:22 AM Luc Michel wrote:
>
>
>
> On 2/5/19 1:58 PM, Thomas Huth wrote:
> > The device can not be instantiated by the user and QEMU currently
> > aborts when you try to use it:
> >
> > $ x86_64-softmmu/qemu-system-x86_64 -device cpu-cluster
> > qemu-system-x86_64: hw/cpu/clu
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/if.c | 1 -
slirp/ip6_icmp.c | 1 -
slirp/slirp.c| 1 -
slirp/util.h | 2 ++
4 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/slirp/if.c b/slirp/if.c
index 73e3705740..
Peter Maydell, le mar. 05 févr. 2019 18:24:45 +, a ecrit:
> /home/pm215/qemu/slirp/misc.c:166:5: error: unknown type name ‘QemuGSpawnFds’
D'oh...
Fixed in v3.
Samuel
On Mon, 14 Jan 2019 at 01:11, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/internals.h | 1 +
> target/arm/helper.c| 8 ++--
> 2 files changed, 7 insertions(+), 2 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Mon, 14 Jan 2019 at 01:11, Richard Henderson
wrote:
>
> When MTE is fully enabled, i.e. access to tags are enabled and
> tag checks affect the PE, then arrange to perform the check
> while stripping the TBI.
>
> The check is not yet implemented, just the plumbing to that point.
>
> Signed-off-b
From: Marc-André Lureau
Except for the migration code which is gated by WITH_QEMU, only
include our own headers, so libslirp can be built standalone.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/arp_table.c | 3 ++-
slirp/bootp.c | 1 -
slirp/cksum.c
Userspace programs should (in theory) query the ELF HWCAP before
probing these registers. Now we have implemented them all make it
public.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
---
linux-user/elfload.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/linux-user/elfload.c
From: Marc-André Lureau
Replace:
- u_char -> uint8_t
- u_short -> uint16_t
- u_long -> uint32_t
- u_int -> unsigned
- caddr_t -> char *
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/ip_icmp.c| 6 +++---
slirp/ip_icmp.h| 18 +-
slirp/ip_inpu
The bug is also reproducible with virtio-9p
-fsdev local,id=r,path=/,security_model=none -device
virtio-9p-pci,fsdev=r,mount_tag=r
I bisected it to the same commit.
--
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https://bugs.launc
From: Marc-André Lureau
Introduce a SlirpCb callback to kick the main io-thread.
Add an intermediary sodrop() function that will call SlirpCb.notify
callback when sbdrop() returns true.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
net/slirp.c | 1 +
slirp/libslir
As this is a single register we could expose it with a simple ifdef
but we use the existing modify_arm_cp_regs mechanism for consistency.
Signed-off-by: Alex Bennée
---
target/arm/helper.c | 21 ++---
1 file changed, 14 insertions(+), 7 deletions(-)
diff --git a/target/arm/helpe
From: Marc-André Lureau
Some of those could have been squashed earlier, but it is easier to do
it all here.
Signed-off-by: Marc-André Lureau
Signed-off-by: samuel Thibault
---
slirp/dhcpv6.c | 1 -
slirp/ip6_icmp.c | 2 --
slirp/misc.c | 2 --
slirp/sbuf.c | 1 -
slirp/slirp.c|
Patchew URL:
https://patchew.org/QEMU/20190205170510.21984-1-peter.mayd...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PULL 00/22] target-arm queue
Type: series
Message-id: 20190205170510.21984-1-peter.may
On Tue, 5 Feb 2019 at 17:05, Peter Maydell wrote:
>
> Arm stuff, mostly patches from RTH.
>
> thanks
> -- PMM
>
> The following changes since commit 01a9a51ffaf4699827ea6425cb2b834a356e159d:
>
> Merge remote-tracking branch 'remotes/kraxel/tags/ui-20190205-pull-r
A number of CPUID registers are exposed to userspace by modern Linux
kernels thanks to the "ARM64 CPU Feature Registers" ABI. For QEMU's
user-mode emulation we don't need to emulate the kernels trap but just
return the value the trap would have done. To avoid too much #ifdef
hackery we process ARMC
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/ip.h | 10 +-
slirp/ip6_icmp.h | 6 +++---
slirp/slirp.h| 5 +++--
slirp/util.h | 32
4 files changed, 43 insertions(+), 10 deletions(-)
c
From: Marc-André Lureau
Remove a dependency on qemu util.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/slirp.c | 4 ++--
slirp/tftp.c | 2 +-
slirp/util.c | 17 +
slirp/util.h | 2 ++
4 files changed, 22 insertions(+), 3 deletions(-)
diff --
From: Marc-André Lureau
Instead of calling into QEMU chardev directly, and mixing it with
slirp_add_exec() handling, add a new function slirp_add_guestfwd()
which takes a write callback.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
net/slirp.c | 14 ++
From: Marc-André Lureau
Make it possible to use headers easily with C++ projects.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/libslirp.h | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/slirp/libslirp.h b/slirp/libslirp.h
index 9b13d825
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
net/slirp.c | 21 +
slirp/ip6_icmp.c | 16 +++-
slirp/libslirp.h | 14 +++---
slirp/slirp.h| 2 +-
4 files changed, 40 insertions(+), 13 deletions(-)
d
This tests a bunch of registers that the kernel allows userspace to
read including the CPUID registers.
Signed-off-by: Alex Bennée
---
v4
- also test for extra bits that shouldn't be exposed
v5
- work around missing HWCAP_CPUID on older compilers
- add more registers to test and some aarch
From: Marc-André Lureau
Our API usage requires Vista, set WIN32_LEAN_AND_MEAN to fix a number
of issues (winsock2.h include order for ex, which is better to include
first for legacy reasons).
While at it, group redundants #ifndef _WIN32 blocks.
Signed-off-by: Marc-André Lureau
Signed-off-by: S
pkt parameter may be unaligned, so we must access it byte-wise.
This fixes sparc64 host SIGBUS during pxe boot.
Signed-off-by: Samuel Thibault
Reviewed-by: Richard Henderson
---
slirp/slirp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/slirp/slirp.c b/slirp/slirp.c
inde
There are a whole bunch more registers in the CPUID space which are
currently not used but are exposed as RAZ. To avoid too much
duplication we expand ARMCPRegUserSpaceInfo to understand glob
patterns so we only need one entry to tweak whole ranges of registers.
Signed-off-by: Alex Bennée
---
ta
From: Marc-André Lureau
Use a more descriptive name for the callback.
Reuse the SlirpWriteCb type. Wrap it to check that all data has been written.
Return a ssize_t for potential error handling and data-loss reporting.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
incl
From: Marc-André Lureau
It would be legitimate to use libslirp without glib. Let's
add_poll/get_revents pair of callbacks to provide the same
functionality.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
net/slirp.c | 72 ++
From: Peter Maydell
Various ipv6 structs in the slirp headers are marked QEMU_PACKED,
but they are actually naturally aligned and will have no padding
in them. Instead of marking them with the 'packed' attribute,
assert at compile time that they are the size we expect. This
allows us to take the
Although technically not visible to userspace the kernel does make
them visible via a trap and emulate ABI. We provide a new permission
mask (PL0U_R) which maps to PL0_R for CONFIG_USER builds and adjust
the minimum permission check accordingly.
Signed-off-by: Alex Bennée
---
target/arm/cpu.h
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/ip6.h | 1 -
slirp/slirp.h | 1 -
slirp/util.h | 10 ++
3 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/slirp/ip6.h b/slirp/ip6.h
index 1e3e329ce6..4e7c366505 100644
-
to remove another dependency on qemu.
Signed-off-by: Samuel Thibault
Reviewed-by: Marc-André Lureau
Reviewed-by: Richard Henderson
Reviewed-by: Stefano Garzarella
Reviewed-by: Alex Bennée
---
slirp/ip.h | 4 ++--
slirp/ip6.h | 4 ++--
slirp/ip6_icmp.h | 10 +-
3 files ch
From: Marc-André Lureau
Add a counter-part to register_poll_fd() for completeness.
(so far, register_poll_fd() is called only on struct socket fd)
Suggested-by: Paolo Bonzini
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
net/slirp.c | 6 ++
slirp/ip_icmp.c |
From: David Hildenbrand
Let's avoid manually looking up the hotplug handler class. Use the
existing wrappers instead.
Signed-off-by: David Hildenbrand
Message-Id: <20181212095707.19358-1-da...@redhat.com>
Signed-off-by: Paolo Bonzini
---
hw/i386/pc.c | 30 --
1 fil
From: Marc-André Lureau
Now that polling is done per-instance, we don't need a global list of
slirp instances.
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/slirp.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/slirp/slirp.c b/slirp/slirp.c
index a0de8b71
On Fri, Feb 1, 2019 at 3:26 PM Philippe Mathieu-Daudé wrote:
>
> Hi Jonathan,
>
> On 2/1/19 11:06 PM, Jonathan Behrens wrote:
> > Public bug reported:
> >
> > I attempted to run qemu with a ram disk. However, when reading the
> > contents of the disk from within the VM I only get back zeros.
> >
>
The following changes since commit 01a9a51ffaf4699827ea6425cb2b834a356e159d:
Merge remote-tracking branch 'remotes/kraxel/tags/ui-20190205-pull-request'
into staging (2019-02-05 14:01:29 +)
are available in the Git repository at:
https://people.debian.org/~sthibault/qem
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/qtailq.h | 193 +
slirp/slirp.h | 3 +-
2 files changed, 194 insertions(+), 2 deletions(-)
create mode 100644 slirp/qtailq.h
diff --git a/slirp
From: Heiher
The machine that with hvf accelerator and smp sometimes boot hangs
because all processors are executing instructions at startup,
including early I/O emulations. We should just allow the bootstrap
processor to initialize the machine and then to wake up slave
processors by interrupt.
From: Marc-André Lureau
Make state saving optional: this will allow to build SLIRP without
QEMU. (eventually, the vmstate helpers will be extracted, so an
external project & process could save its state)
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
slirp/Makefile.objs |
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Signed-off-by: Samuel Thibault
---
net/slirp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/slirp.c b/net/slirp.c
index ec07f662c0..b91741b8fc 100644
--- a/net/slirp.c
+++ b/net/slirp.c
@@ -773,7 +773,7 @@ stat
Only slirp actually needs it, and will need it along in libslirp.
Signed-off-by: Samuel Thibault
Reviewed-by: Marc-André Lureau
---
include/glib-compat.h | 57 ---
slirp/misc.c | 62 +++
2 files changed, 62 ins
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