Add Kconfig dependencies for the PXA2xx machines (akita, borzoi,
connex and verdex gumstix, tosa, mainstone, spitz, terrier and z2).
This patch is based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
Add Kconfig dependencies for the Strongarm collie machine.
This patch is based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 3 +--
hw/arm/Kconfig | 7 +++
Some machines have an AHCI adapter, but no PCI. To be able to
compile hw/ide/ahci.c without CONFIG_PCI, we still need the two
functions msi_enabled() and msi_notify() for linking.
This is required for the new Kconfig-like build system, if a user
wants to compile a QEMU binary with just one machine
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 6 +-
hw/arm/Kconfig | 6 ++
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git
Add Kconfig dependencies for the OMAP machines (cheetah, n800, n810,
sx1 and sx1-v1).
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 17 -
Add Kconfig dependencies for the highbank machine (and the midway
machine).
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 9 +
hw/arm/Kconfig
This series reworks the default-configs/arm-softmmu.mak and
default-configs/aarch64-softmmu.mak files to use the new Kconfig-style
dependencies instead.
Based-on: 1549562254-41157-1-git-send-email-pbonz...@redhat.com
("Support Kconfig in QEMU")
Some of the patches are slightly based on
Add Kconfig dependencies for the fsl-imx31 / kzm machine.
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 3 +--
hw/arm/Kconfig | 5 +
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 8 +---
hw/arm/Kconfig | 9 +
hw/display/Kconfig | 1 +
3 files changed, 11
Add Kconfig dependencies for the Exynos-related boards (nuri and
smdkc210).
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Signed-off-by: Thomas Huth
---
default-configs/arm-softmmu.mak | 18 ++
hw/arm/Kconfig
Some of our machines (like the ARM cubieboard) use CONFIG_AHCI for an AHCI
sysbus device, but do not use CONFIG_PCI since they do not feature a PCI
bus. With CONFIG_AHCI but without CONFIG_PCI, currently linking fails:
../hw/ide/ich.o: In function `pci_ich9_ahci_realize':
The musca machine has been added recently, so we need now a Kconfig
switch for this, too.
Signed-off-by: Thomas Huth
---
I assume Paolo will add this config switch to his next iteration
of the Kconfig patches already, so in that case this patch can be
dropped / ignored.
hw/arm/Kconfig | 3
Signed-off-by: Richard Henderson
---
hw/arm/virt.c | 1 +
target/arm/cpu64.c | 58 ++
2 files changed, 59 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 06a155724c..4495ce8918 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@
There are new field definitions, CSV2 and CSV3, that do not yet
appear in the main ARM ARM. Define the ID_AA64PF0 versions,
since we already define the rest of those bits.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 2 ++
hw/arm/virt.c | 1 +
target/arm/cpu64.c | 63
Only perform the assert when both registers exist.
Extract the variables from ID_AA64DFR0_EL1 for AArch64.
Signed-off-by: Richard Henderson
---
target/arm/helper.c | 58 +
1 file changed, 38 insertions(+), 20 deletions(-)
diff --git
This was defined at some point before ARMv8.4, and will
shortly be used by new processor descriptions.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h| 1 +
target/arm/helper.c | 4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
This was res0 before ARMv8.2, but will shortly be used by
new processor definitions.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h| 15 +++
target/arm/helper.c | 4 ++--
target/arm/kvm64.c | 2 ++
3 files changed, 19 insertions(+), 2 deletions(-)
diff --git
There have been several announcements since the a72.
The a75 and a76 entries are RFC because, while they boot with a 3.15
kernel, they do not boot with a 5.0-rc7 kernel. I'm really not sure
where things have gone off the rails. It'll take some more serious
tracing to figure out what went wrong.
Signed-off-by: Richard Henderson
---
hw/arm/virt.c | 1 +
target/arm/cpu64.c | 58 ++
2 files changed, 59 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index c69a734878..06a155724c 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@
Hello again.
I was trying to set up virtual ppc64le machine with some linux inside. First
tried with qemu-3.1 on 32-bit host. It worked, but was slow-ish.
next I tred to compile latest qemu git (up to commit
8eb29f1bf5a974dc4c11d2d1f5e7c7f7a62be116) on 64-bit Slackware, to get MTTCG
Based-on: the ARMv8.2-FHM patch set, although I don't know that
this is an actual dependency; it's just the tree I started with.
There is not yet support for this extension within FVP, so I've
self-tested it against my own understanding of what is supposed
to go on with the file below.
r~
This will allow sharing code that adjusts rmode beyond
the existing users.
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 90 +-
1 file changed, 49 insertions(+), 41 deletions(-)
diff --git a/target/arm/translate-a64.c
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 5 ++
target/arm/helper.h| 5 ++
target/arm/cpu64.c | 1 +
target/arm/translate-a64.c | 71 ++--
target/arm/vfp_helper.c| 96 ++
5 files changed,
Hello!
I just pulled latest git
up to
commit 8eb29f1bf5a974dc4c11d2d1f5e7c7f7a62be116 (HEAD -> master, origin/master,
origin/HEAD)
Merge: a05838cb2a 2b6326c0bf
Author: Peter Maydell
Date: Fri Feb 22 15:48:04 2019 +
Merge remote-tracking branch
Instead of checking against busy, inconsistent, or read only directly,
use a check function with permissions bits that let us streamline the
checks without reproducing them in many places.
As a side effect, this adds consistency checks to all the QMP
interfaces for bitmap manipulation.
Set the inconsistent bit on load instead of rejecting such bitmaps.
There is no way to un-set it; the only option is to delete it.
Obvervations:
- bitmap loading does not need to update the header for in_use bitmaps.
- inconsistent bitmaps don't need to have their data loaded; they're
glorified
Add an inconsistent bit to dirty-bitmaps that allows us to report a bitmap as
persistent but potentially inconsistent, i.e. if we find bitmaps on a qcow2
that have been marked as "in use".
Signed-off-by: John Snow
---
block/dirty-bitmap.c | 19 +++
Even though the status field is deprecated, we still have to support
it for a few more releases. Since this is a very new kind of bitmap
state, it makes sense for it to have its own status field.
Signed-off-by: John Snow
---
block/dirty-bitmap.c | 7 ++-
qapi/block-core.json | 7 ++-
2
Allow QEMU to read in bitmaps that have the in-use bit set, for the
purposes of allowing users to delete those bitmaps.
This is chosen in preference to a hard error on load to minimize
impact for a non-critical error, but to force the user or management
utility to acknowledge that the bitmap is
From: Michel Heily
Signed-off-by: Michel Heily
---
hw/arm/stellaris.c | 260 -
1 file changed, 258 insertions(+), 2 deletions(-)
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index 442529c..08baeb2 100644
--- a/hw/arm/stellaris.c
+++
bdrv_set_dirty_bitmap and bdrv_reset_dirty_bitmap are only used as an
internal API by the mirror and migration areas of our code. These
calls modify the bitmap, but do so at the behest of QEMU and not the
guest.
Presently, these bitmaps are always "enabled" anyway, but there's no
reason they have
This adds a simple test that ensures the busy bit works for push backups,
as well as doubling as bonus test for incremental backups that get interrupted
by EIO errors.
Recording bit tests are already handled sufficiently by 236.
Signed-off-by: John Snow
---
tests/qemu-iotests/124 | 110
Simply move the big status enum comment block to above the status
function, and document it as being deprecated. The whole confusing
block can get deleted in three releases time.
Signed-off-by: John Snow
---
block/dirty-bitmap.c | 36 +++-
1 file changed, 19
This field isn't present anymore.
Signed-off-by: John Snow
---
blockdev.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/blockdev.c b/blockdev.c
index 1aaadb6128..cbce44877d 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -1255,7 +1255,6 @@ out_aio_context:
* @node: The name of the BDS node
These mean the same thing now. Unify them and rename the merged call
bdrv_dirty_bitmap_busy to indicate semantically what we are describing,
as well as help disambiguate from the various _locked and _unlocked
versions of bitmap helpers that refer to mutex locks.
Signed-off-by: John Snow
---
Check that the bitmap is not in use prior to it checking if it is
not enabled/recording guest writes. The bitmap being busy was likely
at the behest of the user, so this error has a greater chance of being
understood by the user.
Signed-off-by: John Snow
---
nbd/server.c | 10 +-
1 file
Instead of implying a user_locked/busy status, make it explicit.
Now, bitmaps in use by migration, NBD or backup operations
are all treated the same way with the same code paths.
Signed-off-by: John Snow
Reviewed-by: Eric Blake
---
block/dirty-bitmap.c | 11 ++-
1 file changed, 6
"Frozen" was a good description a long time ago, but it isn't adequate now.
Rename the frozen predicate to has_successor to make the semantics of the
predicate more clear to outside callers.
In the process, remove some calls to frozen() that no longer semantically
make sense. For
Currently, the enabled predicate means something like:
"the QAPI status of the bitmap is ACTIVE."
After this patch, it should mean exclusively:
"This bitmap is recording guest writes, and is allowed to do so."
In many places, this is how this predicate was already used.
Internal usages of the
The current API allows us to report a single status, which we've defined as:
Frozen: has a successor, treated as qmp_locked, may or may not be enabled.
Locked: no successor, qmp_locked. may or may not be enabled.
Disabled: Not frozen or locked, disabled.
Active: Not frozen, locked, or disabled.
The current internal meanings of "locked", "user_locked",
"qmp_locked", "frozen", "enabled", and "disabled" are all
a little muddled.
Deprecate the @status field in favor of two new booleans
that carry very specific meanings. Then, rename and rework
some of the internal semantics to help make the
On Thu, Feb 21, 2019 at 03:55:19PM +0100, Igor Mammedov wrote:
>On Wed, 20 Feb 2019 11:15:56 +0800
>Wei Yang wrote:
>
>> We didn't specify the indent rule for multiline code here, which may
>> mislead users. And in current code, the code use different rules.
>>
>> Add this rule in CODING_STYLE
On Thu, Feb 21, 2019 at 03:50:04PM +0100, Igor Mammedov wrote:
>On Wed, 20 Feb 2019 08:51:21 +0800
>Wei Yang wrote:
>
>> Three trivial cleanup for pc-dimm.
>>
>> Patch [1] remove the check on class->hotpluggable since pc-dimm is always
>> hotpluggable.
>> Patch [2] remove nvdimm_realize
>> Patch
On 2/22/19 8:25 AM, amagdy.af...@gmail.com wrote:
> @@ -373,9 +373,10 @@ static int write_misa(CPURISCVState *env, int csrno,
> target_ulong val)
> }
>
> /* Suppress 'C' if next instruction is not aligned
> - TODO: this should check next_pc */
> -if ((val & RVC) && (GETPC()
On Fri, Feb 22, 2019 at 6:31 AM Bastian Koppelmann
wrote:
>
> Hi,
>
> this patchset converts the RISC-V decoder to decodetree in four major steps:
>
> 1) Convert 32-bit instructions to decodetree [Patch 1-15]:
> Many of the gen_* functions are called by the decode functions for 16-bit
>
MTP writes objects in small chunks and at the end gets the
real file size to update the object metadata. If this fails for
any reason, return an INCOMPLETE_TRANSFER to the initiator
Spotted by Coverity: CID 1398651
Signed-off-by: Bandan Das
---
hw/usb/dev-mtp.c | 20 +++-
1
Fix some coverity issues and a few others pointed out by Peter
Bandan Das (2):
usb-mtp: return incomplete transfer on a lstat failure
usb-mtp: fix some usb_mtp_write_data return paths
hw/usb/dev-mtp.c | 38 +-
1 file changed, 25 insertions(+), 13
During a write, free up the "path" before getting more data.
Also, while we at it, remove the confusing usage of d->fd for
storing mkdir status
Spotted by Coverity: CID 1398642
Signed-off-by: Bandan Das
---
hw/usb/dev-mtp.c | 18 ++
1 file changed, 10 insertions(+), 8
Dear All,
I'm submiting this patch to properly check the next instruction alignment and
scheduale compression extenstion enable upon 'MISA' register writes to later
aligned instruction through exporting next instruction 'pc' to riscv cpu state
Thanks,
Ahmed
From: ahmed_magdy
Signed-off-by: ahmed_magdy
---
target/riscv/cpu.h | 2 ++
target/riscv/csr.c | 5 +++--
target/riscv/translate.c | 14 ++
3 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index a269c07..b49bdb3
On 2/22/19 9:36 AM, Peter Maydell wrote:
> On Fri, 22 Feb 2019 at 17:09, Peter Maydell wrote:
>>
>> There is a set of VFP instructions which we implement in
>> disas_vfp_v8_insn() and gate on the ARM_FEATURE_V8 bit.
>> These were all first introduced in v8 for A-profile, but in
>> M-profile they
On 2/22/19 9:09 AM, Peter Maydell wrote:
> Instead of gating the A32/T32 FP16 conversion instructions on
> the ARM_FEATURE_VFP_FP16 flag, switch to our new approach of
> looking at ID register bits. In this case MVFR1 fields FPHP
> and SIMDHP indicate the presence of these insns.
>
> This change
On Fri, Feb 22, 2019 at 03:41:05PM +, Peter Maydell wrote:
> On Fri, 22 Feb 2019 at 15:19, Roman Bolshakov wrote:
> >
> > On Thu, Feb 14, 2019 at 10:28:10AM +, Peter Maydell wrote:
> > > The Cocoa UI should run on the main thread; this is enforced
> > > in OSX Mojave. In order to be able
On 2/22/19 12:45 PM, Alex Bennée wrote:
> @@ -3526,6 +3551,8 @@ static float32 roundAndPackFloat32(flag zSign, int
> zExp, uint32_t zSig,
> case float_round_down:
> roundIncrement = zSign ? 0x7f : 0;
> break;
> +case float_round_to_odd:
> +roundIncrement = zSig
On 2/22/19 12:44 PM, Alex Bennée wrote:
> We've just added f128_to_ui32 and we missed out the f128_to_ui64 tests
> last time.
>
> Signed-off-by: Alex Bennée
> ---
> tests/Makefile.include | 7 ---
> 1 file changed, 4 insertions(+), 3 deletions(-)
Reviewed-by: Richard Henderson
r~
On 2/22/19 12:44 PM, Alex Bennée wrote:
> Needed to test: softfloat: add float128_is_{normal,denormal}
Eh?
>
> Signed-off-by: Alex Bennée
> ---
> tests/fp/fp-test.c | 3 ++-
> tests/fp/wrap.inc.c | 1 +
> 2 files changed, 3 insertions(+), 1 deletion(-)
But the rest of the patch matches
On Thu, Feb 14, 2019 at 10:28:16AM +, Peter Maydell wrote:
> The OSX Mojave release is more picky about enforcing the Cocoa API
> restriction that only the main thread may perform UI calls. To
> accommodate this we need to restructure the Cocoa code:
> * the special OSX main() creates a
From: David Hildenbrand
Needed on s390x, to test for the data class of a number. So it will
gain soon a user.
A number is considered normal if the exponent is neither 0 nor all 1's.
That can be checked by adding 1 to the exponent, and comparing against
>= 2 after dropping an eventual overflow
Needed to test: softfloat: add float128_is_{normal,denormal}
Signed-off-by: Alex Bennée
---
tests/fp/fp-test.c | 3 ++-
tests/fp/wrap.inc.c | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/tests/fp/fp-test.c b/tests/fp/fp-test.c
index 2a35ef601d..4114f346a9 100644
---
Hi,
Here is the current status of fpu/next. I intend to send the PR in
next week as there are bits in it blocking work for s390. This is the
last chance to pipe up with any objections.
The following patches need review
0004/tests fp add wrapping for f128_to_ui32.patch
0005/tests fp enable
From: Eric Blake
Commit 2cade3d wired up new tests, but did not exclude the
new *.out files produced by running the tests.
Signed-off-by: Eric Blake
Reviewed-by: Emilio G. Cota
Signed-off-by: Alex Bennée
---
tests/.gitignore | 1 +
1 file changed, 1 insertion(+)
diff --git
From: David Hildenbrand
Handling it just like float128_to_uint32_round_to_zero, that hopefully
is free of bugs :)
Documentation basically copied from float128_to_uint64
Signed-off-by: David Hildenbrand
Reviewed-by: Richard Henderson
Signed-off-by: Alex Bennée
---
fpu/softfloat.c |
We've just added f128_to_ui32 and we missed out the f128_to_ui64 tests
last time.
Signed-off-by: Alex Bennée
---
tests/Makefile.include | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/tests/Makefile.include b/tests/Makefile.include
index 3741f8f6dd..060f765b0e 100644
From: Richard Henderson
Previously this was only supported for roundAndPackFloat64.
New support in round_canonical, round_to_int, float128_round_to_int,
roundAndPackFloat32, roundAndPackInt32, roundAndPackInt64,
roundAndPackUint64. This does not include any of the floatx80 routines,
as we do
Richard Henderson writes:
> Previously this was only supported for roundAndPackFloat64.
>
> New support in round_canonical, round_to_int, float128_round_to_int,
> roundAndPackFloat32, roundAndPackInt32, roundAndPackInt64,
> roundAndPackUint64. This does not include any of the floatx80
The patch works fine for me too, many thanks!
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1813165
Title:
KVM internal error. Suberror: 1 emulation failure
Status in QEMU:
New
Bug
On 2/22/19 9:13 AM, Mark Cave-Ayland wrote:
> On 22/02/2019 05:59, Richard Henderson wrote:
>
>> This requires VSX, not just Altivec, so Power7 or later.
>>
>> Signed-off-by: Richard Henderson
>> ---
>>
>> At present there are no tunables that can avoid the 64-bit element
>> load/store
On Thu, Feb 14, 2019 at 10:28:15AM +, Peter Maydell wrote:
> When we switch away from our custom event handling, we still want to
> be able to have first go at any events our application receives,
> because in full-screen mode we want to send key events to the guest,
> even if they would be
> From: Cleber Rosa
> Subject: [PATCH v3 15/20] Boot Linux Console Test: add a test for mips64el +
> malta
>
> Similar to the x86_64 + pc test, it boots a Linux kernel on a Malta
> board and verify the serial is working.
>
Reviewed-by: Aleksandar Markovic
> From: Cleber Rosa
> Subject: [PATCH v3 14/20] Boot Linux Console Test: add a test for mips + malta
>
> From: Philippe Mathieu-Daudé
>
> Similar to the x86_64 + pc test, it boots a Linux kernel on a Malta
> board and verify the serial is working. Also, it relies on the serial
> device set by
From: Li Zhijian
XLF_CAN_BE_LOADED_ABOVE_4G is set on vmlinuz shipped by Fedora-28 so that
it's allowed to be loaded below 4 GB address.
timeout is updated to 5 minutes as well since we need more time to load a
large initrd to the guest
CC: Wainer dos Santos Moschetta
CC: Caio Carrara
CC:
From: Caio Carrara
This change adds the simplest possible migration test. Beyond the test
purpose itself it's also useful to exercise the multi virtual machines
capabilities from base avocado qemu test class.
Signed-off-by: Cleber Rosa
Signed-off-by: Caio Carrara
Reviewed-by: Cleber Rosa
This is a simple move of Python code that wraps common QEMU
functionality, and are used by a number of different tests
and scripts.
By treating that code as a real Python module, we can more easily:
* reuse code
* have a proper place for the module's own unittests
* apply a more consistent
Even when the launch of QEMU succeeds, it's useful to have the command
line recorded.
Reviewed-by: Caio Carrara
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
Signed-off-by: Cleber Rosa
Message-Id: <20190202005610.24048-2-cr...@redhat.com>
Signed-off-by: Cleber Rosa
---
The following changes since commit 8eb29f1bf5a974dc4c11d2d1f5e7c7f7a62be116:
Merge remote-tracking branch 'remotes/awilliam/tags/vfio-updates-20190221.0'
into staging (2019-02-22 15:48:04 +)
are available in the Git repository at:
git://github.com/clebergnu/qemu.git
From: Li Zhijian
QEMU have already supported to load up to 4G initrd if the sepcified memory is
enough and XLF_CAN_BE_LOADED_ABOVE_4G is set by guest kernel
linux-3.6 kernel shipped by Fedora-18 cannot support xldflags so that it
cannot support loading more than 2GiB initrd
CC: Wainer dos
From: Caio Carrara
This change adds the possibility to write acceptance tests with multi
virtual machine support. It's done keeping the virtual machines objects
stored in a test attribute (dictionary). This dictionary shouldn't be
accessed directly but through the new method added `get_vm`. This
The Avocado test runner attemps to find its INSTRUMENTED (that is,
Python based tests) in a manner that is as safe as possible to the
user. Different from plain Python unittest, it won't load or
execute test code on an operation such as:
$ avocado list tests/acceptance/
Before version 68.0,
>>> On 2/22/2019 at 9:50 AM, Vitaly Kuznetsov <1813...@bugs.launchpad.net>
>>> wrote:
> I sent a patch which is supposed to fix the issue:
> https://marc.info/?l=kvm=155085391830663=2
>
> it would be great if someone could give it a spin!
>
I've been trying to get down to the bottom of this.
From: Aleksandar Markovic
Add section on MIPS' Boston board in QEMU user documentation.
Signed-off-by: Aleksandar Markovic
---
qemu-doc.texi | 9 +
1 file changed, 9 insertions(+)
diff --git a/qemu-doc.texi b/qemu-doc.texi
index 18e383c..ae3c3f9 100644
--- a/qemu-doc.texi
+++
From: Aleksandar Markovic
Rename function extract_ac_13_12() to extract_ac_15_14().
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 96 +++---
disas/nanomips.h | 2 +-
2 files changed, 49 insertions(+), 49 deletions(-)
diff --git
From: Aleksandar Markovic
Add wrappers for MSA integer max/min instructions.
Signed-off-by: Aleksandar Markovic
---
tests/tcg/mips/include/wrappers_msa.h | 30 ++
1 file changed, 30 insertions(+)
diff --git a/tests/tcg/mips/include/wrappers_msa.h
From: Aleksandar Markovic
Add section on MIPS' Fulong 2E board in QEMU user documentation.
Signed-off-by: Aleksandar Markovic
---
qemu-doc.texi | 13 +
1 file changed, 13 insertions(+)
diff --git a/qemu-doc.texi b/qemu-doc.texi
index 4c5577f..18e383c 100644
--- a/qemu-doc.texi
From: Aleksandar Markovic
Correct comments to handlers of some DSP instructions.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 285 -
1 file changed, 150 insertions(+), 135 deletions(-)
diff --git a/disas/nanomips.cpp
From: Aleksandar Markovic
A collection of misc target/mips fixes and improvements for
February 2019.
v2->v3:
- added a patches on documenting Boston board
- added two patches on testing integer max/min MSA instructions
- removed four patches that had been accepted
- amended patch on
From: Aleksandar Markovic
Move section on MIPS' mipssim pseudo board to the more
appropriate place.
Signed-off-by: Aleksandar Markovic
---
qemu-doc.texi | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/qemu-doc.texi b/qemu-doc.texi
index
On 19.02.19 13:50, Daniel P. Berrangé wrote:
> During creation we write a minimal qcow2 header and then update it with
> extra features. If the updating fails for some reason we might still be
> left with a valid qcow2 image that will be mistakenly used for I/O. We
> cannot delete the image, since
On Thu, Feb 14, 2019 at 10:28:14AM +, Peter Maydell wrote:
> Currently the handleEvent method will directly call the NSApp
> sendEvent method for any events that we want to let OSX deal
> with. When we rearrange the event handling code, the way that
> we say "let OSX have this event" is going
On 19.02.19 13:50, Daniel P. Berrangé wrote:
> If the qcow2 image does not have any encryption method specified in its
> header, the user should not be providing any encryption options when
> opening it. We already detect this if the user had set "encrypt.format"
> but this field is optional so
On 02/22/19 17:03, Auger Eric wrote:
> Hi Shameer,
>
> On 1/28/19 12:05 PM, Shameer Kolothum wrote:
>> This series is an attempt to provide hotplug support to both
>> pc-dimm and nvdimm device memory on ARM virt platform. This is
>> based on Eric's recent works to support PCDIMM/NVDIMM device
Two trivial comments:
On 02/22/19 16:44, Alex Bennée wrote:
> It looks like there was going to be code to check we had some sort of
> alignment so lets replace it with an actual check. This is a bit more
> useful than the enigmatic "failed to read the initial flash content"
> when we attempt to
On Thu, Feb 14, 2019 at 10:28:13AM +, Peter Maydell wrote:
> Move the console/device menu creation code functions
> further up in the source file, next to the code which
> creates the initial menus. We're going to want to
> change the location we call these functions from in
> the next patch.
On Wed, Feb 13, 2019 at 1:11 AM Thomas Huth wrote:
>
> Netduino only depends on the stm32f205 SoC which in turn depends on
> its components.
>
> Signed-off-by: Thomas Huth
Reviewed-by: Alistair Francis
Alistair
> ---
> default-configs/arm-softmmu.mak | 9 +
> hw/arm/Kconfig
Can you please provide your QEMU version, command line, and any QMP/HMP
commands you issued, and the expected/desired effect?
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1815445
Title:
change
On Thu, Feb 14, 2019 at 10:28:12AM +, Peter Maydell wrote:
> Factor out the long code sequence in main() which creates
> the initial set of menus. This will make later patches
> which move initialization code around a bit clearer.
>
> Signed-off-by: Peter Maydell
> ---
> ui/cocoa.m | 78
On Fri, 22 Feb 2019 at 17:09, Peter Maydell wrote:
>
> There is a set of VFP instructions which we implement in
> disas_vfp_v8_insn() and gate on the ARM_FEATURE_V8 bit.
> These were all first introduced in v8 for A-profile, but in
> M-profile they appeared in v7M. Gate them on the MVFR2
> FPMisc
Hi Igor,
On 2/22/19 5:27 PM, Igor Mammedov wrote:
> On Wed, 20 Feb 2019 23:39:46 +0100
> Eric Auger wrote:
>
>> This series aims to bump the 255GB RAM limit in machvirt and to
>> support device memory in general, and especially PCDIMM/NVDIMM.
>>
>> In machvirt versions < 4.0, the initial RAM
On Fri, 22 Feb 2019 at 05:35, Alex Williamson
wrote:
>
> The following changes since commit fc3dbb90f2eb069801bfb4cfe9cbc83cf9c5f4a9:
>
> Merge remote-tracking branch 'remotes/jnsnow/tags/bitmaps-pull-request'
> into staging (2019-02-21 13:09:33 +)
>
> are available in the Git repository
On 1/27/19 8:15 PM, Li Zhijian wrote:
> XLF_CAN_BE_LOADED_ABOVE_4G is set on vmlinuz shipped by Fedora-28 so that
> it's allowed to be loaded below 4 GB address.
>
> timeout is updated to 5 minutes as well since we need more time to load a
> large initrd to the guest
>
> CC: Wainer dos Santos
On Thu, Feb 14, 2019 at 10:28:11AM +, Peter Maydell wrote:
> Currently the switchSurface method takes a DisplaySurface. We want
> to change our DisplayChangeListener's dpy_gfx_switch callback
> to do this work asynchronously on a different thread. The caller
> of the switch callback will free
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