>From dsm_dma_arrea to dsm_dma_area.
Signed-off-by: Wei Yang
---
hw/acpi/nvdimm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c
index e53b2cb681..39af8cdba8 100644
--- a/hw/acpi/nvdimm.c
+++ b/hw/acpi/nvdimm.c
@@ -1260,7 +1260,7 @@ st
The IO range is defined to 4 bytes with NVDIMM_ACPI_IO_LEN, so it is
more proper to use this macro instead of calculating it by sizeof.
Signed-off-by: Wei Yang
---
hw/acpi/nvdimm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c
index e63a1
At the beginning or nvdimm_build_common_dsm(), variable *function* is
already allocated for Arg2.
This patch reuse variable *function* instead of allocating it again.
Signed-off-by: Wei Yang
---
hw/acpi/nvdimm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/acpi/nvdimm.
Here are 4 cleanup patches for nvdimm.
The first three are trivial clean on argument/variable.
The last one move setup place of the FIT table.
Wei Yang (4):
nvdimm: fix typo in nvdimm_build_nvdimm_devices argument
nvdimm: use *function* directly instead of allocating it again
nvdimm: use NV
Currently we initialize nvdimm device like below:
device_set_realized
dc->realize
nvdimm_plug
nvdimm_build_fit_buffer
acpi_build
nvdimm_build_acpi
This shows nvdimm's acpi stuff is prepared in two places:
* device plug stage
* acpi_build stage
Marc-André Lureau writes:
> Hi,
>
> I have those 2 simplification patches left which were part of previous
> series. They are still worthwhile imho.
They are.
> Thanks
>
> Marc-André Lureau (2):
> qga: process_event() simplification
> qmp: common 'id' handling & make QGA conform to QMP spec
Alex Bennée writes:
> Markus Armbruster writes:
>
>> Alex Bennée posted this patch to address an XXX comment in
>> pflash_cfi01_realize() the other day:
>
> If I send you v5 will you include that in your series?
Sure!
BALATON Zoltan writes:
> On Tue, 26 Feb 2019, Markus Armbruster wrote:
>> QOMification left parameter @size unused in pflash_cfi01_register()
>> and pflash_cfi02_register(). Obviously, @size should match
>> @sector_len and @nb_blocs, i.e. size == sector_len * nb_blocs. All
>> callers satisfy th
"Dr. David Alan Gilbert (git)" writes:
> From: "Dr. David Alan Gilbert"
>
> Add a qmp command that can trigger guest announcements.
>
> It uses its own announce-timer instance, and parameters
> passed to it explicitly in the command.
>
> Like most qmp commands, it's in the main thread/bql, so
>
On Wed, Feb 27, 2019 at 03:30:05PM +1100, Suraj Jitindar Singh wrote:
> Add spapr_cap SPAPR_CAP_LARGE_DECREMENTER to be used to control the
> availability of the large decrementer for a guest.
>
> Signed-off-by: Suraj Jitindar Singh
This series looks good now, except for one nit...
> ---
> hw/
On Wed, Feb 27, 2019 at 04:18:59PM +1100, Suraj Jitindar Singh wrote:
> There are currently 3 vulnerability mitigations controlled by the
> spapr-caps mechanism, cap-cfpc, cap-sbbc, and cap-ibs. Enable these
> mitigations by default for the pseries-4.0 machine type.
>
> By now machine firmware sho
On Tue, Feb 26, 2019 at 04:11:06PM -0500, G 3 wrote:
> When I use edid=on, I do see a lot of extra resolutions available in Mac OS
> 9 and Mac OS X, just not the resolution I want to use. Is there some kind
> of rule like the resolution value has to be divisible by a certain number?
qemu doesn't h
On Tue, Feb 26, 2019 at 11:10:06AM -0500, Michael S. Tsirkin wrote:
>On Tue, Feb 26, 2019 at 03:31:59PM +0800, Wei Yang wrote:
>> Leverage __ATTR_RO_MODE to define rev sysfs instead of using open code
>> to define the attribute.
>>
>> Signed-off-by: Wei Yang
>> ---
>> drivers/firmware/qemu_fw_cf
There are currently 3 vulnerability mitigations controlled by the
spapr-caps mechanism, cap-cfpc, cap-sbbc, and cap-ibs. Enable these
mitigations by default for the pseries-4.0 machine type.
By now machine firmware should have been upgraded to allow these
settings.
Note: This means these caps will
On Mon, Feb 18, 2019 at 09:45:13PM +0530, Shivaprasad G Bhat wrote:
>
>
> On 02/18/2019 04:32 AM, David Gibson wrote:
> > On Fri, Feb 15, 2019 at 04:41:09PM +0530, Shivaprasad G Bhat wrote:
> > > Thanks for the comments David. Please find my replies inline..
[snip]
> > > > > +
> > > > > +qemu
Implement support to allow KVM guests to take advantage of the large
decrementer introduced on POWER9 cpus.
To determine if the host can support the requested large decrementer
size, we check it matches that specified in the ibm,dec-bits device-tree
property. We also need to enable it in KVM by se
Prior to POWER9 the decrementer was a 32-bit register which decremented
with each tick of the timebase. From POWER9 onwards the decrementer can
be set to operate in a mode called large decrementer where it acts as a
n-bit decrementing register which is visible as a 64-bit register, that
is the valu
Enable the large decrementer by default for the pseries-4.0 machine type.
It is disabled again by default_caps_with_cpu() for pre-POWER9 cpus
since they don't support the large decrementer.
Signed-off-by: Suraj Jitindar Singh
---
hw/ppc/spapr.c | 3 ++-
hw/ppc/spapr_caps.c | 5 +
2 file
Add spapr_cap SPAPR_CAP_LARGE_DECREMENTER to be used to control the
availability of the large decrementer for a guest.
Signed-off-by: Suraj Jitindar Singh
---
hw/ppc/spapr.c | 2 ++
hw/ppc/spapr_caps.c| 17 +
include/hw/ppc/spapr.h | 5 -
3 files changed, 23 ins
On Tue, Feb 26, 2019 at 07:45:46PM +0100, Philippe Mathieu-Daudé wrote:
>Hi Wei,
>
>On 2/26/19 8:31 AM, Wei Yang wrote:
>> Leverage __ATTR_RO_MODE to define rev sysfs instead of using open code
>> to define the attribute.
>>
>> Signed-off-by: Wei Yang
>> ---
>> drivers/firmware/qemu_fw_cfg.c | 1
On Sat, Feb 23, 2019 at 12:08 AM Thomas Huth wrote:
>
> Netduino only depends on the stm32f205 SoC which in turn depends on
> its components.
>
> Signed-off-by: Thomas Huth
Reviewed-by: Alistair Francis
Alistair
> ---
> default-configs/arm-softmmu.mak | 9 +
> hw/arm/Kconfig
> From: Neo Jia [mailto:c...@nvidia.com]
> Sent: Thursday, February 21, 2019 3:10 PM
>
> On Thu, Feb 21, 2019 at 05:52:53AM +, Tian, Kevin wrote:
> > > From: Kirti Wankhede [mailto:kwankh...@nvidia.com]
> > > Sent: Thursday, February 21, 2019 1:25 PM
> > >
> > > On 2/20/2019 3:52 PM, Dr. David
At present, when seccomp support is compiled out with --disable-seccomp
we fail with an error if the user puts -sandbox on the command line.
That kind of makes sense, but it's a bit strange that we reject a request
to disable sandboxing with "-sandbox off" saying we don't support
sandboxing.
This
On Tue, 26 Feb 2019, Markus Armbruster wrote:
QOMification left parameter @size unused in pflash_cfi01_register()
and pflash_cfi02_register(). Obviously, @size should match
@sector_len and @nb_blocs, i.e. size == sector_len * nb_blocs. All
callers satisfy this.
Remove @nb_blocs and compute it
On 2/26/19 8:34 PM, Markus Armbruster wrote:
> pflash_cfi01.c and pflash_cfi02.c start their identifiers with
> pflash_cfi01_ and pflash_cfi02_ respectively, except for
> CFI_PFLASH01(), TYPE_CFI_PFLASH01, CFI_PFLASH02(), TYPE_CFI_PFLASH02.
> Rename for consistency.
>
> Suggested-by: Philippe Math
On 2/26/19 8:33 PM, Markus Armbruster wrote:
> When a guest tries to abort "write to buffer" (command 0xE8), we print
> "PFLASH: Possible BUG - Write block confirm", then exit(1). Letting
> the guest terminate QEMU is not a good idea. Instead, LOG_UNIMP we
> screwed up, then reset the device.
>
On 2/26/19 8:34 PM, Markus Armbruster wrote:
> Our implementation of "write to buffer" (command 0xE8) is flawed.
> LOG_UNIMP its use, and add some FIXME comments.
>
> Signed-off-by: Markus Armbruster
> ---
> hw/block/pflash_cfi01.c | 13 +
> 1 file changed, 13 insertions(+)
>
> diff
On Tue, 2019-02-26 at 14:59 +1100, David Gibson wrote:
> On Tue, Feb 26, 2019 at 02:05:31PM +1100, Suraj Jitindar Singh wrote:
> > Enable the large decrementer by default on POWER9 cpu models. The
> > default value applied is that provided in the cpu class.
> >
> > Signed-off-by: Suraj Jitindar Si
On Wed, Feb 27, 2019 at 10:28:05AM +1100, Suraj Jitindar Singh wrote:
> On Tue, 2019-02-26 at 14:53 +1100, David Gibson wrote:
> > On Tue, Feb 26, 2019 at 02:05:29PM +1100, Suraj Jitindar Singh wrote:
> > > Prior to POWER9 the decrementer was a 32-bit register which
> > > decremented
> > > with eac
On Wed, Feb 27, 2019 at 10:34:15AM +1100, Suraj Jitindar Singh wrote:
> On Tue, 2019-02-26 at 14:55 +1100, David Gibson wrote:
> > On Tue, Feb 26, 2019 at 02:05:30PM +1100, Suraj Jitindar Singh wrote:
> > > Implement support to allow KVM guests to take advantage of the
> > > large
> > > decrementer
On Mon, Feb 25, 2019 at 10:26:51AM +0100, Greg Kurz wrote:
> On Mon, 25 Feb 2019 10:37:11 +1100
> David Gibson wrote:
>
> > On Fri, Feb 22, 2019 at 10:08:22AM +0100, Greg Kurz wrote:
> > > On Thu, 14 Feb 2019 15:39:13 +1100
> > > David Gibson wrote:
> > >
> > > > The virtio-balloon device's v
On Tue, 2019-02-26 at 14:55 +1100, David Gibson wrote:
> On Tue, Feb 26, 2019 at 02:05:30PM +1100, Suraj Jitindar Singh wrote:
> > Implement support to allow KVM guests to take advantage of the
> > large
> > decrementer introduced on POWER9 cpus.
> >
> > To determine if the host can support the re
On Tue, 2019-02-26 at 14:53 +1100, David Gibson wrote:
> On Tue, Feb 26, 2019 at 02:05:29PM +1100, Suraj Jitindar Singh wrote:
> > Prior to POWER9 the decrementer was a 32-bit register which
> > decremented
> > with each tick of the timebase. From POWER9 onwards the decrementer
> > can
> > be set t
On Tue, Feb 26, 2019 at 04:11:40PM -0300, Murilo Opsfelder Araujo wrote:
> On Tue, Feb 26, 2019 at 02:08:30PM -0300, Murilo Opsfelder Araujo wrote:
> > Hi, Maxiwell.
> >
> > On Tue, Feb 26, 2019 at 11:21:26AM -0300, Maxiwell S. Garcia wrote:
> > > On Tue, Feb 26, 2019 at 02:21:03PM +1100, David Gib
On Tue, Feb 26, 2019 at 11:21:26AM -0300, Maxiwell S. Garcia wrote:
> On Tue, Feb 26, 2019 at 02:21:03PM +1100, David Gibson wrote:
> > On Mon, Feb 25, 2019 at 08:20:09PM -0300, Murilo Opsfelder Araujo wrote:
> > > Hi, Maxiwell.
> > >
> > > On Mon, Feb 25, 2019 at 01:23:25PM -0300, Maxiwell S. Gar
On Tue, Feb 26, 2019 at 05:26:10PM +1100, Suraj Jitindar Singh wrote:
> On Tue, 2019-02-26 at 14:39 +1100, David Gibson wrote:
> > On Tue, Feb 26, 2019 at 02:05:28PM +1100, Suraj Jitindar Singh wrote:
> > > Add spapr_cap SPAPR_CAP_LARGE_DECREMENTER to be used to control the
> > > availability and s
On Tue, 26 Feb 2019, Markus Armbruster wrote:
Machine "sam460ex" maps its flash memory at address 0xFFF0. When
no image is supplied, its size is 1MiB (0x10), and 512KiB of ROM
get mapped on top of its second half. Else, it's the size of the
image rounded up to the next multiple of 64KiB
Hello.
I bisected this problem with fonts (and multicolored vertical stripes) in qemu
git (ppc64-softmmu)
guest@slax:/dev/shm/qemu$ git bisect good
7b8fe477e12b164dda97f79e27b55b805d90384f is the first bad commit
commit 7b8fe477e12b164dda97f79e27b55b805d90384f
Author: Richard Henderson
Date:
Hello,
On Tue, 26 Feb 2019, Alex Bennée wrote:
I'm basing this on email addresses or published employment. Please
confirm if this is correct or you want to be under (None).
Cc: Samuel Thibault
Cc: Aurelien Jarno
Cc: BALATON Zoltan
Signed-off-by: Alex Bennée
---
contrib/gitdm/group-map-acade
On 2019-02-26 16:44, Alex Bennée wrote:
> I'm basing this on email addresses or published employment. Please
> confirm if this is correct or you want to be under (None).
Please list me as (None) instead, QEMU is not related to my paid work.
Aurelien
--
Aurelien Jarno GP
On 26.02.19 20:23, David Hildenbrand wrote:
> On 26.02.19 20:12, Richard Henderson wrote:
>> On 2/26/19 3:38 AM, David Hildenbrand wrote:
>>> +static DisasJumpType op_vgbm(DisasContext *s, DisasOps *o)
>>> +{
>>> +const uint16_t i2 = get_field(s->fields, i2);
>>> +TCGv_i32 ones = tcg_const_
On 26.02.19 12:38, David Hildenbrand wrote:
> This is the first instruction that uses gvec expansion for duplicating
> elements. We will use makros for most gvec calls to simplify translating
> vector numbers into offsets (and to not have to worry about oprsz and
> maxsz).
>
> Signed-off-by: David
When I use edid=on, I do see a lot of extra resolutions available in Mac OS
9 and Mac OS X, just not the resolution I want to use. Is there some kind
of rule like the resolution value has to be divisible by a certain number?
On Tue, Feb 26, 2019 at 1:43 AM Gerd Hoffmann wrote:
> On Mon, Feb 25,
On 2/26/19 5:51 AM, Zhan Adlun wrote:
> Dear Sir:
> Sorry to bother you. I use dirty bitmap to do backup in KVM. I could
> get output from the terminal when I use the command ' virsh
> qemu-monitor-event DOMAIN --timestamp --loop', but when using ' virsh
> qemu-monitor-event DOMAIN --times
In case of NV-DIMM slots, let's add /pmem DT nodes.
Signed-off-by: Eric Auger
---
v6 -> v7
- does the same rework as for fdt_add_memory_node
---
hw/arm/boot.c | 40
1 file changed, 40 insertions(+)
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 4caaf
If NVDIMM option is enabled at machine level, let's allow
NVDIMM plug.
Signed-off-by: Eric Auger
---
hw/arm/virt.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index af2ccaf152..c0f982de02 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@
From: Kwangwoo Lee
Pre-plug and plug handlers are prepared for NVDIMM support.
Signed-off-by: Eric Auger
Signed-off-by: Kwangwoo Lee
---
v7 -> v8:
- s/VIRT_ACPI_IO_BASE/VIRT_NVDIMM_ACPI_IO_BASE
- use const AcpiGenericAddress arm_virt_nvdimm_acpi_dsmio
---
default-configs/arm-softmmu.mak |
From: Kwangwoo Lee
This patch makes IO base and size configurable to create NPIO AML for
ACPI NFIT. Since a different architecture like AArch64 does not use
port-mapped IO, a configurable IO base is required to create correct
mapping of ACPI IO address and size.
Signed-off-by: Kwangwoo Lee
Sign
This patch adds the the memory hot-plug/hot-unplug infrastructure
in machvirt. It is still not enabled as no device memory is allocated.
Signed-off-by: Eric Auger
Signed-off-by: Shameer Kolothum
Signed-off-by: Kwangwoo Lee
Reviewed-by: Igor Mammedov
---
v7 -> v8:
- fix indent issue reported b
As NVDIMM support is looming for ARM and SPAPR, let's
move the acpi_nvdimm_state to the generic machine struct
instead of duplicating the same code in several machines.
nvdimm and nvdimm-persistence becomes generic machine options.
We also add a description for those options.
Signed-off-by: Eric
From: Shameer Kolothum
This patch adds memory nodes corresponding to PC-DIMM regions.
NVDIMM and ACPI_NVDIMM configs are not yet set for ARM so we
don't need to care about NVDIMM at this stage.
Signed-off-by: Shameer Kolothum
Signed-off-by: Eric Auger
---
v8 -> v9:
- removed Igor's R-b
v7 -
This patch implements the machine class kvm_type() callback.
It returns the number of bits requested to implement the whole GPA
range including the RAM and IO regions located beyond.
The returned value in passed though the KVM_CREATE_VM ioctl and
this allows KVM to set the stage2 tables dynamically
We are about to allow the memory map to grow beyond 1TB and
potentially overshoot the VCPU AA64MMFR0.PARANGE.
In aarch64 mode and when highmem is set, let's check the VCPU
PA range is sufficient to address the highest GPA of the memory
map.
Signed-off-by: Eric Auger
---
hw/arm/virt.c | 17 +
The machine RAM attributes will need to be analyzed during the
configure_accelerator() process. especially kvm_type() arm64
machine callback will use them to know how many IPA/GPA bits are
needed to model the whole RAM range. So let's assign those machine
state fields before calling configure_accel
From: Shameer Kolothum
Generate Memory Affinity Structures for PC-DIMM ranges.
Signed-off-by: Shameer Kolothum
Signed-off-by: Eric Auger
Reviewed-by: Igor Mammedov
---
v6 -> v7:
- add Igor's R-b
v5 -> v6:
- fix mingw compil issue
v4 -> v5:
- Align to x86 code and especially
"pc: acpi: r
Now we have the extended memory map (high IO regions beyond the
scalable RAM) and dynamic IPA range support at KVM/ARM level
we can bump the legacy 255GB initial RAM limit. The actual maximum
RAM size now depends on the physical CPU and host kernel, in
accelerated mode. In TCG mode, it depends on t
Up to now the memory map has been static and the high IO region
base has always been 256GiB.
This patch modifies the virt_set_memmap() function, which freezes
the memory map, so that the high IO range base becomes floating,
located after the initial RAM and the device memory.
The function compute
Add the kvm_arm_get_max_vm_ipa_size() helper that returns the
number of bits in the IPA address space supported by KVM.
This capability needs to be known to create the VM with a
specific IPA max size (kvm_type passed along KVM_CREATE_VM ioctl.
Signed-off-by: Eric Auger
---
v6 -> v7:
- s/kvm_arm
In the prospect to introduce an extended memory map supporting more
RAM, let's split the memory map array into two parts:
- the former a15memmap, renamed base_memmap, contains regions below
and including the RAM. MemMapEntries initialized in this array
have a static size and base address.
- ex
From: Shameer Kolothum
We introduce an helper to create a memory node.
Signed-off-by: Eric Auger
Signed-off-by: Shameer Kolothum
Reviewed-by: Igor Mammedov
---
v7 -> v8:
- Added Igor's R-b
v6 -> v7:
- msg error in the caller
- add comment about NUMA ID
---
hw/arm/boot.c | 54 ++
This series aims to bump the 255GB RAM limit in machvirt and to
support device memory in general, and especially PCDIMM/NVDIMM.
In machvirt versions < 4.0, the initial RAM starts at 1GB and can
grow up to 255GB. From 256GB onwards we find IO regions such as the
additional GICv3 RDIST region, high
On ARM, the kvm_type will be resolved by querying the KVMState.
Let's add the MachineState handle to the callback so that we
can retrieve the KVMState handle. in kvm_init, when the callback
is called, the kvm_state variable is not yet set.
Signed-off-by: Eric Auger
Acked-by: David Gibson
[ppc p
In preparation for a split of the memory map into a static
part and a dynamic part floating after the RAM, let's rename the
regions located after the RAM
Signed-off-by: Eric Auger
Reviewed-by: Peter Maydell
Reviewed-by: Igor Mammedov
---
v8:
- added Igor's R-b and fixed "line over 80 character
On 2/26/19 1:59 PM, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> Add a qmp command that can trigger guest announcements.
>
> It uses its own announce-timer instance, and parameters
> passed to it explicitly in the command.
>
> Like most qmp commands, it's in the main
From: Stefan Hajnoczi
Signed-off-by: Stefan Hajnoczi
---
_posts/2019-02-27-new-internships-2019.md | 32 +++
1 file changed, 32 insertions(+)
create mode 100644 _posts/2019-02-27-new-internships-2019.md
diff --git a/_posts/2019-02-27-new-internships-2019.md
b/_posts/2019-
On 2/26/19 6:51 AM, Zhan Adlun wrote:
> Dear Sir:
> Sorry to bother you. I use dirty bitmap to do backup in KVM. I could
> get output from the terminal when I use the command ' virsh
> qemu-monitor-event DOMAIN --timestamp --loop', but when using ' virsh
> qemu-monitor-event DOMAIN --ti
Dear QEMU, KVM, and Jailhouse communities,
QEMU is once again participating in Google Summer of Code and
Outreachy this year! These open source internship programs offer
full-time remote work opportunities for talented new developers
wishing to get involved in our community.
Each intern works with
On 2/22/2019 4:08 AM, Alex Williamson wrote:
> On Wed, 20 Feb 2019 02:53:18 +0530
> Kirti Wankhede wrote:
>
>> - Migration function are implemented for VFIO_DEVICE_TYPE_PCI device.
>> - Added SaveVMHandlers and implemented all basic functions required for live
>> migration.
>> - Added VM sta
On Tuesday, February 26, 2019 10:35:49 AM EST Stefan Hajnoczi wrote:
> Suggested-by: Neil Skrypuch
> Signed-off-by: Stefan Hajnoczi
> ---
> qapi/block-core.json | 5 +
> block/file-posix.c | 14 ++
> 2 files changed, 19 insertions(+)
Tested-by: Neil Skrypuch
Applied this pa
Alex,
On 2/22/2019 3:53 AM, Alex Williamson wrote:
> On Wed, 20 Feb 2019 02:53:16 +0530
> Kirti Wankhede wrote:
>
>> - Defined MIGRATION region type and sub-type.
>> - Used 2 bits to define VFIO device states.
>> Bit 0 => 0/1 => _STOPPED/_RUNNING
>> Bit 1 => 0/1 => _RESUMING/_SAVING
>>
From: "Dr. David Alan Gilbert"
Add a qmp command that can trigger guest announcements.
It uses its own announce-timer instance, and parameters
passed to it explicitly in the command.
Like most qmp commands, it's in the main thread/bql, so
there's no racing with any outstanding timer.
Based on
From: "Dr. David Alan Gilbert"
Add migration parameters that control RARP/GARP announcement timeouts.
Based on earlier patches by myself and
Vladislav Yasevich
Signed-off-by: Dr. David Alan Gilbert
Acked-by: Markus Armbruster
Reviewed-by: Michael S. Tsirkin
---
hmp.c|
From: "Dr. David Alan Gilbert"
Expose the virtio-net self announcement capability and allow
qemu_announce_self() to call it.
These announces are caused by something external (i.e. the
announce-self command); they won't trigger if the migration
counter is triggering announces at the same time.
S
From: "Dr. David Alan Gilbert"
We now expose qemu_announce_self through QMP and HMP. Add a test
with some very basic packet validation (make sure we get a RARP).
Signed-off-by: Vlad Yasevich
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Michael S. Tsirkin
---
tests/Makefile.include
From: "Dr. David Alan Gilbert"
Some network devices have a capability to do self announcements
(ex: virtio-net). Add infrastructure that would allow devices
to expose this ability.
Signed-off-by: Vladislav Yasevich
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Michael S. Tsirkin
---
in
From: "Dr. David Alan Gilbert"
Switch virtio's self announcement to use the AnnounceTimer.
It keeps it's own AnnounceTimer (per device), and starts running it
using a migration post-load and a virtual clock; that way the
announce happens once the guest is actually running.
The timer uses the migr
From: "Dr. David Alan Gilbert"
The 'announce timer' will be used by migration, and explicit
requests for qemu to perform network announces.
Based on the work by Germano Veit Michel
and Vlad Yasevich
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Michael S. Tsirkin
---
include/net/anno
From: "Dr. David Alan Gilbert"
Switch the announcements to using the new announce timer.
Move the code that does it to announce.c rather than savevm
because it really has nothing to do with the actual migration.
Migration starts the announce from bh's and so they're all
in the main thread/bql, a
From: "Dr. David Alan Gilbert"
Add an HMP command to trigger self annocements.
Unlike the QMP command (which takes a set of parameters), the HMP
command reuses the set of parameters used for migration.
Signend-off-by: Vladislav Yasevich
Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Michae
From: "Dr. David Alan Gilbert"
Firstly, it's parameterised, so that you can change the number
of packets and the gap between them; the number can be set to 0
to disable announce completely.
Secondly, you can force an announce by a qmp or hmp command at
any time. This is useful if you need
On 26/02/2019 19:03, Mark Cave-Ayland wrote:
> On 26/02/2019 09:24, Alex Bennée wrote:
>
>>> Presumably the issue here is somehow related to the compiler incorrectly
>>> extending/reducing the shift when the larger type is involved? Also during
>>> my tests
>>> the visual corruption was only pre
Markus Armbruster writes:
> Alex Bennée posted this patch to address an XXX comment in
> pflash_cfi01_realize() the other day:
If I send you v5 will you include that in your series?
>
> Subject: [PATCH v2] hw/block: report when pflash backing file isn't aligned
> Message-Id: <20190215122808.2
Marcel Apfelbaum writes:
> Hi Alex,
>
> On 2/26/19 6:45 PM, Alex Bennée wrote:
>> Marcel works in Red Hat's KVM team.
>
> Actually I left Red Hat some time ago... :)
Fair enough - do you want contributions counted as (None) or against
your new company?
>
> Thanks,
> Marcel
>
>
>> Cc: Marcel A
* Peter Maydell (peter.mayd...@linaro.org) wrote:
> On Fri, 22 Feb 2019 at 14:55, Jason Wang wrote:
> >
> > The following changes since commit 7817ea16c1bb91ba3849e704d5f3e3c5775087bf:
> >
> > Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190221' into
> > staging (2019-02-22 13:04:4
On Tue, Feb 26, 2019 at 08:07:35PM +0100, Marc-André Lureau wrote:
> Hi
>
> On Tue, Feb 26, 2019 at 7:52 PM Michael S. Tsirkin wrote:
> >
> > On Tue, Feb 26, 2019 at 05:38:32PM +0100, Marc-André Lureau wrote:
> > > Hi
> > >
> > > On Thu, Feb 21, 2019 at 5:09 PM Michael S. Tsirkin
> > > wrote:
>
QOMification left parameter @size unused in pflash_cfi01_register()
and pflash_cfi02_register(). Obviously, @size should match
@sector_len and @nb_blocs, i.e. size == sector_len * nb_blocs. All
callers satisfy this.
Remove @nb_blocs and compute it from @size and @sector_len.
Signed-off-by: Mark
QOMification left parameter @qdev unused in pflash_cfi01_register()
and pflash_cfi02_register(). All callers pass NULL. Remove.
Signed-off-by: Markus Armbruster
Reviewed-by: Laszlo Ersek
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
---
hw/arm/collie.c
Machine "ref405ep" maps its flash memory at address 2^32 - image size.
Image size is rounded up to the next multiple of 64KiB. Useless,
because pflash_cfi02_realize() fails with "failed to read the initial
flash content" unless the rounding is a no-op.
If the image size exceeds 0x8 Bytes, we
flash.h's incomplete struct pflash_t is completed both in
pflash_cfi01.c and in pflash_cfi02.c. The complete types are
incompatible. This can hide type errors, such as passing a pflash_t
created with pflash_cfi02_register() to pflash_cfi01_get_memory().
Furthermore, POSIX reserves typedef names
pflash_cfi01.c and pflash_cfi02.c start their identifiers with
pflash_cfi01_ and pflash_cfi02_ respectively, except for
CFI_PFLASH01(), TYPE_CFI_PFLASH01, CFI_PFLASH02(), TYPE_CFI_PFLASH02.
Rename for consistency.
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Markus Armbruster
---
hw/bloc
pflash_cfi02_register() takes a size in bytes, a block size in bytes
and a number of blocks. r2d_init() passes FLASH_SIZE, 16 * KiB,
FLASH_SIZE >> 16. Does not compute: size doesn't match block size *
number of blocks. The latter happens to win. I tried to find
documentation on the physical har
Machine "sam460ex" maps its flash memory at address 0xFFF0. When
no image is supplied, its size is 1MiB (0x10), and 512KiB of ROM
get mapped on top of its second half. Else, it's the size of the
image rounded up to the next multiple of 64KiB.
The rounding is actually useless: pflash_cfi0
Alex Bennée posted this patch to address an XXX comment in
pflash_cfi01_realize() the other day:
Subject: [PATCH v2] hw/block: report when pflash backing file isn't aligned
Message-Id: <20190215122808.22301-1-alex.ben...@linaro.org>
https://lists.nongnu.org/archive/html/qemu-devel/2019-02/msg04166
pflash_cfi01_register() takes a size in bytes, a block size in bytes
and a number of blocks. mips_malta_init() passes BIOS_SIZE, 65536,
FLASH_SIZE >> 16. Actually consistent only because BIOS_SIZE (defined
in include/hw/mips/bios.h as (4 * MiB)) matches FLASH_SIZE (defined
locally as 0x40).
We have two open-coded copies of macro PFLASH_CFI01(). Move the macro
to the header, so we can ditch the copies. Move PFLASH_CFI02() to the
header for symmetry.
We define macros TYPE_PFLASH_CFI01 and TYPE_PFLASH_CFI02 for type name
strings, then mostly use the strings. If the macros are worth
d
When a guest tries to abort "write to buffer" (command 0xE8), we print
"PFLASH: Possible BUG - Write block confirm", then exit(1). Letting
the guest terminate QEMU is not a good idea. Instead, LOG_UNIMP we
screwed up, then reset the device.
Macro PFLASH_BUG() is now unused; delete it.
Suggested
Our implementation of "write to buffer" (command 0xE8) is flawed.
LOG_UNIMP its use, and add some FIXME comments.
Signed-off-by: Markus Armbruster
---
hw/block/pflash_cfi01.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
inde
On 26.02.19 20:12, Richard Henderson wrote:
> On 2/26/19 3:38 AM, David Hildenbrand wrote:
>> +static DisasJumpType op_vgbm(DisasContext *s, DisasOps *o)
>> +{
>> +const uint16_t i2 = get_field(s->fields, i2);
>> +TCGv_i32 ones = tcg_const_i32(-1u);
>> +TCGv_i32 zeroes = tcg_const_i32(0
On 2/26/19 3:38 AM, David Hildenbrand wrote:
> +static DisasJumpType op_vgbm(DisasContext *s, DisasOps *o)
> +{
> +const uint16_t i2 = get_field(s->fields, i2);
> +TCGv_i32 ones = tcg_const_i32(-1u);
> +TCGv_i32 zeroes = tcg_const_i32(0);
> +int i;
> +
> +for (i = 0; i < 16; i++
On Tue, Feb 26, 2019 at 02:08:30PM -0300, Murilo Opsfelder Araujo wrote:
> Hi, Maxiwell.
>
> On Tue, Feb 26, 2019 at 11:21:26AM -0300, Maxiwell S. Garcia wrote:
> > On Tue, Feb 26, 2019 at 02:21:03PM +1100, David Gibson wrote:
> > > On Mon, Feb 25, 2019 at 08:20:09PM -0300, Murilo Opsfelder Araujo
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