On 19/03/2019 03.30, Li Qiang wrote:
> This is useful to write qtest about fw_cfg file entry.
>
> Signed-off-by: Li Qiang
> ---
> tests/libqos/fw_cfg.c | 45 +++
> tests/libqos/fw_cfg.h | 2 ++
> 2 files changed, 47 insertions(+)
>
> diff --git a/tests/l
On 18/04/2019 14.35, Philippe Mathieu-Daudé wrote:
> Hi Thomas,
>
> On 4/18/19 1:10 PM, Thomas Huth wrote:
>> Some machines (like the pxa2xx-based ARM machines) only have a sysbus
>> OHCI controller, but no PCI. With the new Kconfig-style build system,
>> it will soon be possible to create QEMU bi
On 19/04/2019 00.47, John Arbuckle wrote:
> Capstone is not necessary in order to use QEMU. Disable it by default.
> This will save the user the pain of having to figure why QEMU isn't
> building when this library is missing.
>
> Signed-off-by: John Arbuckle
> ---
> configure | 2 +-
> 1 file ch
Some machines (like the pxa2xx-based ARM machines) only have a sysbus
OHCI controller, but no PCI. With the new Kconfig-style build system,
it will soon be possible to create QEMU binaries that only contain
such PCI-less machines. However, the two OHCI controllers, for sysbus
and for PCI, are curre
The ohci_die() function always assumes to be running with a PCI OHCI
controller and calls the PCI-specific functions pci_set_word(). However,
this function might also get called for the sysbus OHCI devices, so it
likely fails in that case. To fix this issue, change the code now, so that
there are t
First patch fixes a problem with ohci_die(), second patch moves PCI code into
a separate file, so that the sysbus OHCI device can also be used without
the dependency on the PCI code.
v2: Split the patch into two patches, one for the ohci_die() fix and one
for the PCI code movement.
Thomas Hut
On 4/18/19 8:00 PM, Thomas Huth wrote:
> Dependencies have been determined by looking at hw/arm/aspeed.c
Looks correct to me.
Reviewed-by: Cédric Le Goater
Thanks Thomas,
C.
>
> Signed-off-by: Thomas Huth
> ---
> default-configs/arm-softmmu.mak | 7 +--
> hw/arm/Kconfig
This patchset introduces a version attribute under sysfs of VFIO Mediated
devices.
This version attribute is used by user space software like libvirt to
determine whether two mdev devices are compatible for live migration
before starting live migration.
Patch 1 defines version attribute as mandat
device version attribute in mdev sysfs is used by user space software
(e.g. libvirt) to query device compatibility for live migration of VFIO
mdev devices. This attribute is mandatory if a mdev device supports live
migration.
It consists of two parts: common part and vendor proprietary part.
commo
This feature implements the version attribute for Intel's vGPU mdev
devices.
version attribute is rw. It is queried by userspace software like libvirt
to check whether two vGPUs are compatible for live migration.
It consists of two parts: common part and vendor proprietary part.
common part: 32 b
Removing this lines makes pa backend work fine again. Much better than
3.x versions due to buffer fixes.
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https://bugs.launchpad.net/bugs/1825452
Title:
Pulse audio backend doesn't wor
thanks for the thorough pointers Laszlo, I did and run in different kind
of issues, and given that I was just having the vars around I really wonder
how it ever worked, perhaps I copied the unified and I forgot, as gentoo
thas provide it:
# du -h /usr/share/edk2-ovmf/*
1.9M/usr/share/edk2-ovmf
Signed-off-by: KONRAD Frederic
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 56139ac..3543035 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1151,6 +1151,7 @@ F: include/hw/timer/sun4v-rtc.h
Leon3
M: Fabien Chouteau
+M: KONRAD Frederic
This adds a little bootloader to the leon3_machine when a ram image is
given through the kernel parameter and no bios are provided:
* The UART transmiter is enabled.
* The TIMER is initialized.
Signed-off-by: KONRAD Frederic
---
hw/sparc/leon3.c | 80 +
This adds the AHB and APB plug and play devices.
They are scanned during the linux boot to discover the various peripheral.
Signed-off-by: KONRAD Frederic
---
hw/misc/Makefile.objs | 2 +
hw/misc/grlib_ahb_apb_pnp.c | 269
hw/sparc/leo
Hi all,
Those are some little fixes for the leon3 machine:
* The first part has already been submitted before and has been reworked
to follow Philippe's advice see:
<1519898536-19027-1-git-send-email-frederic.kon...@adacore.com>
"grlib_apbuart: always enable tx and rx"
* The se
oh well, it turns out to be actually related, it turns out
virt-aa-helper is skipping the code file of ovmf:
2019-04-19 10:06:43.576+: 9272: error : AppArmorGenSecurityLabel:469 :
internal error: cannot load AppArmor profile
'libvirt-34c41008-ab91-483b-959c-81a7a12ae9be'
2019-04-19 10:09:25.
17.04.2019 19:22, Max Reitz wrote:
> On 16.04.19 12:02, Vladimir Sementsov-Ogievskiy wrote:
>> 10.04.2019 23:20, Max Reitz wrote:
>>> What bs->file and bs->backing mean depends on the node. For filter
>>> nodes, both signify a node that will eventually receive all R/W
>>> accesses. For format nod
This change adapts io_readx() to its input access_type. Currently
io_readx() treats any memory access as a read, although it has an
input argument "MMUAccessType access_type". This results in:
1) Calling the tlb_fill() only with MMU_DATA_LOAD
2) Considering only entry->addr_read as the tlb_addr
B
On 4/15/19 12:35 PM, Yuval Shaia wrote:
On Thu, Apr 11, 2019 at 07:02:15PM +0200, Cornelia Huck wrote:
On Thu, 11 Apr 2019 14:01:54 +0300
Yuval Shaia wrote:
Data center backends use more and more RDMA or RoCE devices and more and
more software runs in virtualized environment.
There is a need
17.04.2019 17:48, Eric Blake wrote:
> On 4/17/19 5:09 AM, Vladimir Sementsov-Ogievskiy wrote:
>> This fixes at least one overflow in qcow2_process_discards.
>
> It's worth calling out how long the problem of passing >2G discard
> requests has been present (my reply to the cover letter tracked down
Patchew URL:
https://patchew.org/QEMU/20190419103722.17062-1-shahab.vah...@gmail.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20190419103722.17062-1-shahab.vah...@gmail.com
Subject: [Qemu-devel] [PATCH] cputlb:
This change adapts io_readx() to its input access_type. Currently
io_readx() treats any memory access as a read, although it has an
input argument "MMUAccessType access_type". This results in:
1) Calling the tlb_fill() only with MMU_DATA_LOAD
2) Considering only entry->addr_read as the tlb_addr
B
Hi Kevin,
On Wed, Apr 17, 2019 at 10:04:43AM +0200, Kevin Wolf wrote:
> Am 17.04.2019 um 09:34 hat Stefano Garzarella geschrieben:
> > On Mon, Apr 15, 2019 at 10:04:52AM +0200, Kevin Wolf wrote:
> > >
> > > I think a potential actual use case could be persistent dirty bitmaps
> > > for incrementa
On Apr 19, 2019, at 3:10 AM, Thomas Huth wrote:
On 19/04/2019 00.47, John Arbuckle wrote:
Capstone is not necessary in order to use QEMU. Disable it by
default.
This will save the user the pain of having to figure why QEMU isn't
building when this library is missing.
Signed-off-by: John Ar
From: Lukas Straub
Fixes the following bug: https://bugs.launchpad.net/qemu/+bug/1824622
Signed-off-by: Lukas Straub
---
net/colo-compare.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/net/colo-compare.c b/net/colo-compare.c
index bf10526f05..fcb491121b 100644
--- a/net
v2: [mostly by Eric's review]
01: new
02: point to bug introducing commit in cover letter [Eric]
[but I failed to compile it, to check]
drop s/INT_MAX/BDRV_REQUEST_MAX_BYTES/ chunk
03: - improve wording
- cheating with preallocation=metadata and discards
to make test quick and no
This test checks bug in qcow2_process_discards, fixed by previous
commit.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
tests/qemu-iotests/250 | 72 ++
tests/qemu-iotests/250.out | 21 +++
tests/qemu-iotests/group | 1 +
3 files changed, 94 in
Let's at least trace ignored failure.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/qcow2-refcount.c | 7 ++-
block/trace-events | 3 +++
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/block/qcow2-refcount.c b/block/qcow2-refcount.c
index e0fe322500..60284bcaac 100
This test checks bug in qcow2_process_discards, fixed by previous
commit.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
tests/qemu-iotests/250 | 72 ++
tests/qemu-iotests/250.out | 21 +++
tests/qemu-iotests/group | 1 +
3 files changed, 94 in
This fixes at least one overflow in qcow2_process_discards, which
passes 64bit region length to bdrv_pdiscard which bytes (or sectors in
the past) parameter is int since it's introduction in 0b919fae.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/block/block.h | 4 ++--
block/io.c
Let's at least trace ignored failure.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/qcow2-refcount.c | 7 ++-
block/trace-events | 3 +++
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/block/qcow2-refcount.c b/block/qcow2-refcount.c
index e0fe322500..60284bcaac 100
v3: don't filter mapping info from qemu-img map output, otherwise
it don't show what I try to check [sorry for extra noise in list]
v2: [mostly by Eric's review]
01: new
02: point to bug introducing commit in cover letter [Eric]
[but I failed to compile it, to check]
drop s/INT_MAX/BD
This fixes at least one overflow in qcow2_process_discards, which
passes 64bit region length to bdrv_pdiscard which bytes (or sectors in
the past) parameter is int since it's introduction in 0b919fae.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/block/block.h | 4 ++--
block/io.c
The SCC/ESCC will briefly stop asserting an interrupt when the
transmit FIFO is filled.
This code doesn't model the transmit FIFO/shift register so the
pending transmit interrupt is never deasserted which means that an
edge-triggered interrupt controller will never see the low-to-high
transition i
> On Apr 18, 2019, at 08:13, Philippe Mathieu-Daudé wrote:
>
> On 4/17/19 2:50 AM, Stephen Checkoway wrote:
>> The SCC/ESCC will briefly stop asserting an interrupt when the
>> transmit FIFO is filled.
>>
>> This code doesn't model the transmit FIFO/shift register so the
>> pending transmit i
> -Original Message-
> From: Lukas Straub [mailto:lukasstra...@web.de]
> Sent: Friday, April 19, 2019 9:56 PM
> To: qemu-devel@nongnu.org
> Cc: Zhang, Chen
> Subject: [PATCH] net/colo-compare.c: Fix a crash in COLO Primary.
>
> From: Lukas Straub Fixes the following bug:
> https://bu
Hi all.
Here is a proposal of replacing workaround in mirror, when
we have to move filter node back to block-job blk after
bdrv_replace_node.
Vladimir Sementsov-Ogievskiy (2):
block: introduce pinned blk
blockjob: use blk_new_pinned in block_job_create
include/block/block_int.h | 6 ++
Add stay_at_node fields to BlockBackend and BdrvChild, for the same
behavior as stay_at_node field of BdrvChildRole. It will be used for
block-job blk.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/block/block_int.h | 6 ++
include/sysemu/block-backend.h | 1 +
block.c
child_role job already has .stay_at_node=true, so on bdrv_replace_node
operation these child are unchanged. Make block job blk behave in same
manner, to avoid inconsistent intermediate graph states and workarounds
like in mirror.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/mirror.c | 6
On 4/19/19 3:44 AM, G 3 wrote:
>
> Here is the error message I see when compiling QEMU:
>
> CHK version_gen.h
> make[1]: *** No rule to make target
> `/Users/John/qemu-git/capstone/libcapstone.a'. Stop.
> make: *** [subdir-capstone] Error 2
You are configuring with --static?
I've seen this bef
From: Aleksandar Markovic
Add README for MSA tests. This is just to explain how to run tests even
without Makefile. Makefile will be provided later on.
Signed-off-by: Aleksandar Markovic
---
tests/tcg/mips/user/ase/msa/README | 639 +
1 file changed, 639 ins
From: Aleksandar Markovic
This series contains a number of fixes, improvements and amendments
related to MIPS TCG tests. It is focused on improving existing tests,
even though some small number of tests are added.
Aleksandar Markovic (3):
target/mips: Amend and cleanup MSA TCG tests
tests/tc
From: Aleksandar Markovic
Add tests for MSA bit set instructions. This includes following
instructions:
* BCLR.B - clear bit (bytes)
* BCLR.H - clear bit (halfwords)
* BCLR.W - clear bit (words)
* BCLR.D - clear bit (doublewords)
* BNEG.B - negate bit (bytes)
* BNEG.H - negate bit (h
From: Mateja Marjanovic
MSA instructions MOD_. when dividing by zero,
didn't return the same value when executed on a referent hardware
(FPGA MIPS 64 r6, little endian) and when executed on QEMU, which
is not a real bug, because the result when dividing by zero is
UNPREDICTABLE [1] (page 255, 256
From: Mateja Marjanovic
MSA instructions DIV_. when dividing by zero,
didn't return the same value when executed on a referent hardware
(FPGA MIPS 64 r6, little endian) and when executed on QEMU, which
is not a real bug, because the result when dividing by zero is
UNPREDICTABLE [1] (page 141, 142
> From: Jules Irenge
> Subject: [PATCH v5 2/2] target/mips: realign comments to fix checkpatch
> warnings
Reviewed-by: Aleksandar Markovic
> From: Jules Irenge
> Subject: [PATCH v5 1/2] target/mips: add or remove space to fix checkpatch
> errors
Reviewed-by: Aleksandar Markovic
On Tue, Apr 16, 2019 at 6:23 AM Daniel P. Berrangé wrote:
>
> On Wed, Apr 10, 2019 at 11:10:25PM +, Alistair Francis wrote:
> > If a user specifies a CPU that we don't understand then we want to fall
> > back to a CPU generated from the ISA string.
> >
> > At the moment the generated CPU is as
On Thu, Apr 18, 2019 at 11:23 PM Eduardo Habkost wrote:
>
> Set CPUClass::class_name_format for 12 architectures that simply
> generate a class name using g_strdup_printf(): arm, i386, lm32,
> m68k, mips, moxie, openrisc, riscv, s390x, tricore, unicore32,
> xtensa.
>
> Signed-off-by: Eduardo Habko
Hi,
Here are the required changes to allow qemu to emulate NetBSD/hppa.
Nick Hudson (2):
Implement the pcxl and pcxl2 Fast TLB Insert instructions as used by
NetBSD (and OpenBSD)
Always return EXCP_DMAR for protection id trap as EXCP_DMP is
considered legacy.
target/hppa/insns.deco
On Thu, Apr 18, 2019 at 11:20 PM Eduardo Habkost wrote:
>
> CPUClass::class_by_name is called after the CPU model name and
> options were already split, there's no need to split the string
> again.
>
> Signed-off-by: Eduardo Habkost
Reviewed-by: Alistair Francis
Alistair
> ---
> Cc: Palmer Da
On Tue, Apr 16, 2019 at 1:34 AM Richard Henderson
wrote:
>
> In order to handle TB's that translate to too much code, we
> need to place the control of the length of the translation
> in the hands of the code gen master loop.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alistair Francis
A
Always return EXCP_DMAR for protection id trap as EXCP_DMP is considered legacy.
"In PA-RISC 1.1 (Second Edition) and later revisions, processors must
use traps 26, 27,and 28 which provide equivalent functionality"
Signed-off-by: Nick Hudson
---
target/hppa/mem_helper.c | 3 +--
1 file changed,
Implement the pcxl and pcxl2 Fast TLB Insert instructions as used by NetBSD
(and OpenBSD)
See
https://parisc.wiki.kernel.org/images-parisc/a/a9/Pcxl2_ers.pdf
page 13-9 (195/206)
Signed-off-by: Nick Hudson
---
target/hppa/insns.decode | 3 +++
target/hppa/translate.c | 54 ++
On Thu, Apr 18, 2019 at 11:18 AM Thomas Huth wrote:
>
> Add Kconfig dependencies for the xilinx-zynq-a9 board.
> This patch is based on earlier work by Ákos Kovács (i.e.
> his "hw/arm/Kconfig: Add ARM Kconfig" patch).
>
> Signed-off-by: Thomas Huth
Reviewed-by: Alistair Francis
Alistair
> ---
On Thu, Apr 18, 2019 at 11:23 AM Thomas Huth wrote:
>
> Add Kconfig dependencies for the NRF51 / microbit machine.
>
> Signed-off-by: Thomas Huth
Reviewed-by: Alistair Francis
Alistair
> ---
> default-configs/arm-softmmu.mak | 3 +--
> hw/arm/Kconfig | 6 ++
> hw/arm/Mak
On Thu, Apr 18, 2019 at 11:25 AM Thomas Huth wrote:
>
> Most of the code is directly controlled by the CONFIG_RASPI switch,
> so not much to add here additionally.
>
> Signed-off-by: Thomas Huth
Reviewed-by: Alistair Francis
Alistair
> ---
> default-configs/arm-softmmu.mak | 4 +---
> hw/arm
On Thu, Apr 18, 2019 at 11:15 AM Thomas Huth wrote:
>
> This cleans up most settings in default-configs/aarch64-softmmu.mak.
>
> Signed-off-by: Thomas Huth
Reviewed-by: Alistair Francis
Alistair
> ---
> default-configs/aarch64-softmmu.mak | 4
> hw/arm/Kconfig | 11
Shahab Vahedi writes:
> This change adapts io_readx() to its input access_type. Currently
> io_readx() treats any memory access as a read, although it has an
> input argument "MMUAccessType access_type". This results in:
>
> 1) Calling the tlb_fill() only with MMU_DATA_LOAD
> 2) Considering onl
On Mon, Apr 15, 2019 at 5:46 PM Jonathan Behrens wrote:
>
> For any chip that has a CLINT, we want the frequency of the time register and
> the frequency of the CLINT to match. That frequency,
> SIFIVE_CLINT_TIMEBASE_FREQ (=10MHz) is currently defined in
> hw/riscv/sifive_clint.h and so isn't v
Richard Henderson writes:
> This is a case where we generate more than 64k code for a mere 231
> guest instructions.
I would like to know more! Are these unrolled vector ops or something else?
> This hits some assertions within TCG that we're
> not overflowing the uint16_t that we use for rep
On Tue, Apr 16, 2019 at 02:46:22PM -0400, Dan Streetman wrote:
> From: Dan Streetman
>
> Buglink: https://launchpad.net/bugs/1823458
Cc Maxime.
> This is a race condition between the normal shutdown of a guest
> and the handling of its vhost-user net being externally closed.
> It's explained i
On Tue, Apr 16, 2019 at 02:46:23PM -0400, Dan Streetman wrote:
> From: Dan Streetman
>
> Buglink: https://launchpad.net/bugs/1823458
>
> There is a race condition when using the vhost-user driver, between a guest
> shutdown and the vhost-user interface being closed. This is explained in
> more
On Thu, Apr 11, 2019 at 02:01:56PM +0300, Yuval Shaia wrote:
> diff --git a/include/standard-headers/linux/virtio_ids.h
> b/include/standard-headers/linux/virtio_ids.h
> index 6d5c3b2d4f..bd2c699450 100644
> --- a/include/standard-headers/linux/virtio_ids.h
> +++ b/include/standard-headers/linux/v
Hi,
After upgrading host (Gentoo Linux) a Windows XP guest can't boot anymore.
Some findings while testing:
* XP image boots & works OK on an Intel machine (Gentoo Linux)
** qemu: 3.1.0-r4
** kernel: 5.0.7
** CPU: Intel(R) Core(TM) i7-6500U CPU @ 2.50GHz
* XP image FAILS to boot on an AMD machi
> On Apr 19, 2019, at 2:22 PM, Richard Henderson wrote:
>
> On 4/19/19 3:44 AM, G 3 wrote:
>>
>> Here is the error message I see when compiling QEMU:
>>
>> CHK version_gen.h
>> make[1]: *** No rule to make target
>> `/Users/John/qemu-git/capstone/libcapstone.a'. Stop.
>> make: *** [subdir-ca
On 4/19/19 1:07 PM, Alex Bennée wrote:
>
> Richard Henderson writes:
>
>> This is a case where we generate more than 64k code for a mere 231
>> guest instructions.
>
> I would like to know more! Are these unrolled vector ops or something else?
Yes. E.g.
ld4 { v0.16b - v3.16b }, [x0]
will
** Changed in: qemu
Status: Fix Released => Confirmed
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https://bugs.launchpad.net/bugs/1824053
Title:
Qemu-img convert appears to be stuck on aarch64 host with low
probability
Signed-off-by: Alistair Francis
Reviewed-by: Igor Mammedov
---
hw/riscv/virt.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index fc4c6b306e..5b25f028ad 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -400,7 +400,7 @@ static void r
Signed-off-by: Alistair Francis
---
linux-user/riscv/target_elf.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/linux-user/riscv/target_elf.h b/linux-user/riscv/target_elf.h
index a6716a6aac..9dd65652ee 100644
--- a/linux-user/riscv/target_elf.h
+++ b/linux-user/riscv/target_elf.h
@@ -9,6 +
This series is based on the previous "RISC-V: Allow specifying CPU ISA
via command line" series. This series does not allow custom ISA
extensions instead it just allows other property setting.
This series allows users to specify spec versions, MMU support and PMP
support from the command line.
Th
Signed-off-by: Alistair Francis
---
target/riscv/cpu.c | 49 ++
target/riscv/cpu.h | 8
2 files changed, 57 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index d61bce6d55..8f14fb8a1f 100644
--- a/target/riscv/cpu.c
+++ b/
At the same time deprecate the ISA string CPUs.
It is dobtful anyone specifies the CPUs, but we are keeping them for the
Spike machine (which is about to be depreated) so we may as well just
mark them as deprecated.
Signed-off-by: Alistair Francis
---
include/hw/riscv/virt.h | 4 ++--
qemu-dep
Alistair Francis (8):
target/riscv: Mark privilege level 2 as reserved
target/riscv: Trigger interrupt on MIP update asynchronously
target/riscv: Improve the scause logic
target/riscv: Add the MPV and MTL mstatus bits
target/riscv: Allow setting mstatus virtulisation bits
target/riscv:
Signed-off-by: Alistair Francis
---
target/riscv/cpu_bits.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index 7180fccf54..945aa8dbb8 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -383,7 +383,7 @@
/*
Add the 1.10.1 Hypervisor CSRs and remove the 1.9.1 spec versions.
Signed-off-by: Alistair Francis
---
target/riscv/cpu_bits.h | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index fe7164754b..52c2169977 100644
--- a/
Signed-off-by: Alistair Francis
---
target/riscv/csr.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index f9d8d150e0..e6d68a9956 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -290,7 +290,6 @@ static int
The requirement of holding the iothread_mutex is burdersome when
swapping the background and foreground registers in the Hypervisor
extension. To avoid the requrirement let's set the interrupt
asynchronously.
Signed-off-by: Alistair Francis
---
target/riscv/cpu_helper.c | 33
Signed-off-by: Alistair Francis
---
target/riscv/cpu_bits.h | 18 ++
1 file changed, 18 insertions(+)
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index 52c2169977..a179137bc1 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -382,6 +382,24 @
Signed-off-by: Alistair Francis
---
target/riscv/cpu_bits.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index 945aa8dbb8..fe7164754b 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -316,14 +316,11
No functional change, just making the code easier to read.
Signed-off-by: Alistair Francis
---
target/riscv/cpu_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 582d58aad9..e7d9dd95cc 100644
--- a/target/risc
Add a generic spike machine (not tied to a version) and deprecate the
spike mahines that are tied to a specific version. As we can now specify
the CPU via the command line we no londer need specific versions of the
spike machines.
Signed-off-by: Alistair Francis
Acked-by: Igor Mammedov
---
hw/r
Signed-off-by: Alistair Francis
---
target/riscv/cpu_bits.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index a179137bc1..dc9d53d4be 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -208,6 +208,17 @@
#def
These can now be specified via the command line so we no longer need
these.
Signed-off-by: Alistair Francis
---
qemu-deprecated.texi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/qemu-deprecated.texi b/qemu-deprecated.texi
index 92ce909e50..d01fdf9907 100644
--- a/qemu-deprecated.tex
I can reproduce this problem with qemu.git/matser. It still exists in
qemu.git/matser. I found that when an IO return in
worker threads and want to call aio_notify to wake up main_loop, but it found
that ctx->notify_me is cleared to 0 by main_loop in aio_ctx_check by calling
atomic_and(&ctx->not
** Description changed:
Hi, I found a problem that qemu-img convert appears to be stuck on
aarch64 host with low probability.
The convert command line is "qemu-img convert -f qcow2 -O raw
disk.qcow2 disk.raw ".
The bt is below:
Thread 2 (Thread 0x4b776e50 (LWP 27215)):
Tested with 4.14.105 kernel and the XP guest now boots fine with Qemu 3.1.0-r4.
My _guess_ is that this issue has something to do with changes made to kvm_amd
module.
Cheers,
Antti
On Sat, 20 Apr 2019 07:41:17 +0800
Antti Antinoja wrote:
> Hi,
>
> After upgrading host (Gentoo Linux) a Windo
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