From: Eduardo Habkost
The field is not used anymore, we can remove it.
Signed-off-by: Eduardo Habkost
Message-Id: <20190422210448.2488-4-ehabk...@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé [on mingw64]
Reviewed-by: Thomas Huth
Signed-off-by: Thomas
On 02/05/2019 16:58, Alex Bennée wrote:
> The guest tends to get confused when it receives signals it doesn't
> know about. Given the gprof magic has also set up it's own handler we
> would do well to avoid stomping on it as well.
>
> Signed-off-by: Alex Bennée
> ---
> linux-user/signal.c | 5
When running "make" in a build directory from the pre-Kconfig merge time,
the build process currently fails with:
make: *** No rule to make target `.../default-configs/pci.mak',
needed by `aarch64-softmmu/config-devices.mak'. Stop.
To make sure that this problem at least goes away when the
So far we do not have any test coverage for TCI (the TCG interpreter) yet.
Thus let's add a CI pipeline that runs at least some basic TCG tests with
a TCI build, to make sure that there are no further regressions.
Message-Id: <20190410123550.2362-1-th...@redhat.com>
Signed-off-by: Thomas Huth
From: Eduardo Habkost
qtest_available() will always return 0 on non-POSIX systems.
It's simpler to just not compile the accelerator code on those
systems instead of relying on the AccelClass::available function.
Signed-off-by: Eduardo Habkost
Message-Id:
From: Helge Deller
All major distributions do support libseccomp version >= 2.3.0, so there
is no need to special-case on various architectures any longer.
Signed-off-by: Helge Deller
Message-Id: <20190404183923.ga22...@ls3530.dellerweb.de>
Reviewed-by: Thomas Huth
Acked-by: Eduardo Otubo
Without the -Wno-typedef-redefinition option, clang complains if a typedef
gets redefined in gnu99 mode (since this is officially a C11 feature). This
used to also happen with older versions of GCC, but since we've bumped our
minimum GCC version to 4.8, all versions of GCC that we support do not
On Tue, 9 Apr 2019 11:29:30 +0100
Shameer Kolothum wrote:
> From: Samuel Ortiz
>
> The ACPI Generic Event Device (GED) is a hardware-reduced specific
> device[ACPI v6.1 Section 5.6.9] that handles all platform events,
> including the hotplug ones.This patch generates the AML code that
>
Hi Peter,
the following changes since commit 8482ff2eb3bb95020eb2f370a9b3ea26511e41df:
Merge remote-tracking branch 'remotes/jnsnow/tags/bitmaps-pull-request' into
staging (2019-05-02 12:04:51 +0100)
are available in the Git repository at:
https://gitlab.com/huth/qemu.git
On 5/2/19 5:55 PM, Cornelia Huck wrote:
> Coverity notes that the result of object_dynamic_cast() to
> SCSIDevice is not checked in s390_gen_initial_iplp(); as
> we know that we always have a SCSIDevice in that branch,
> we can instead cast via SCSI_DEVICE directly.
>
> Coverity: CID 1401098
>
Richard Henderson writes:
> Cc: qemu-...@nongnu.org
> Cc: Peter Maydell
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
> ---
> target/arm/helper.h| 2 --
> target/arm/neon_helper.c | 5 -
> target/arm/translate-a64.c | 41
On 02/05/2019 17.55, Cornelia Huck wrote:
> Coverity notes that the result of object_dynamic_cast() to
> SCSIDevice is not checked in s390_gen_initial_iplp(); as
> we know that we always have a SCSIDevice in that branch,
> we can instead cast via SCSI_DEVICE directly.
>
> Coverity: CID 1401098
>
Coverity notes that the result of object_dynamic_cast() to
SCSIDevice is not checked in s390_gen_initial_iplp(); as
we know that we always have a SCSIDevice in that branch,
we can instead cast via SCSI_DEVICE directly.
Coverity: CID 1401098
Fixes: 5d8668f4 ("s390 vfio-ccw: Add bootindex
Richard Henderson writes:
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
> ---
> tcg/aarch64/tcg-target.h | 2 +-
> tcg/aarch64/tcg-target.inc.c | 6 ++
> 2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/tcg/aarch64/tcg-target.h
On Tue, 30 Apr 2019 17:30:09 -0300
Eduardo Habkost wrote:
> On Tue, Apr 30, 2019 at 05:54:49PM +0100, Peter Maydell wrote:
> > On Thu, 25 Apr 2019 at 14:21, Cornelia Huck wrote:
> [...]
> > > -SCSIDevice *sd = (SCSIDevice *)
> > > object_dynamic_cast(OBJECT(dev_st),
> > > -
On Thu, May 02, 2019 at 05:45:30PM +0200, Laurent Vivier wrote:
> Dan,
>
> do you want I take this through the trivial branch queue or do you add
> it into the Sockets branch queue?
I'm fine with you sending it via trivial queue since there's nothing
else pending for the sockets code.
Regards,
Richard Henderson writes:
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
> ---
> accel/tcg/tcg-runtime.h | 5 +++
> tcg/aarch64/tcg-target.h | 1 +
> tcg/i386/tcg-target.h| 1 +
> tcg/tcg-op-gvec.h| 2 ++
> tcg/tcg-opc.h| 1 +
On 5/2/19 7:37 AM, Alex Bennée wrote:
>> +void tcg_gen_gvec_shls(unsigned vece, uint32_t dofs, uint32_t aofs,
>> + TCGv_i32 shift, uint32_t oprsz, uint32_t maxsz)
>> +{
>> +static const TCGOpcode scalar_list[] = { INDEX_op_shls_vec, 0 };
>> +static const TCGOpcode
Dan,
do you want I take this through the trivial branch queue or do you add
it into the Sockets branch queue?
Thanks,
Laurent
On 12/04/2019 14:16, Daniel P. Berrangé wrote:
> In file included from /usr/include/string.h:494,
> from include/qemu/osdep.h:101,
>
On 5/2/19 6:30 AM, Alex Bennée wrote:
>> +static void do_dup_store(TCGType type, uint32_t dofs, uint32_t oprsz,
>> + uint32_t maxsz, TCGv_vec t_vec)
>> +{
>> +uint32_t i = 0;
>> +
>> +switch (type) {
>> +case TCG_TYPE_V256:
>> +/*
>> + * Recall
On 5/2/19 6:26 AM, Alex Bennée wrote:
>> +/* AdvSIMD load/store single structure. */
>> +I3303_LD1R = 0x0d40c000,
>> +
>
> I can't recall where these magic numbers come from again? The (moving)
> section numbers of the ARM ARM?
They come from the A_a version of the ARM ARM.
The
On 5/2/19 2:42 AM, Alex Bennée wrote:
>> +static void tcg_reg_alloc_dup(TCGContext *s, const TCGOp *op)
>> +{
>> +const TCGLifeData arg_life = op->life;
>> +TCGRegSet dup_out_regs, dup_in_regs;
>> +TCGTemp *its, *ots;
>> +TCGType itype, vtype;
>> +unsigned vece;
>> +bool
Richard Henderson writes:
> Remove a function of the same name from target/arm/.
> Use a branchless implementation of abs gleaned from gcc.
>
> Reviewed-by: David Hildenbrand
> Reviewed-by: Philippe Mathieu-Daudé
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
> ---
>
Richard Henderson writes:
> On 5/2/19 3:47 AM, Alex Bennée wrote:
>>> This needs a different set of cleanups. ;-)
>>
>> I guess this is another use case for softmmu support in linux-user where
>> HOST_PAGE != TARGET_PAGE?
>
> Well, yes, but I was thinking more short-term, wherein we do not
On Thu, 2 May 2019 09:22:35 +0200
Ard Biesheuvel wrote:
> On Wed, 1 May 2019 at 13:25, Shameerali Kolothum Thodi
> wrote:
> >
> > Hi Ard,
> >
> > > -Original Message-
> > > From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
> > > Sent: 01 May 2019 12:10
> > > To: Shameerali
Hi Ignor,
On 5/2/2019 3:51 PM, Igor Mammedov wrote:
> Changelog:
> - from v3:
> * reshaffle patch order a bit
> * move out acpi_parse_rsdp_table() hunk to
> "tests: acpi: make pointer to RSDP 64bit"
> where it belongs
> * move
On Tue, 30 Apr 2019 10:18:37 +0100
Peter Maydell wrote:
> On Tue, 30 Apr 2019 at 09:52, Like Xu wrote:
> >
> > If "smp_cpus> FSL_IMX6_NUM_CPUS" fails in *_realize(), there is no need to
> > initialize the CPUs in *_init(). So it could be better to create all cpus
> > after the validity in
On Tue, 30 Apr 2019 15:30:31 +0800
Like Xu wrote:
> On 2019/4/4 22:25, Igor Mammedov wrote:
> > On Fri, 29 Mar 2019 16:48:38 +0800
> > Like Xu wrote:
> >
[...]
>
> The division of responsibility for this case (refactoring
> qemu_init_vcpu) seems to be a poisonous apple.
>
> The
Instead of just asserting print the error that lead to assert first.
While at it move assert into rebuild branch, which removes redundant
check done in case of !rebuild branch is taken (the later is taken
care of by g_assert_no_error).
Signed-off-by: Igor Mammedov
Reviewed-by: Wei Yang
On 5/2/19 3:47 AM, Alex Bennée wrote:
>> This needs a different set of cleanups. ;-)
>
> I guess this is another use case for softmmu support in linux-user where
> HOST_PAGE != TARGET_PAGE?
Well, yes, but I was thinking more short-term, wherein we do not test things
that we know will not work.
Make initial list contain aarch64 and x86_64 targets.
Signed-off-by: Igor Mammedov
Reviewed-by: Philippe Mathieu-Daudé
---
v4:
* fix typo (Wei Yang )
v2:
* fix up error message (Philippe Mathieu-Daudé )
---
tests/data/acpi/rebuild-expected-aml.sh | 23 +++
1 file changed,
For testcase to use UEFI firmware, one needs to provide and specify
firmware and varstore blob names in test_data { uefi_fl1, uefi_fl2 }
fields respectively and RAM start address plus size where to look for
test structure signature. Additionally testcase should specify
bootable cdrom image from
Signed-off-by: Igor Mammedov
Tested-by: Philippe Mathieu-Daudé
---
this patch is ahead fo "tests: acpi: add simple arm/virt testcase"
to keep 'make check' working during bisection and not to pollute
code with binary blobs which are not reviewable.
---
tests/data/acpi/virt/APIC | Bin 0 -> 168
that way it would be possible to test a DSDT pointed by
64bit X_DSDT field in FADT.
PS:
it will allow to enable testing arm/virt board, which sets
only newer X_DSDT field.
Signed-off-by: Igor Mammedov
---
v4:
* dropping Reviewed-bys due to acpi_fetch_table() change
introduced by earlier
adds simple arm/virt test case that starts guest with
bios-tables-test.aarch64.iso.qcow2 boot image which
initializes UefiTestSupport* structure in RAM once
guest is booted.
* see commit: tests: acpi: add acpi_find_rsdp_address_uefi() helper
Signed-off-by: Igor Mammedov
Reviewed-by: Laszlo
By default test cases were run with 'kvm:tcg' accelerators to speed up
tests execution. While it works for x86, were change of accelerator
doesn't affect ACPI tables, the approach doesn't works for ARM usecase
though.
In arm/virt case, KVM mode requires using 'host' cpu model, which
isn't
introduce UEFI specific counterpart to acpi_find_rsdp_address()
that will help to find RSDP address when [OA]VMF is used as
firmware. It requires guest firmware or other guest app to place
1Mb aligned UefiTestSupport structure (defined in this patch)
in RAM with UefiTestSupport::signature_guid set
If RSDP revision is more than 0 fetch table pointed by XSDT
and fallback to legacy RSDT table otherwise.
While at it drop unused acpi_get_xsdt_address().
Signed-off-by: Igor Mammedov
---
PS:
it doesn't affect existing pc/q35 machines as they use RSDP.revision == 0
but it will be used by
once FW provides a pointer to SMBIOS entry point like it does for
RSDP it should be possible to enable this one the same way.
Signed-off-by: Igor Mammedov
Reviewed-by: Laszlo Ersek
---
v3:
- add ref to a uefi-test-tools feature req into comment (Laszlo)
---
tests/bios-tables-test.c | 11
Currently acpi_fetch_table() assumes 32 bit size of table pointer
in ACPI tables. However X_foo variants are 64 bit, prepare
acpi_fetch_table() to handle both by adding an argument
for addr_ptr pointed entry size. Follow up commits will use that
to read XSDT and X_foo entries in ACPI tables.
On Thu, 25 Apr 2019 12:43:24 +0200
Laszlo Ersek wrote:
> Repo: https://github.com/lersek/qemu.git
> Branch:smbios_lp_1821884
> Launchpad: https://bugs.launchpad.net/qemu/+bug/1821884
[...]
>
> Laszlo Ersek (2):
> tests/uefi-test-tools: report the SMBIOS entry point structures
>
In case of UEFI, RSDP doesn't have to be located in lowmem,
it could be placed at any address. Make sure that test won't
break if it is placed above the first 4Gb of address space.
PS:
While at it cleanup some local variables as we don't really
need them.
Signed-off-by: Igor Mammedov
Laurent Desnogues writes:
> Hello,
>
> On Thu, May 2, 2019 at 11:31 AM Alex Bennée wrote:
>>
>> When linux-user/exit was introduced we failed to move the gprof
>> include at the same time. The CI didn't notice because it only builds
>> system emulation. Fix it for those that still find gprof
The guest tends to get confused when it receives signals it doesn't
know about. Given the gprof magic has also set up it's own handler we
would do well to avoid stomping on it as well.
Signed-off-by: Alex Bennée
---
linux-user/signal.c | 5 +
1 file changed, 5 insertions(+)
diff --git
Richard Henderson writes:
> Signed-off-by: Richard Henderson
> ---
> tcg/tcg-op-gvec.h | 7 ++
> tcg/tcg-op.h | 4 +
> tcg/tcg-op-gvec.c | 204 ++
> tcg/tcg-op-vec.c | 54
> 4 files changed, 269 insertions(+)
>
> diff --git
so name would reflect what the function does
Signed-off-by: Igor Mammedov
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Wei Yang
---
v4:
* make it as the first patch in series
---
tests/acpi-utils.h | 2 +-
tests/acpi-utils.c | 2 +-
tests/bios-tables-test.c | 2 +-
This part only supported RXv1 instructions.
Instruction manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf
Signed-off-by: Yoshinori Sato
---
target/rx/translate.c | 2433
target/rx/insns.decode |
boot_sector_init() won't be used by arm/virt board, so move it from
global scope to x86 branch that uses it.
Signed-off-by: Igor Mammedov
Reviewed-by: Philippe Mathieu-Daudé
---
v3:
- fix checkpatch errors triggered by moved old code (ident/space/braces)
---
tests/bios-tables-test.c | 9
I see,
Thanks
> On 2 May 2019, at 17:21, Eric Blake wrote:
>
> On 5/2/19 8:58 AM, Sam Eiderman wrote:
>> This patch series aims to improve the speed of qemu-img rebase.
>>
>> 1. Mainly by removing unnecessary reads when rebasing on the same
>> chain.
>> 2. But also by minimizing the number
Signed-off-by: Yoshinori Sato
---
target/rx/helper.h| 31
target/rx/helper.c| 148
target/rx/op_helper.c | 481 ++
3 files changed, 660 insertions(+)
create mode 100644 target/rx/helper.h
create mode 100644
Signed-off-by: Yoshinori Sato
---
include/disas/dis-asm.h |5 +
target/rx/disas.c | 1481 +++
2 files changed, 1486 insertions(+)
create mode 100644 target/rx/disas.c
diff --git a/include/disas/dis-asm.h b/include/disas/dis-asm.h
index
If FADT has HW_REDUCED_ACPI flag set, do not attempt to fetch
FACS as it's not provided by the board.
Signed-off-by: Igor Mammedov
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Wei Yang
---
tests/bios-tables-test.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff
This module supported only non FIFO type.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
---
include/hw/char/renesas_sci.h | 45 ++
hw/char/renesas_sci.c | 341
rx62n - RX62N cpu.
rxqemu - QEMU virtual target.
Signed-off-by: Yoshinori Sato
---
include/hw/rx/rx.h| 7 ++
include/hw/rx/rx62n.h | 54
hw/rx/rx62n.c | 226 ++
hw/rx/rxqemu.c| 100 ++
This implementation supported only ICUa.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
---
include/hw/intc/rx_icu.h | 49 +++
hw/intc/rx_icu.c | 373
Changelog:
- from v3:
* reshaffle patch order a bit
* move out acpi_parse_rsdp_table() hunk to
"tests: acpi: make pointer to RSDP 64bit"
where it belongs
* move acpi_fetch_rsdp_table(s/uint32_t addr/uint64_t addr/) to
this patch where it belongs from:
Hello.
This patch series is added Renesas RX target emulation.
It was corrected because the correspondence to registerfield was insufficient.
My git repository is bellow.
git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git
Testing binaries bellow.
u-boot
Download -
Signed-off-by: Yoshinori Sato
---
MAINTAINERS | 19 +++
1 file changed, 19 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7dd71e0a2d..e9430b6c0b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -272,6 +272,13 @@ F: include/hw/riscv/
F: linux-user/host/riscv32/
F:
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato
---
include/hw/registerfields.h | 28 +++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/include/hw/registerfields.h b/include/hw/registerfields.h
On Thu, 25 Apr 2019 12:43:25 +0200
Laszlo Ersek wrote:
> On UEFI systems, the SMBIOS entry point (a.k.a. anchor) structures are
> found similarly to the ACPI RSD PTR table(s): by scanning the
> ConfigurationTable array in the EFI system table for well-known GUIDs.
>
> Locate the SMBIOS 2.1
On Fri, 26 Apr 2019 19:11:50 +0200
Laszlo Ersek wrote:
> On 04/25/19 07:34, Igor Mammedov wrote:
> > adds simple arm/virt test case that starts guest with
> > bios-tables-test.aarch64.iso.qcow2 boot image which
> > initializes UefiTestSupport* structure in RAM once
> > guest is booted.
> >
> >
Signed-off-by: Yoshinori Sato
---
target/rx/gdbstub.c | 112
target/rx/monitor.c | 38
target/rx/Makefile.objs | 11 +
3 files changed, 161 insertions(+)
create mode 100644 target/rx/gdbstub.c
create mode 100644
On 05/02/19 16:27, Igor Mammedov wrote:
> On Fri, 26 Apr 2019 19:11:50 +0200
> Laszlo Ersek wrote:
>
>> On 04/25/19 07:34, Igor Mammedov wrote:
>>> adds simple arm/virt test case that starts guest with
>>> bios-tables-test.aarch64.iso.qcow2 boot image which
>>> initializes UefiTestSupport*
Similar to VECTOR SUM ACROSS DOUBLEWORD, however without a loop and
using 128-bit calculations.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 32
2 files changed,
On 5/2/19 8:58 AM, Sam Eiderman wrote:
> This patch series aims to improve the speed of qemu-img rebase.
>
> 1. Mainly by removing unnecessary reads when rebasing on the same
>chain.
> 2. But also by minimizing the number of bdrv_open calls rebase
>requires.
>
When sending a v2 series,
Signed-off-by: Yoshinori Sato
---
configure | 8
default-configs/rx-softmmu.mak | 7 +++
include/sysemu/arch_init.h | 1 +
arch_init.c| 2 ++
hw/Kconfig | 1 +
5 files changed, 19 insertions(+)
create mode 100644
Perform the calculations without a helper. Only 16 bit or 32 bit values
have to be added.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 29 +
2 files changed, 31
renesas_tmr: 8bit timer modules.
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
---
include/hw/timer/renesas_cmt.h | 33
Similar to VECTOR SUM ACROSS DOUBLEWORD.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 29 +
2 files changed, 31 insertions(+)
diff --git a/target/s390x/insn-data.def
Similar to VECTOR SHIFT RIGHT ARITHMETICAL.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 4
target/s390x/translate_vx.inc.c | 17 +
target/s390x/vec_int_helper.c | 6 ++
Mostly courtesy of Richard H.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 34 +
2 files changed, 36 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index
Signed-off-by: Yoshinori Sato
---
target/rx/cpu-qom.h | 52
target/rx/cpu.h | 196 ++
target/rx/cpu.c | 222
3 files changed, 470 insertions(+)
create mode 100644
Let's keep it simple for now and handle 8/16 bit elements via helpers.
Especially for 8/16, we could come up with some bit tricks.
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 52
Fairly easy as only 128-bit handling is required. Simply perform the
subtraction and then subtract the borrow.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 26 ++
2 files
Similar to VECTOR COUNT TRAILING ZEROES.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 19 +++
target/s390x/vec_int_helper.c | 14
Hi Igor,
On 5/2/2019 3:24 PM, Igor Mammedov wrote:
> On Fri, 26 Apr 2019 17:28:10 +0100
> Wei Xu wrote:
>
>> Hi Igor,
>>
>> On 4/26/2019 12:54 PM, Igor Mammedov wrote:
>>> On Fri, 26 Apr 2019 00:51:56 +0800
>>> x00249684 wrote:
>>>
Hi Igor,
+static void test_acpi_virt_tcg(void)
Similar to VECTOR SHIFT LEFT ARITHMETIC. Add s390_vec_sar() similar to
s390_vec_shr().
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 4
target/s390x/translate_vx.inc.c | 17 +
We can reuse the existing 128-bit shift utility function.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 4
target/s390x/translate_vx.inc.c | 20
Again, vector enhancements facility 1 material.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 7 +++
2 files changed, 9 insertions(+)
diff --git a/target/s390x/insn-data.def
On Fri, 26 Apr 2019 17:28:10 +0100
Wei Xu wrote:
> Hi Igor,
>
> On 4/26/2019 12:54 PM, Igor Mammedov wrote:
> > On Fri, 26 Apr 2019 00:51:56 +0800
> > x00249684 wrote:
> >
> >> Hi Igor,
> >>
> >> +static void test_acpi_virt_tcg(void)
> >> +{
> >> +test_data data = {
> >> +.machine
Take care of properly taking the modulo of the count. We might later
want to come back and create a variant of VERLL where the base register
is 0, resulting in an immediate.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 4 +++
Again, part of vector enhancement facility 1. The operation corresponds
to an bitwise equality check.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 7 +++
2 files changed, 9 insertions(+)
diff
We can use all the fancy new vector helpers implemented by Richard.
One important thing to take care of is always to properly mask of
unused bits from the shift count.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 9
Richard Henderson writes:
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
> ---
> tcg/aarch64/tcg-target.h | 2 +-
> tcg/aarch64/tcg-target.opc.h | 2 ++
> tcg/aarch64/tcg-target.inc.c | 42
> 3 files changed, 45 insertions(+), 1
Reuse a gvec helper.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 7 +++
2 files changed, 9 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index
Use the new vector expansion for GVecGen3i.
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 51 +
target/s390x/vec_int_helper.c | 20 +
4 files
Quite some variants to handle. At least handle some 32-bit element
variants via gvec expansion (we could also handle 16/32-bit variants
for ODD and EVEN easily via gvec expansion, but let's keep it simple
for now).
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
Let's return the cc value directly via cpu_env. Unfortunately there
isn't a simple way to calculate the value lazily - one would have to
calculate and store e.g. the population count of the mask and the
result so it can be evaluated in a cc helper.
But as VTM only sets the cc, we can assume the
Part of vector enhancements facility 1, but easy to implement.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate.c| 1 +
target/s390x/translate_vx.inc.c | 7 +++
3 files changed, 10 insertions(+)
diff
Implement it similar to VECTOR COUNT LEADING ZEROS.
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 28
target/s390x/vec_int_helper.c | 14 ++
4
Luckily, we already have gvec helpers for all four cases.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 8
target/s390x/translate_vx.inc.c | 31 +++
2 files changed, 39 insertions(+)
diff --git
We can use tcg_gen_sub2_i64() to do 128-bit subtraction and otherwise
existing gvec helpers.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 17 +
2 files changed, 19 insertions(+)
Yet another set of variants. Implement it similar to VECTOR MULTIPLY AND
ADD *. At least for one variant we have a gvec helper we can reuse.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 16 +
target/s390x/insn-data.def | 14
For 8/16, use the 32 bit variant and properly subtract the added
leading zero bits.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 2 ++
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 31
Easy, we can reuse an existing gvec helper.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 7 +++
2 files changed, 9 insertions(+)
diff --git a/target/s390x/insn-data.def
Inline expansion courtesy of Richard H.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 29 +
2 files changed, 31 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index
Similar to VECTOR LOAD COMPLEMENT.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 13 +
2 files changed, 15 insertions(+)
diff --git a/target/s390x/insn-data.def
Fairly easy to implement, we can make use of the existing CC helpers
cmps64 and cmpu64 - we siply have to sign extend the elements.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 4
target/s390x/translate_vx.inc.c | 20
Handle 32/64-bit elements via gvec expansion and the 8/16 bits via
ool helpers.
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/Makefile.objs | 2 +-
target/s390x/helper.h | 4 +++
target/s390x/insn-data.def | 2 ++
Reviewed-by: Richard Henderson
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 7 +++
2 files changed, 9 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index bc8b84e1c2..4983867a44 100644
---
101 - 200 of 339 matches
Mail list logo
