This tests that a job coroutine always runs in the right iothread after
the AioContext of its main node has changed.
Signed-off-by: Kevin Wolf
---
tests/test-block-iothread.c | 107
1 file changed, 107 insertions(+)
diff --git a/tests/test-block-iothread.c b
Commit 463e0be10 ('blockjob: add AioContext attached callback') tried to
make block jobs robust against AioContext changes of their main node,
but it never made sure that the job coroutine actually runs in the new
thread.
Instead of waking up the job coroutine in whatever thread it ran before,
let
Gotcha, thanks for the tip!
Best regards,
Boxuan Li
On Sat, May 4, 2019 at 1:00 AM Alex Bennée wrote:
>
> LI, BO XUAN writes:
>
> > Hi Alex,
> >
> > Sorry about that, I am still trying to get familiar with the patch
> > submission process. Since my patch has been changed from your last
> revie
Since Linux v3.17, the kernel's Image header includes a field image_size,
which gives the total size of the kernel including unpopulated data
sections such as the BSS). If this is present, then return it from
load_aarch64_image() as the true size of the kernel rather than
just using the size of the
From: Aleksandar Markovic
Fix support for the SIOCATMARK and SIOCGPGRP ioctls for xtensa by
correcting corresponding macro definition.
Values for TARGET_SIOCATMARK and TARGET_SIOCGPGRP are determined by
Linux kernel. Following relevant lines are from kernel source tree:
arch/ia64/include/uapi/a
On Fri, May 3, 2019 at 12:30 PM Stefano Garzarella wrote:
>
> RBD APIs don't allow us to write more than the size set with
> rbd_create() or rbd_resize().
> In order to support growing images (eg. qcow2), we resize the
> image before write operations that exceed the current size.
>
> Signed-off-by
On 5/3/19 6:13 AM, Peter Maydell wrote:
> On Sat, 13 Apr 2019 at 08:07, Richard Henderson
>> This one does do the right thing, but better to clear the bits on write to
>> NSACR. This lets you avoid the change to fp_exception_el, and the missing
>> change to sve_exception_el.
>
> Hi Richard -- I w
On Fri, May 03, 2019 at 11:35:29AM +0100, Daniel P. Berrangé wrote:
> On Fri, May 03, 2019 at 11:28:53AM +0100, Peter Maydell wrote:
> > On Fri, 3 May 2019 at 11:19, Daniel P. Berrangé wrote:
> > > Everything above here is useful to QEMU devs, app devs & end users and
> > > should be made part of
I've submitted a patchset which I think should fix this, but if you
could test that it actually does handle large images correctly that
would be great.
https://patchew.org/QEMU/20190503171347.13747-1-peter.mayd...@linaro.org/
** Changed in: qemu
Status: New => In Progress
--
You receive
On Fri, May 03, 2019 at 10:04:10AM +0100, Alex Bennée wrote:
> Stefan Hajnoczi writes:
> > +Isolation mechanisms
> > +
> > +Several isolation mechanisms are available to realize this architecture of
> > +guest isolation and the principle of least privilege. With the exception
On Fri, 3 May 2019 at 18:13, Peter Maydell wrote:
>
> We currently put the initrd at the smaller of:
> * 128MB into RAM
> * halfway into the RAM
> (with the dtb following it).
>
> However for large kernels this might mean that the kernel
> overlaps the initrd. For some kinds of kernel (self-deco
Antonio has submitted a patchset here:
https://patchew.org/QEMU/20190503082728.16485-1-...@ao2.it/
** Changed in: qemu
Status: New => In Progress
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs
From: Aleksandar Markovic
This is a collection of misc patches for Linux user that I recently
accumulated from variuous sources. All of them originate from problems
observed on mips target. However, these changes actually affect and fix
problems on multiple targets.
v3->v4:
- improved commit
From: Aleksandar Markovic
Fix support for the SIOCATMARK and SIOCGPGRP ioctls for xtensa by
correcting corresponding macro definition.
Values for TARGET_SIOCATMARK and TARGET_SIOCGPGRP are determined by
Linux kernel. Following relevant lines (obtained by grep) are from
the kernel source tree:
a
From: Aleksandar Markovic
Add support for setting the process (or process group) to receive SIGIO
or SIGURG signals when I/O becomes possible or urgent data is available,
using SIOCSPGRP ioctl.
The ioctl numeric values for SIOCSPGRP are platform-dependent and are
determined by following files in
From: Daniel Santos
Sanitize interp_info structure in load_elf_binary() and, for MIPS only,
init its field fp_abi to MIPS_ABI_FP_UNKNOWN. This fixes appearances of
"Unexpected FPU mode" message in some MIPS use cases. Currently, this
bug is a complete stopper for some MIPS binaries.
In load_elf_
From: Neng Chen
Add support for getting and setting extended private flags of a
network device via SIOCSIFPFLAGS and SIOCGIFPFLAGS ioctls.
The ioctl numeric values are platform-independent and determined by
the file include/uapi/linux/sockios.h in Linux kernel source code:
#define SIOCSIFPFLA
From: Neng Chen
Add support for options IPV6_ADD_MEMBERSHIP and IPV6_DROP_MEMPEMBERSHIP
of the syscall setsockopt(). These options control membership in
multicast groups. Their argument is a pointer to a struct ipv6_mreq,
which is in turn defined as:
struct ipv6_mreq {
/* IPv6 multicast addr
On 03/05/19 10:21, Wei Li wrote:
> Got it, thanks Stefan for your clarification!
Hi Wei,
Stefan and I should be posting a patch to add Linux SCSI driver
batching, and an implementation for virtio-scsi.
Paolo
> Wei
>
> On 5/1/19, 9:36 AM, "Stefan Hajnoczi" wrote:
>
> On Mon, Apr 29, 2019
Hi Paolo,
That will be great, I would like to hear more details about the design and
implementation once you get those ready.
Thanks a lot,
Wei
On 5/3/19, 11:05 AM, "Paolo Bonzini" wrote:
On 03/05/19 10:21, Wei Li wrote:
> Got it, thanks Stefan for your clarification!
Hi We
On 5/2/19 7:10 AM, David Hildenbrand wrote:
> Mostly courtesy of Richard H.
>
> Signed-off-by: David Hildenbrand
> ---
> target/s390x/insn-data.def | 2 ++
> target/s390x/translate_vx.inc.c | 34 +
> 2 files changed, 36 insertions(+)
Reviewed-by: Richard He
On Fri, Apr 26, 2019 at 02:32:51PM +, Janakarajan Natarajan wrote:
> On 4/26/19 7:29 AM, Igor Mammedov wrote:
[...]
> >> diff --git a/numa.c b/numa.c
> >> index 3875e1efda..08601366c5 100644
> >> --- a/numa.c
> >> +++ b/numa.c
> > looks like wrong file to put RAMBlock code in. I though that we
On Sat, Apr 27, 2019 at 03:56:42PM +0200, Philippe Mathieu-Daudé wrote:
> When writing a new board, adding device which uses other devices
> (container) or simply refactoring, one can discover the hard way
> his machine misses some devices. In the case of containers, the
> error is not obvious:
>
On 5/2/19 7:34 AM, Yoshinori Sato wrote:
> +static int32_t li(DisasContext *ctx, int sz)
> +{
> +int32_t addr;
> +bfd_byte buf[4];
> +addr = ctx->addr;
> +
> +switch (sz) {
> +case 1:
> +ctx->addr += 1;
> +ctx->dis->read_memory_func(addr, buf, 1, ctx->dis);
> +
On 5/3/19 8:27 AM, Alex Bennée wrote:
>
> Yoshinori Sato writes:
>
>> Some RX peripheral using 8bit and 16bit registers.
>> Added 8bit and 16bit APIs.
>
> Doesn't this mean the build breaks at some point? Features used by other
> patches should be introduced first so the build remains bisectabl
On Mon, Apr 29, 2019 at 09:22:12AM -0600, Alex Williamson wrote:
[...]
> > > What's a good 4.0.1 strategy to resolve this? Re-instate KVM irqchip
> > > as the Q35 default? I can't see that simply switching to current QEMU
> > > handling is a viable option for performance? What about 4.1? We cou
> (ping)
>
> Is there anything else I can do to help to get this merged?
>
> https://patchew.org/QEMU/20190423110034.1260142-1-jakub.jer...@kernkonzept.com/
Hello, Jakub.
I will be reviewing your patch next week, please be patient. In any case,
thanks for
your involving in solving this issue!
On 5/2/19 7:33 AM, Yoshinori Sato wrote:
> +/* conditional branch helper */
> +static void rx_bcnd_main(DisasContext *ctx, int cd, int dst)
> +{
> +DisasCompare dc;
> +TCGLabel *t, *done;
> +
> +switch (cd) {
> +case 0 ... 13:
> +dc.temp = tcg_temp_new();
> +psw_cond
Richard Henderson writes:
> On 4/30/19 9:52 AM, Alex Bennée wrote:
>> I've also moved the existing system memory test and made it multiarch
>> and added the bootstrapping for aarch64 system tests. I would like to
>> add support for Big Endian as well but I didn't want to delay the
>> posting of
Add support for Linux I2C character device for I2C device passthrough
For example:
-chardev linux-i2c,address=0x46,path=/dev/i2c-N,id=i2c-chardev
Signed-off-by: Ernest Esene
---
chardev/Makefile.objs | 1 +
chardev/char-i2c.c | 142 +
charde
Python 2 will reach end of life in January 1 2020. Declare it as
deprecated.
Signed-off-by: Eduardo Habkost
---
configure| 8
qemu-deprecated.texi | 8
2 files changed, 16 insertions(+)
diff --git a/configure b/configure
index 5b183c2e39..50385061ed 100755
--- a/c
On Mon, Apr 29, 2019 at 11:55:56AM -0300, Eduardo Habkost wrote:
> irqchip=split and irqchip=kernel aren't guest ABI compatible, are
> they?
Can you remind me why they aren't?
> --
> Eduardo
On 5/2/19 11:37 PM, Thomas Huth wrote:
> On 02/05/2019 23.56, Eric Blake wrote:
>> On 4/28/19 10:18 AM, Thomas Huth wrote:
>>> QEMU iotest 175 is failing for me when I run it with -raw:
>>>
>>
>>> == creating image with default preallocation ==
>>> Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=
On Fri, May 03, 2019 at 04:00:33PM -0400, Michael S. Tsirkin wrote:
> On Mon, Apr 29, 2019 at 11:55:56AM -0300, Eduardo Habkost wrote:
> > irqchip=split and irqchip=kernel aren't guest ABI compatible, are
> > they?
>
> Can you remind me why they aren't?
We have the code introduced by patch 3/3 fr
On 5/3/19 2:31 PM, Ernest Esene wrote:
> Add support for Linux I2C character device for I2C device passthrough
> For example:
> -chardev linux-i2c,address=0x46,path=/dev/i2c-N,id=i2c-chardev
>
> Signed-off-by: Ernest Esene
> ---
Just an interface review:
> +++ b/qapi/char.json
> @@ -240,6 +240,
On Fri, May 03, 2019 at 04:49:05PM +0100, Daniel P. Berrangé wrote:
> On Fri, May 03, 2019 at 05:46:13PM +0200, Kashyap Chamarthy wrote:
> > When QEMU exposes a VirtIO-RNG device to the guest, that device needs a
> > source of entropy, and that source needs to be "non-blocking", like
> > `/dev/uran
On 5/2/19 11:43 PM, Thomas Huth wrote:
> On 03/05/2019 00.02, Eric Blake wrote:
>> On 4/28/19 10:21 AM, Thomas Huth wrote:
>>> QEMU iotest 221 is failing for me, too, when I run it with -raw:
>>
>> Which filesystem?
>
> ext4 again.
>
> $ stat -f /home/thuth/tmp/qemu-build/tests/qemu-iotests/
>
On Fri, May 03, 2019 at 06:41:43PM +0200, Thomas Huth wrote:
> On 03/05/2019 02.41, Eduardo Habkost wrote:
> > From: Daniel P. Berrangé
> >
> > Unless overridden via an env var or configure arg, QEMU will only look
> > for the 'python' binary in $PATH. This is unhelpful on distros which
> > are o
On 5/3/19 4:38 AM, Alberto Garcia wrote:
> The standard cluster descriptor in L2 table entries has a field to
> store the host cluster offset. When we need to get that offset from an
> entry we use L2E_OFFSET_MASK to ensure that we only use the bits that
> belong to that field.
>
> But while that
On Fri, May 3, 2019, 23:21 Eric Blake wrote:
> On 5/2/19 11:37 PM, Thomas Huth wrote:
> > On 02/05/2019 23.56, Eric Blake wrote:
> >> On 4/28/19 10:18 AM, Thomas Huth wrote:
> >>> QEMU iotest 175 is failing for me when I run it with -raw:
> >>>
> >>
> >>> == creating image with default prealloca
On Fri, May 03, 2019 at 06:00:11PM -0300, Eduardo Habkost wrote:
> On Fri, May 03, 2019 at 06:41:43PM +0200, Thomas Huth wrote:
> > On 03/05/2019 02.41, Eduardo Habkost wrote:
> > > From: Daniel P. Berrangé
> > >
> > > Unless overridden via an env var or configure arg, QEMU will only look
> > > f
On Fri, May 03, 2019 at 03:24:06PM -0500, Eric Blake wrote:
> On 5/3/19 2:31 PM, Ernest Esene wrote:
> > Add support for Linux I2C character device for I2C device passthrough
> > For example:
> > -chardev linux-i2c,address=0x46,path=/dev/i2c-N,id=i2c-chardev
> >
> > Signed-off-by: Ernest Esene
>
On 31.03.19 13:17, Alberto Garcia wrote:
> bdrv_unref_child() does the following things:
>
> - Updates the child->bs->inherits_from pointer.
> - Calls bdrv_detach_child() to remove the BdrvChild from bs->children.
> - Calls bdrv_unref() to unref the child BlockDriverState.
>
> When bdrv_unr
On 5/3/19 10:13 AM, Peter Maydell wrote:
> Since Linux v3.17, the kernel's Image header includes a field image_size,
> which gives the total size of the kernel including unpopulated data
> sections such as the BSS). If this is present, then return it from
> load_aarch64_image() as the true size of
On Thu, May 2, 2019, at 3:06 AM, Peter Maydell wrote:
> On Tue, 30 Apr 2019 at 21:29, Alistair Francis wrote:
> >
> > On Tue, Apr 30, 2019 at 9:02 AM Peter Maydell
> > wrote:
> > > Can you explain the purpose of the reset code? None of the other
> > > v7m boards seem to need to do a manual qemu_
On 5/3/19 2:04 PM, Peter Maydell wrote:
> Currently the dc_zva helper function uses a variable length
> array. In fact we know (as the comment above remarks) that
> the length of this array is bounded because the architecture
> limits the block size and QEMU limits the target page size.
> Use a fix
On Fri, May 3, 2019 at 9:26 PM Alistair wrote:
>
> On Thu, May 2, 2019, at 3:06 AM, Peter Maydell wrote:
> > On Tue, 30 Apr 2019 at 21:29, Alistair Francis wrote:
> > >
> > > On Tue, Apr 30, 2019 at 9:02 AM Peter Maydell
> > > wrote:
> > > > Can you explain the purpose of the reset code? None o
The ignored blocks are not migrated and those ranges are not used.
Signed-off-by: Wei Yang
---
exec.c | 4 +++-
include/exec/ram_addr.h | 2 ++
migration/ram.c | 2 +-
3 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/exec.c b/exec.c
index 86a38d3b3b..97da15
From: David Hildenbrand
Let's add tcg_gen_gvec_3i(), similar to tcg_gen_gvec_2i(), however
without introducing "gen_helper_gvec_3i *fnoi", as it isn't needed
for now.
Reviewed-by: Alex Bennée
Signed-off-by: David Hildenbrand
Message-Id: <20190416185301.25344-2-da...@redhat.com>
Signed-off-by:
Reviewed-by: Alex Bennée
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
tcg/tcg-op-vec.c | 49
1 file changed, 33 insertions(+), 16 deletions(-)
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
index 27f65600c3..cfb18682b1 1
Changes since v2 (stsquad review):
* Split out a tcg/arm/ change to tcg_out_mov.
* Add some additional commentary for tcg_reg_alloc_foo.
Patches missing ack/review:
0006-tcg-arm-Use-tcg_out_mov_reg-in-tcg_out_mov.patch (new)
0010-tcg-Manually-expand-INDEX_op_dup_vec.patch
0011-tcg-Add-tcg_out
This case is similar to INDEX_op_mov_* in that we need to do
different things depending on the current location of the source.
Signed-off-by: Richard Henderson
---
v3: Added some commentary to the tcg_reg_alloc_* functions.
---
tcg/aarch64/tcg-target.inc.c | 9 ++-
tcg/i386/tcg-target.inc.c
PowerPC Altivec does not support direct moves between vector registers
and general registers. So when tcg_out_mov fails, we can use the
backing memory for the temporary to perform the move.
Acked-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 31
The only fixed_reg is cpu_env, and it should not be modified
during any TB. Therefore code that tries to special-case moves
into a fixed_reg is dead. Remove it.
Reviewed-by: Alex Bennée
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 87 +++
Allow the backend to expand dup from memory directly, instead of
forcing the value into a temp first. This is especially important
if integer/vector register moves do not exist.
Note that officially tcg_out_dupm_vec is allowed to fail.
If it did, we could fix this up relatively easily:
VECE ==
Use tcg_can_emit_vec_op instead of just TCG_TARGET_HAS_neg_vec,
so that we check the type and vece for the actual operation.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/tcg/optimize.c b/
The i386 backend already has these functions, and the aarch64 backend
could easily split out one. Nothing is done with these functions yet,
but this will aid register allocation of INDEX_op_dup_vec in a later patch.
Adjust the aarch64 tcg_out_dupi_vec signature to match the new interface.
Review
The gvec expanders perform a modulo on the shift count. If the target
requires alternate behaviour, then it cannot use the generic gvec
expanders anyway, and will have to have its own custom code.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
accel/tcg/tcg-runtime.h | 15
We have a function that takes an additional condition parameter
over the standard backend interface. It already takes care of
eliding no-op moves.
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.inc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/arm/tcg-target
This patch merely changes the interface, aborting on all failures,
of which there are currently none.
Reviewed-by: Alex Bennée
Reviewed-by: David Hildenbrand
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: David Gibson
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 5 +
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.h | 2 +-
tcg/i386/tcg-target.inc.c | 35 +++
2 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index b240633455..618aa520d2 100644
--- a/tcg/i3
Currently stubbed out in all backends that support vectors.
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 6 ++
tcg/i386/tcg-target.inc.c| 7 +++
tcg/tcg.c| 19 ++-
3 files changed, 31 insertions(+), 1 deletion(-)
diff --gi
Allow expansion either via shift by scalar or by replicating
the scalar for shift by vector.
Signed-off-by: Richard Henderson
---
v3: Use a private structure for do_gvec_shifts.
---
tcg/tcg-op-gvec.h | 7 ++
tcg/tcg-op.h | 4 +
tcg/tcg-op-gvec.c | 214 +++
Replace the single opcode in .opc with a null-terminated
array in .opt_opc. We still require that all opcodes be
used with the same .vece.
Validate the contents of this list with CONFIG_DEBUG_TCG.
All tcg_gen_*_vec functions will check any list active
during .fniv expansion. Swap the active list
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.h | 2 +-
tcg/i386/tcg-target.inc.c | 15 +++
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 7445f05885..66f16fbe3c 100644
--- a/tcg/i386/tcg-target.h
+++
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
accel/tcg/tcg-runtime.h | 5 +++
tcg/aarch64/tcg-target.h | 1 +
tcg/i386/tcg-target.h| 1 +
tcg/tcg-op-gvec.h| 2 ++
tcg/tcg-opc.h| 1 +
tcg/tcg.h| 1 +
accel/tcg
At the same time, improve tcg_out_dupi_vec wrt broadcast
from the constant pool.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.inc.c | 57 +--
1 file changed, 43 insertions(+), 14 deletions(-)
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-t
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 36 ++--
1 file changed, 34 insertions(+), 2 deletions(-)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index 4a3cfa778a..e8cf4e4044 100644
--- a/tcg/aarch64/tcg-target.
Fedora 30 got released:
https://fedoramagazine.org/announcing-fedora-30/
Signed-off-by: Philippe Mathieu-Daudé
---
Based-on: <20190408201203.28924-1-marcandre.lur...@redhat.com>
qxl: fix -Waddress-of-packed-member
Based-on: <20190503112654.4393-1-laur...@vivier.eu>
Pull re
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 2 +-
tcg/aarch64/tcg-target.inc.c | 6 ++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index 21d06d928c..e43554c3c7 100644
--- a/
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 2 --
target/arm/neon_helper.c | 5 -
target/arm/translate-a64.c | 41 +-
target/arm/translate.c | 11 +++---
4 files changed, 8 insertions(+), 51 deleti
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.h | 2 +-
tcg/i386/tcg-target.inc.c | 35 +++
2 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 241bf19413..b240633455 100644
--- a/tcg/i3
Signed-off-by: Richard Henderson
---
target/ppc/translate.c | 68 +++---
1 file changed, 24 insertions(+), 44 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 8d08625c33..b5217f632f 100644
--- a/target/ppc/translate.c
+++ b/targe
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 2 +-
tcg/aarch64/tcg-target.opc.h | 2 ++
tcg/aarch64/tcg-target.inc.c | 42
3 files changed, 45 insertions(+), 1 deletion(-)
diff --git a/tcg/aarch64/tcg-target.
Signed-off-by: Richard Henderson
---
target/cris/translate.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/target/cris/translate.c b/target/cris/translate.c
index b005a5c20e..31b40a57f9 100644
--- a/target/cris/translate.c
+++ b/target/cris/translate.c
@@ -1686,18 +1
Remove a function of the same name from target/arm/.
Use a branchless implementation of abs gleaned from gcc.
Reviewed-by: Alex Bennée
Reviewed-by: David Hildenbrand
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tcg-op.h | 5 +
target/arm/translat
Acked-by: Max Filippov
Signed-off-by: Richard Henderson
---
target/xtensa/translate.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index 301c8e3161..b063fa85f2 100644
--- a/target/xtensa/translate.c
+++ b/target
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20190423102145.14812-2-f4...@amsat.org>
Signed-off-by: Richard Henderson
---
target/ppc/translate/spe-impl.inc.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/target/ppc/transla
Reviewed-by: David Hildenbrand
Signed-off-by: Richard Henderson
---
target/s390x/translate.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/target/s390x/translate.c b/target/s390x/translate.c
index d4951836ad..e8e8a79b7d 100644
--- a/target/s390x/translate.c
+++ b/tar
From: Philippe Mathieu-Daudé
Reviewed-by: Bastian Koppelmann
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20190423102145.14812-3-f4...@amsat.org>
Signed-off-by: Richard Henderson
---
target/tricore/translate.c | 27 +--
1 file changed, 5 insertions(+), 22 deletio
The min/max instructions are not available for 64-bit elements.
Fixes: 93f332a50371
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.inc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index 5684
Install optional dependencies of QEMU to get better coverage.
The following components are now enabled:
$ ./configure
...
Multipath support yes
VNC SASL support yes
RDMA support yes
PVRDMA supportyes
libiscsi support yes
seccomp support yes
libpmem support yes
l
On 5/3/19 10:07 AM, Alex Bennée wrote:
> + ldah$sp, $stack_end($gp)!gprelhigh
> + lda $sp, $stack_end($gp)!gprellow
Bah. $sp
As is, this works only because the test case is tiny, and this happens to
evaluate to the middle of the stack allocat
On 03/05/2019 21.37, Eduardo Habkost wrote:
> Python 2 will reach end of life in January 1 2020. Declare it as
> deprecated.
>
> Signed-off-by: Eduardo Habkost
> ---
> configure| 8
> qemu-deprecated.texi | 8
> 2 files changed, 16 insertions(+)
>
> diff --git a/c
On 03/05/2019 19.04, Philippe Mathieu-Daudé wrote:
> On 5/3/19 6:41 PM, Thomas Huth wrote:
>> On 03/05/2019 02.41, Eduardo Habkost wrote:
>>> From: Daniel P. Berrangé
>>>
>>> Unless overridden via an env var or configure arg, QEMU will only look
>>> for the 'python' binary in $PATH. This is unhelp
On 03/05/2019 22.21, Eric Blake wrote:
> On 5/2/19 11:37 PM, Thomas Huth wrote:
>> On 02/05/2019 23.56, Eric Blake wrote:
>>> On 4/28/19 10:18 AM, Thomas Huth wrote:
QEMU iotest 175 is failing for me when I run it with -raw:
== creating image with default preallocation ==
Form
201 - 286 of 286 matches
Mail list logo
