This is a preparation for MADT refactor.
Signed-off-by: Wei Yang
---
hw/acpi/cpu.c| 33 +++--
hw/acpi/piix4.c | 1 -
hw/i386/acpi-build.c | 71
hw/isa/lpc_ich9.c| 1 -
On Sun, May 12, 2019 at 02:13:30PM -0400, Michael S. Tsirkin wrote:
> On Tue, May 07, 2019 at 02:48:38PM +1000, David Gibson wrote:
> > On Fri, Apr 26, 2019 at 04:40:17PM +1000, Alexey Kardashevskiy wrote:
> > >
> > >
> > > On 24/04/2019 14:19, David Gibson wrote:
> > > > Since c2077e2c "pci:
The is_bridge field in PCIDevice acts as a bool, but is declared as an int.
Declare it as a bool for clarity, and change everything that writes it to
use true/false instead of 0/1 to match.
Signed-off-by: David Gibson
Reviewed-by: Greg Kurz
---
hw/pci-bridge/dec.c| 4 ++--
pci_bus_is_root() currently relies on a method in the PCIBusClass.
But it's always known if a PCI bus is a root bus when we create it, so
using a dynamic method is overkill.
This replaces it with an IS_ROOT bit in a new flags field, which is set on
root buses and otherwise clear. As a bonus this
Now MADT is highly depend in architecture and machine type and leaves
duplicated code in different architecture. The series here tries to generalize
it.
MADT contains one main table and several sub tables. These sub tables are
highly related to architecture. Here we introduce one method to make
c2077e2c "pci: Adjust PCI config limit based on bus topology"
introduced checking the availability of extended config space for
PCI-E devices which are in a bus topology that doesn't permit extended
config space access (e.g. under PCI-E to PCI then PCI to PCI-E
bridges).
This caused some problems
These functions have an explicit test for accesses above the device's
config size. But pci_host_config_{read,write}_common() which they're
about to call already have checks against the config space limit and
do the right thing. So, remove the redundant tests.
Signed-off-by: David Gibson
Since c2077e2c "pci: Adjust PCI config limit based on bus topology",
pci_adjust_config_limit() has been used in the config space read and write
paths to only permit access to extended config space on buses which permit
it. Specifically it prevents access on devices below a vanilla-PCI bus via
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