From: Cédric Le Goater
This documents the overall XIVE architecture and the XIVE support for
sPAPR guest machines (pseries).
It also provides documentation on the 'info pic' command.
Signed-off-by: Cédric Le Goater
Message-Id: <20190521082411.24719-1-...@kaod.org>
Reviewed-by: Satheesh
From: Cédric Le Goater
Add a check to make sure that the routine initializing the emulated
IRQ device is called once. We don't have much to test on the XICS
side, so we introduce a 'init' boolean under ICSState.
Signed-off-by: Cédric Le Goater
Message-Id: <20190513084245.25755-13-...@kaod.org>
From: Cédric Le Goater
The way the XICS and the XIVE devices are initialized follows the same
pattern. First, try to connect to the KVM device and if not possible
fallback on the emulated device, unless a kernel_irqchip is required.
The spapr_irq_init_device() routine implements this sequence in
From: Cédric Le Goater
The interrupt mode is chosen by the CAS negotiation process and
activated after a reset to take into account the required changes in
the machine. This brings new constraints on how the associated KVM IRQ
device is initialized.
Currently, each model takes care of the
From: Cédric Le Goater
This extends the KVM XIVE device backend with 'synchronize_state'
methods used to retrieve the state from KVM. The HW state of the
sources, the KVM device and the thread interrupt contexts are
collected for the monitor usage and also migration.
These get operations rely
On Tue, May 14, 2019 at 02:33:41PM +0200, Marc-André Lureau wrote:
> Hi
>
> On Tue, May 14, 2019 at 2:10 PM Philippe Mathieu-Daudé
> wrote:
> >
> > Hi Marc-André,
> >
> > On 5/14/19 12:41 PM, Marc-André Lureau wrote:
> > > That should fix the following warning:
> > >
> > >
From: Cédric Le Goater
When the VM is stopped, the VM state handler stabilizes the XIVE IC
and marks the EQ pages dirty. These are then transferred to destination
before the transfer of the device vmstates starts.
The SpaprXive interrupt controller model captures the XIVE internal
tables, EAT
From: Cédric Le Goater
This introduces a set of helpers when KVM is in use, which create the
KVM XIVE device, initialize the interrupt sources at a KVM level and
connect the interrupt presenters to the vCPU.
They also handle the initialization of the TIMA and the source ESB
memory regions of
From: Anton Blanchard
xxspltib raises a VMX or a VSX exception depending on the register
set it is operating on. We had a check, but it was backwards.
Fixes: f113283525a4 ("target-ppc: add xxspltib instruction")
Signed-off-by: Anton Blanchard
Message-Id: <20190509061713.69490488@kryten>
From: Cédric Le Goater
Recent commits changed the behavior of ics_set_irq_type() to
initialize correctly LSIs at the KVM level. ics_set_irq_type() is also
called by the realize routine of the different devices of the machine
when initial interrupts are claimed, before the ICSState device is
From: Richard Henderson
The gvec expanders take care of masking the shift amount
against the element width.
Signed-off-by: Richard Henderson
Message-Id: <20190518191430.21686-2-richard.hender...@linaro.org>
Signed-off-by: David Gibson
---
target/ppc/helper.h | 12 --
From: Suraj Jitindar Singh
The processor stop status and control register (PSSCR) is used to
control the power saving facilities of the thread. The exit criterion
bit (EC) is used to specify whether the thread should be woken by any
interrupt (EC == 0) or only an interrupt enabled in the LPCR to
From: Cédric Le Goater
XIVE hcalls are all redirected to QEMU as none are on a fast path.
When necessary, QEMU invokes KVM through specific ioctls to perform
host operations. QEMU should have done the necessary checks before
calling KVM and, in case of failure, H_HARDWARE is simply returned.
From: Cédric Le Goater
When the OS configures the EQ page in which to receive event
notifications from the XIVE interrupt controller, the page should be
naturally aligned. Add this check.
Signed-off-by: Cédric Le Goater
Message-Id: <20190508171946.657-2-...@kaod.org>
Reviewed-by: Greg Kurz
From: Greg Kurz
If a machine is started with ic-mode=xive but the guest only knows
about XICS, eg. an RHEL 7.6 guest, the kernel panics. This is
expected but a bit unfortunate since the crash doesn't provide
much information for the end user to guess what's happening.
Detect that during CAS and
From: Cédric Le Goater
All is in place for KVM now. State synchronization and migration will
come next.
Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
Message-Id: <20190513084245.25755-8-...@kaod.org>
Signed-off-by: David Gibson
---
hw/ppc/spapr_irq.c | 9 -
1 file
From: Cédric Le Goater
The activation of the KVM IRQ device depends on the interrupt mode
chosen at CAS time by the machine and some methods used at reset or by
the migration need to be protected.
Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
Signed-off-by: Cédric Le Goater
From: Greg Kurz
Let's suggest to the user how the machine should be configured to allow
the guest to boot successfully.
Suggested-by: Satheesh Rajendran
Signed-off-by: Greg Kurz
Message-Id: <155799221739.527449.14907564571096243745.st...@bahia.lan>
Reviewed-by: Satheesh Rajendran
Tested-by:
From: Cédric Le Goater
If a new interrupt mode is chosen by CAS, the machine generates a
reset to reconfigure. At this point, the connection with the previous
KVM device needs to be closed and a new connection needs to opened
with the KVM device operating the chosen interrupt mode.
New routines
From: Cédric Le Goater
This handler is in charge of stabilizing the flow of event notifications
in the XIVE controller before migrating a guest. This is a requirement
before transferring the guest EQ pages to a destination.
When the VM is stopped, the handler sets the source PQs to PENDING to
From: Suraj Jitindar Singh
The ibm,purr and ibm,spurr device tree properties are used to indicate
that the processor implements the Processor Utilisation of Resources
Register (PURR) and Scaled Processor Utilisation of Resources Registers
(SPURR), respectively. Each property has a single value
When we added support for NVLink2 passthrough devices, we changed the
phb_placement hook to handle the placement of NVLink2 bridges' specific
resources. For compatibility we use a version that doesn't do this
allocation for old machine types.
However, because of the delay between when the patch
From: Anton Blanchard
We were using set_cpu_vsr*() when we should have used get_cpu_vsr*().
Fixes: 8b3b2d75c7c0 ("introduce get_cpu_vsr{l,h}() and set_cpu_vsr{l,h}()
helpers for VSR register access")
Signed-off-by: Anton Blanchard
Message-Id: <20190509104912.6b754dff@kryten>
Reviewed-by: Mark
spapr machine capabilities are supposed to be sent in the migration stream
so that we can sanity check the source and destination have compatible
configuration. Unfortunately, when we added the hpt-max-page-size
capability, we forgot to add it to the migration state. This means that we
can
From: Anton Blanchard
vslv and vsrv are broken on little endian, we append 00 to the
high byte not the low byte. Fix it by using the VsrB() accessor.
Signed-off-by: Anton Blanchard
Message-Id: <20190507004811.29968-6-an...@ozlabs.org>
Signed-off-by: David Gibson
---
target/ppc/int_helper.c |
From: Cédric Le Goater
This will be used to remove the MMIO regions of the POWER9 XIVE
interrupt controller when the sPAPR machine is reseted.
Signed-off-by: Cédric Le Goater
Reviewed-by: David Gibson
Message-Id: <20190513084245.25755-9-...@kaod.org>
Signed-off-by: David Gibson
---
From: Anton Blanchard
A few small optimisations:
In VSX_LOAD_SCALAR_DS() we can don't need to read the VSR via
get_cpu_vsrh().
Split VSX_VECTOR_LOAD_STORE() into two functions. Loads only need to
write the VSRs (set_cpu_vsr*()) and stores only need to read the VSRs
(get_cpu_vsr*())
Thanks to
From: Artyom Tarasenko
AIX 5.1 expects the base year to be 1900. Adjust accordingly.
Signed-off-by: Artyom Tarasenko
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20190505152839.18650-4-phi...@redhat.com>
Signed-off-by: David Gibson
---
hw/ppc/prep.c | 4 +++-
1 file changed, 3
From: Satheesh Rajendran
Instead of LISN i.e "Logical Interrupt Source Number" as per
Xive PAPR document "info pic" prints as LSIN, let's fix it.
Signed-off-by: Satheesh Rajendran
Message-Id: <20190509080750.21999-1-sathn...@linux.vnet.ibm.com>
Reviewed-by: Greg Kurz
Reviewed-by: Cédric Le
From: Cédric Le Goater
This proved to be a useful information when debugging issues with OS
event queues allocated above 64GB.
Signed-off-by: Cédric Le Goater
Message-Id: <20190508171946.657-4-...@kaod.org>
Reviewed-by: Greg Kurz
Signed-off-by: David Gibson
---
hw/intc/spapr_xive.c | 5
From: Anton Blanchard
Fix a typo in xxbrq and xxbrw where we put both results into the lower
doubleword.
Fixes: 8b3b2d75c7c0 ("introduce get_cpu_vsr{l,h}() and set_cpu_vsr{l,h}()
helpers for VSR register access")
Signed-off-by: Anton Blanchard
Message-Id:
From: Boxuan Li
Signed-off-by: Boxuan Li
Message-Id: <20190430172842.27369-1-libox...@connect.hku.hk>
Signed-off-by: David Gibson
---
target/ppc/kvm.c| 2 +-
target/ppc/trace-events | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/kvm.c
From: Cédric Le Goater
The high order bits of the address of the OS event queue is stored in
bits [4-31] of word2 of the XIVE END internal structures and the low
order bits in word3. This structure is using Big Endian ordering and
computing the value requires some simple arithmetic which happens
The following changes since commit a4f667b6714916683408b983cfe0a615a725775f:
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190521-3' into
staging (2019-05-21 16:30:13 +0100)
are available in the Git repository at:
git://github.com/dgibson/qemu.git tags/ppc-for-4.1-20190522
From: Anton Blanchard
Fix a typo in xvxsigdp where we put both results into the lower
doubleword.
Fixes: dd977e4f45cb ("target/ppc: Optimize x[sv]xsigdp using deposit_i64()")
Signed-off-by: Anton Blanchard
Message-Id: <20190507004811.29968-1-an...@ozlabs.org>
Signed-off-by: David Gibson
---
From: Richard Henderson
We cannot use the ppc64le host compiler to build ppc64(be) guest code.
Clean up confusion between cross_cc_powerpc and cross_cc_ppc; make use
of the cflags variable as well.
Signed-off-by: Richard Henderson
Message-Id:
From: Anton Blanchard
A recent cleanup changed the pre zeroing of the result from 64 bit
to 32 bit operations:
-result.u64[i] = 0;
+result.VsrW(i) = 0;
This corrupts the result.
Fixes: 60594fea298d ("target/ppc: remove various HOST_WORDS_BIGENDIAN hacks in
int_helper.c")
From: Philippe Mathieu-Daudé
The MC146818 RTC was incorrectly added to the i82378 chipset in
commit a04ff940974a. In the next commit (506b7ddf8893) the PReP
machine use the i82378.
Since the MC146818 is specific to the PReP machine, move its use
there.
Fixes: a04ff940974a
Signed-off-by:
From: Richard Henderson
About half of the values to which CPU_CFLAGS is set
have multiple space separated arguments.
Signed-off-by: Richard Henderson
Message-Id: <20190501223819.8584-3-richard.hender...@linaro.org>
Signed-off-by: David Gibson
---
configure | 16
1 file
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20190505152839.18650-2-phi...@redhat.com>
Signed-off-by: David Gibson
---
hw/ppc/prep.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index
On 22/05/2019 01:49, David Gibson wrote:
> On Wed, May 22, 2019 at 06:11:12AM +1000, Anton Blanchard wrote:
>> Hi,
>>
>>> I've now had a bit of time to look through this and I believe it is
>>> correct, so:
>>>
>>> Reviewed-by: Mark Cave-Ayland
>>
>> Thanks Mark. David: any chance we could get
** Description changed:
- qemu support is missing from qemu-1:3.1+dfsg-2ubuntu3.1 on Disco. This
- is dispite qemu --help saying its available. SDL support is needed to
- use Packer(https://www.packer.io/) in graphical mode.
+ SDL support is missing from qemu-1:3.1+dfsg-2ubuntu3.1 on Disco. This
Here are qemu options I used...
-machine type=q35,accel=kvm -cpu host --enable-kvm \
-smp cpus=4,cores=4,threads=1 -m 4096 \
-drive file=ctb0319.qcow2,format=qcow2,if=virtio,aio=threads \
-device virtio-vga,virgl=on \
-device qemu-xhci,id=xhci -device usb-mouse,bus=xhci.0 -device
Public bug reported:
I will report something strange thing about host VRAM leakage after
anroid-x86 window rotation when it runs with virt-gpu(+ virgl-renderer)
Please watching below video link.
https://www.youtube.com/watch?v=mJIbGZLWF1s=youtu.be
(orginal video file :
On Tue, May 21, 2019 at 10:24:11AM +0200, Cédric Le Goater wrote:
> This documents the overall XIVE architecture and the XIVE support for
> sPAPR guest machines (pseries).
>
> It also provides documentation on the 'info pic' command.
>
> Signed-off-by: Cédric Le Goater
Applied, thanks.
> ---
On Wed, May 22, 2019 at 06:11:12AM +1000, Anton Blanchard wrote:
> Hi,
>
> > I've now had a bit of time to look through this and I believe it is
> > correct, so:
> >
> > Reviewed-by: Mark Cave-Ayland
>
> Thanks Mark. David: any chance we could get this merged? I can't run a
> recent Ubuntu
On 5/21/19 8:06 PM, John Arbuckle wrote:
> Implement the PowerPC floating point status and control register flag
> Fraction Rounded.
>
> Signed-off-by: John Arbuckle
> ---
> fpu/softfloat.c | 15 ---
> include/fpu/softfloat-types.h | 1 +
> target/ppc/fpu_helper.c
On Tue, May 21, 2019 at 08:36:42PM -0500, Eric Blake wrote:
>On 5/21/19 7:53 PM, Wei Yang wrote:
>> On Tue, May 21, 2019 at 05:28:27PM +0200, Markus Armbruster wrote:
>>> Eric Blake writes:
>>>
On 5/21/19 3:12 AM, Wei Yang wrote:
> All the python script in scripts/qapi is used to
Hesham,
I don't think this is quite right. If I understand correctly, PMP
permissions are only validated on TLB fills, not on all accesses. (Is
anyone able to confirm this?) If so, this function can't just validate the
range of a single access and then place the entire page into the TLB.
However,
On 5/21/19 7:53 PM, Wei Yang wrote:
> On Tue, May 21, 2019 at 05:28:27PM +0200, Markus Armbruster wrote:
>> Eric Blake writes:
>>
>>> On 5/21/19 3:12 AM, Wei Yang wrote:
All the python script in scripts/qapi is used to generate qapi code. Use
wildcard to simplify it.
On 5/21/19 7:51 PM, Aarushi Mehta wrote:
>>> +# @io_uring:Use linux io_uring
>>
>> Missing a '(since 4.1)' tag.
>>
>>> #
>>> # Since: 2.9
>>> ##
>>> { 'enum': 'BlockdevAioOptions',
>>> - 'data': [ 'threads', 'native' ] }
>>> + 'data': [ 'threads', 'native','io_uring' ] }
>>
>> Missing
Public bug reported:
qemu support is missing from qemu-1:3.1+dfsg-2ubuntu3.1 on Disco. This
is dispite qemu --help saying its available. SDL support is needed to
use Packer(https://www.packer.io/) in graphical mode.
# qemu-system-x86_64 -cpu host -smp 2,sockets=2,cores=1,threads=1 -machine
Hi,
On Mon, May 20, 2019 at 09:05:33PM +0200, Corentin Labbe wrote:
> Hello
>
> I am working on adding a maximum set of qemu machine on kernelCI.
That's cool.
> For OMAP, five machine exists and I fail to boot any of them.
Which machines?
> The maximum I can get with omap1_defconfig is
>
On Tue, May 21, 2019 at 05:28:27PM +0200, Markus Armbruster wrote:
>Eric Blake writes:
>
>> On 5/21/19 3:12 AM, Wei Yang wrote:
>>> All the python script in scripts/qapi is used to generate qapi code. Use
>>> wildcard to simplify it.
>>>
>>> Signed-off-by: Wei Yang
>>> ---
>>> Makefile | 8
On Tue, May 21, 2019 at 07:00:12AM -0500, Eric Blake wrote:
>On 5/21/19 3:12 AM, Wei Yang wrote:
>> All the python script in scripts/qapi is used to generate qapi code. Use
>> wildcard to simplify it.
>>
>> Signed-off-by: Wei Yang
>> ---
>> Makefile | 8 +---
>> 1 file changed, 1
On Tue, 2019-05-21 at 19:39 -0500, Eric Blake wrote:
> On 5/21/19 6:52 PM, Aarushi Mehta wrote:
> > Signed-off-by: Aarushi Mehta
>
> Sparse on the details. The subject line says what, but without a
> 'why'
> for how io_uring is different from existing aio options, it's hard to
> see why I'd want
On 5/21/19 6:52 PM, Aarushi Mehta wrote:
> Signed-off-by: Aarushi Mehta
Sparse on the details. The subject line says what, but without a 'why'
for how io_uring is different from existing aio options, it's hard to
see why I'd want to use it. Do you have any benchmark numbers?
> ---
>
Patchew URL:
https://patchew.org/QEMU/20190521235215.31341-1-mehta.aar...@gmail.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [RFC PATCH 0/9] Add support for io_uring
Message-id:
Implement the PowerPC floating point status and control register flag Fraction
Rounded.
Signed-off-by: John Arbuckle
---
fpu/softfloat.c | 15 ---
include/fpu/softfloat-types.h | 1 +
target/ppc/fpu_helper.c | 4
3 files changed, 17 insertions(+), 3
Signed-off-by: Aarushi Mehta
---
include/block/block.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/block/block.h b/include/block/block.h
index 5e2b98b0ee..005f42b133 100644
--- a/include/block/block.h
+++ b/include/block/block.h
@@ -121,6 +121,7 @@ typedef struct HDGeometry {
Signed-off-by: Aarushi Mehta
---
include/block/aio.h | 16 +++-
include/block/raw-aio.h | 15 +++
2 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/include/block/aio.h b/include/block/aio.h
index 0ca25dfec6..2f9acbcd7d 100644
--- a/include/block/aio.h
+++
Signed-off-by: Aarushi Mehta
---
qapi/block-core.json | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/qapi/block-core.json b/qapi/block-core.json
index 7ccbfff9d0..116995810a 100644
--- a/qapi/block-core.json
+++ b/qapi/block-core.json
@@ -2776,11 +2776,12 @@
#
#
This patch series adds supports for the newly developed io_uring Linux AIO
interface. Testing it requires a host kernel with it and the liburing library.
Use the option -drive aio=io_uring to enable it.
Aarushi Mehta (9):
qapi/block-core: add option for io_uring
block/block: add BDRV flag
Signed-off-by: Aarushi Mehta
---
stubs/Makefile.objs | 1 +
stubs/io_uring.c| 32
2 files changed, 33 insertions(+)
create mode 100644 stubs/io_uring.c
diff --git a/stubs/Makefile.objs b/stubs/Makefile.objs
index 269dfa5832..86ceca5c4e 100644
---
Signed-off-by: Aarushi Mehta
---
util/async.c | 32
1 file changed, 32 insertions(+)
diff --git a/util/async.c b/util/async.c
index c10642a385..dd45aff8f5 100644
--- a/util/async.c
+++ b/util/async.c
@@ -277,6 +277,14 @@ aio_ctx_finalize(GSource *source)
Signed-off-by: Aarushi Mehta
---
block/Makefile.objs | 2 +
block/io_uring.c| 385
2 files changed, 387 insertions(+)
create mode 100644 block/io_uring.c
diff --git a/block/Makefile.objs b/block/Makefile.objs
index 7a81892a52..262d413c6d
Signed-off-by: Aarushi Mehta
---
block/file-posix.c | 63 ++
1 file changed, 58 insertions(+), 5 deletions(-)
diff --git a/block/file-posix.c b/block/file-posix.c
index 1cf4ee49eb..41952217a4 100644
--- a/block/file-posix.c
+++ b/block/file-posix.c
@@
Signed-off-by: Aarushi Mehta
---
blockdev.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/blockdev.c b/blockdev.c
index 79fbac8450..b44b9d660d 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -386,6 +386,8 @@ static void extract_common_blockdev_options(QemuOpts *opts,
int
Signed-off-by: Aarushi Mehta
---
configure | 27 +++
1 file changed, 27 insertions(+)
diff --git a/configure b/configure
index d2fc346302..25eb150cb5 100755
--- a/configure
+++ b/configure
@@ -365,6 +365,7 @@ xen=""
xen_ctrl_version=""
xen_pci_passthrough=""
On Tue, May 21, 2019 at 3:47 AM Hesham Almatary
wrote:
>
> The current implementation returns 1 (PMP check success) if the address is in
> range even if the PMP entry is off. This is a bug.
>
> For example, if there is a PMP check in S-Mode which is in range, but its PMP
> entry is off, this will
On Tue, May 21, 2019 at 3:44 AM Hesham Almatary
wrote:
>
> The PMP should be checked when doing a page table walk, and report access
> fault exception if the to-be-read PTE failed the PMP check.
>
> Suggested-by: Jonathan Behrens
> Signed-off-by: Hesham Almatary
> ---
> target/riscv/cpu.h
On Tue, May 21, 2019 at 3:45 AM Hesham Almatary
wrote:
>
> The PMP check should be of the memory access size rather
> than TARGET_PAGE_SIZE.
>
> Signed-off-by: Hesham Almatary
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu_helper.c | 2 +-
> 1 file changed, 1 insertion(+),
On Tue, May 21, 2019 at 3:44 AM Hesham Almatary
wrote:
>
> The current implementation unnecessarily checks for PMP even if MMU
> translation
> failed. This may trigger a wrong PMP access exception instead of
> a page exception.
>
> For example, the very first instruction fetched after the first
On Tue, May 21, 2019 at 09:17:54PM +0200, Jens Freimann wrote:
> On Tue, May 21, 2019 at 06:10:19AM -0400, Michael S. Tsirkin wrote:
> > On Fri, May 17, 2019 at 02:58:16PM +0200, Jens Freimann wrote:
> > > I'm grateful for any remarks or ideas!
> > >
> > > Thanks!
> >
> > Hi Jens!
> > Overall I
We mandate that the source node must be a root node; but there's no reason
I am aware of that it needs to be restricted to such. In some cases, we need
to make sure that there's a medium present, but in the general case we can
allow the backup job itself to do the graph checking.
This patch helps
On 5/21/19 5:54 AM, Vladimir Sementsov-Ogievskiy wrote:
> 21.05.2019 1:38, John Snow wrote:
>>
>>
>> On 5/10/19 5:11 PM, John Snow wrote:
>>> We mandate that the source node must be a root node; but there's no reason
>>> I am aware of that it needs to be restricted to such. In some cases, we
On 05/21/2019 12:32 PM, Cornelia Huck wrote:
On Mon, 20 May 2019 12:29:56 -0400
Eric Farman wrote:
On 5/7/19 11:47 AM, Cornelia Huck wrote:
A vfio-ccw device may provide an async command subregion for
issuing halt/clear subchannel requests. If it is present, use
it for sending halt/clear
On 05/07/2019 11:47 AM, Cornelia Huck wrote:
A vfio-ccw device may provide an async command subregion for
issuing halt/clear subchannel requests. If it is present, use
it for sending halt/clear request to the device; if not, fall
back to emulation (as done today).
Signed-off-by: Cornelia
On 5/21/19 10:17 AM, Markus Armbruster wrote:
> Marc-André, before you invest your time to answer my questions below: my
> bandwidth for non-trivial QAPI features like this one is painfully
> limited. To get your QAPI conditionals in, I had to postpone other QAPI
> projects. I don't regret
On 5/20/19 7:04 PM, Eduardo Habkost wrote:
> On Mon, May 20, 2019 at 05:25:28PM -0400, John Snow wrote:
>>
>>
>> On 5/20/19 12:37 PM, John Snow wrote:
>>>
>>>
>>> On 5/20/19 7:30 AM, Aarushi Mehta wrote:
https://paste.fedoraproject.org/paste/kOPx4jhtUli---TmxSLrlw
running
On 5/21/19 12:32 PM, Cornelia Huck wrote:
> On Mon, 20 May 2019 12:29:56 -0400
> Eric Farman wrote:
>
>> On 5/7/19 11:47 AM, Cornelia Huck wrote:
>>> A vfio-ccw device may provide an async command subregion for
>>> issuing halt/clear subchannel requests. If it is present, use
>>> it for
On 5/21/19 11:27 AM, Peter Maydell wrote:
> On Tue, 21 May 2019 at 16:18, Markus Armbruster wrote:
>> Anyway. What's so special about QEMU that justifies coming up with our
>> own doc syntax? Other than "we made a hash of it, and cleaning it up
>> would be work".
>
> The major problem as
On Tue, May 21, 2019 at 04:06:56PM -0400, John Snow wrote:
> Sphinx, through Pygments, does not like annotated json examples very
> much. In some versions of Sphinx (1.7), it will render the non-json
> portions of code blocks in red, but in newer versions (2.0) it will
> throw an exception and not
On Tue, May 21, 2019 at 04:06:57PM -0400, John Snow wrote:
> The annotated style json we use in QMP documentation is not strict json
> and depending on the version of Sphinx (2.0+) or Pygments installed,
> might cause the build to fail.
>
> Use the new QMP lexer.
>
> Further, some versions of
On Tue, May 21, 2019 at 04:32:35PM -0400, John Snow wrote:
>
>
> On 5/21/19 11:27 AM, Peter Maydell wrote:
> > On Tue, 21 May 2019 at 16:18, Markus Armbruster wrote:
> >> Anyway. What's so special about QEMU that justifies coming up with our
> >> own doc syntax? Other than "we made a hash of
I have an update on this. Eric and myself attempted to zero in the
exact cause. A few things we discovered:
1) It has nothing to do with having a kernel running
2) It has to do with having a chardev that is a server socket. This
test produces command line arguments such as:
-chardev
On 21/05/2019 14:54, Daniel P. Berrangé wrote:
On Tue, May 21, 2019 at 02:52:42PM +0200, Laurent Vivier wrote:
On 21/05/2019 13:52, Daniel P. Berrangé wrote:
On Wed, May 15, 2019 at 10:50:30PM +0200, Paolo Bonzini wrote:
From: Laurent Vivier
Some objects are only needed for system emulation
On Tue, May 21, 2019 at 10:01:15AM +0200, Kevin Wolf wrote:
> Am 20.05.2019 um 21:34 hat Klaus Birkelund geschrieben:
> > On Mon, May 20, 2019 at 03:01:24PM +0200, Kevin Wolf wrote:
> > > Am 17.05.2019 um 10:42 hat Klaus Birkelund Jensen geschrieben:
> > > > Hi,
> > > >
> > > > This series of
Hi,
> I've now had a bit of time to look through this and I believe it is
> correct, so:
>
> Reviewed-by: Mark Cave-Ayland
Thanks Mark. David: any chance we could get this merged? I can't run a
recent Ubuntu image successfully without it. sshd hangs when I try to
ssh into it.
Thanks,
Anton
On Tue, May 21, 2019 at 11:26:35AM +0200, Aleksandar Markovic wrote:
> On May 21, 2019 10:18 AM, "Aleksandar Markovic"
> wrote:
> >
> >
> > On May 21, 2019 1:19 AM, "Philippe Mathieu-Daudé" wrote:
> > >
> > > This tests boot a full VM and check the serial console until
> > > the SSH daemon is
The annotated style json we use in QMP documentation is not strict json
and depending on the version of Sphinx (2.0+) or Pygments installed,
might cause the build to fail.
Use the new QMP lexer.
Further, some versions of Sphinx can not apply custom lexers to "code"
directives and require the use
Sphinx, through Pygments, does not like annotated json examples very
much. In some versions of Sphinx (1.7), it will render the non-json
portions of code blocks in red, but in newer versions (2.0) it will
throw an exception and not highlight the block at all. Though we can
suppress this warning,
QMP isn't json. It turns out Pygments cares about this.
Teach Pygments to go with the annotated flow.
Reported-by: Aarushi Mehta
John Snow (2):
sphinx: add qmp_lexer
docs/bitmaps: use QMP lexer instead of json
docs/conf.py | 4 +--
docs/interop/bitmaps.rst | 54
Drats, okay. I will investigate. (I can always hope for the easy
answer...)
** Changed in: qemu
Assignee: (unassigned) => John Snow (jnsnow)
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On Tue, May 21, 2019 at 06:10:19AM -0400, Michael S. Tsirkin wrote:
On Fri, May 17, 2019 at 02:58:16PM +0200, Jens Freimann wrote:
I'm grateful for any remarks or ideas!
Thanks!
Hi Jens!
Overall I like the patches. Thanks!
Could you please tell us a bit more about other hardware: does this
This tests that concurrent requests are correctly drained before making
graph modifications instead of running into assertions in
bdrv_replace_node().
Signed-off-by: Kevin Wolf
---
tests/qemu-iotests/255| 83 +++
tests/qemu-iotests/255.out| 16 +++
Kevin Wolf (2):
block: Drain source node in bdrv_replace_node()
iotests: Test commit job start with concurrent I/O
block.c | 7 +--
tests/qemu-iotests/255| 83 +++
tests/qemu-iotests/255.out| 16 +++
Instead of just asserting that no requests are in flight in
bdrv_replace_node(), which is a requirement that most callers ignore, we
can just drain the source node right there. This fixes at least starting
a commit job while I/O is active on the backing chain, but probably
other callers, too.
From: Daniel P. Berrangé
Update x86 CPU model guidance to recommend that the md-clear feature is
manually enabled with all Intel CPU models, when supported by the host
microcode.
Signed-off-by: Daniel P. Berrangé
Message-Id: <20190515141011.5315-3-berra...@redhat.com>
Signed-off-by: Eduardo
Currently we have a vague plan that we should migrate our
documentation away from Texinfo to using Sphinx, plus some isolated
bits of documentation already in .rst format. This email is an attempt
to sketch out a transition plan for getting us from where we are today
to where (I think) we want to
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