Re: [Qemu-devel] [RISU PATCH v3 10/18] x86.risu: add MMX instructions

2019-07-19 Thread Richard Henderson
On 7/11/19 3:32 PM, Jan Bobek wrote: > Add an x86 configuration file with all MMX instructions. > > Signed-off-by: Jan Bobek > --- > x86.risu | 321 +++ > 1 file changed, 321 insertions(+) > create mode 100644 x86.risu Reviewed-by: Richard

Re: [Qemu-devel] [PATCH] migration: equation is more proper than and to check LOADVM_QUIT

2019-07-19 Thread Wei Yang
On Fri, Jul 19, 2019 at 07:41:28PM +0100, Dr. David Alan Gilbert wrote: >* Wei Yang (richardw.y...@linux.intel.com) wrote: >> LOADVM_QUIT allows a command to quit all layers of nested loadvm loops, >> while current return value check is not that proper even it works now. >> >> Current return

Re: [Qemu-devel] [PATCH] migration/postcopy: use static PostcopyDiscardState instead of allocating it for each block

2019-07-19 Thread Wei Yang
On Fri, Jul 19, 2019 at 06:41:28PM +0100, Dr. David Alan Gilbert wrote: >* Wei Yang (richardw.y...@linux.intel.com) wrote: >> Even we need to do discard for each RAMBlock, we still can leverage the >> same memory space to store the information. >> >> By doing so, we avoid memory allocation and

Re: [Qemu-devel] [PATCH] riscv: sifive_test: Add reset functionality

2019-07-19 Thread Palmer Dabbelt
On Fri, 14 Jun 2019 08:15:51 PDT (-0700), bmeng...@gmail.com wrote: This adds a reset opcode for sifive_test device to trigger a system reset for testing purpose. Signed-off-by: Bin Meng --- hw/riscv/sifive_test.c | 4 include/hw/riscv/sifive_test.h | 3 ++- 2 files changed, 6

Re: [Qemu-devel] [PATCH 3/3] migration/savevm: move non SaveStateEntry condition check out of iteration

2019-07-19 Thread Wei Yang
On Fri, Jul 19, 2019 at 05:59:50PM +0100, Dr. David Alan Gilbert wrote: >* Wei Yang (richardw.y...@linux.intel.com) wrote: >> in_postcopy and iterable_only are not SaveStateEntry specific, it would >> be more proper to check them out of iteration. >> >> Signed-off-by: Wei Yang > >Worth it just

Re: [Qemu-devel] [PATCH 1/3] migration/savevm: flush file for iterable_only case

2019-07-19 Thread Wei Yang
On Fri, Jul 19, 2019 at 05:47:59PM +0100, Dr. David Alan Gilbert wrote: >* Wei Yang (richardw.y...@linux.intel.com) wrote: >> It would be proper to flush file even for iterable_only case. >> >> Signed-off-by: Wei Yang > >OK, I don't think this is actually necessary; but it's safe. >We only

Re: [Qemu-devel] [PATCH] migration: current_migration is never NULL

2019-07-19 Thread Wei Yang
On Fri, Jul 19, 2019 at 04:10:02PM +0100, Dr. David Alan Gilbert wrote: >* Wei Yang (richardw.y...@linux.intel.com) wrote: >> migration_object_init() create and assign current_migration, which means >> it will never be null until migration_shutdown(). >> >> Signed-off-by: Wei Yang >> --- >>

Re: [Qemu-devel] [PATCH] migration: remove unused field bytes_xfer

2019-07-19 Thread Wei Yang
On Fri, Jul 19, 2019 at 07:05:44PM +0100, Dr. David Alan Gilbert wrote: >* Wei Yang (richardw.y...@linux.intel.com) wrote: >> On Tue, Jun 11, 2019 at 10:33:29AM +0200, Juan Quintela wrote: >> >Wei Yang wrote: >> >> On Tue, Apr 02, 2019 at 08:31:06AM +0800, Wei Yang wrote: >>

[Qemu-devel] [PATCH qemu RFC 2/4] spapr: Allow bios-less configuration

2019-07-19 Thread Alexey Kardashevskiy
The pseries kernel can do either usual prom-init boot or kexec style boot. We always did the prom-init which relies on the completeness of the device tree (for example, PCI BARs have to be assigned beforehand) and the client interface; the system firmware (SLOF) implements this. However we can

[Qemu-devel] [PATCH qemu RFC 4/4] spapr: Implement SLOF-less client_architecture_support

2019-07-19 Thread Alexey Kardashevskiy
QEMU already implements H_CAS called by SLOF. The existing handler prepares a diff FDT and SLOF applies it on top of its current tree. In SLOF-less setup when the user explicitly selected "bios=no", this updates the FDT from the OS, updates it and writes back to the OS. The new behavior is

[Qemu-devel] [PATCH qemu RFC 1/4] spapr: Allow changing kernel loading address

2019-07-19 Thread Alexey Kardashevskiy
Useful for the debugging purposes. Signed-off-by: Alexey Kardashevskiy --- include/hw/ppc/spapr.h | 1 + hw/ppc/spapr.c | 33 +++-- 2 files changed, 28 insertions(+), 6 deletions(-) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index

[Qemu-devel] [PATCH qemu RFC 0/4] spapr: Kexec style boot

2019-07-19 Thread Alexey Kardashevskiy
This is an attempts to boot a pseries guest without a firmware. The idea is to boot a VM with petitboot as a more powerful boot loader and eliminate scanning phase of the SLOF booting process. This provides environment without SLOF but with the device tree and few modifications to already

[Qemu-devel] [PATCH qemu RFC 3/4] spapr: Advertise H_RTAS to the guest

2019-07-19 Thread Alexey Kardashevskiy
Since day 1 QEMU implemented RTAS as a custom hypercall wrapped into a small 20 bytes blob which guest would call to enter RTAS. Although it works fine, it is still a separate binary image which requires signing at no additional benefit. This adds a flag into /chosen to tell a modified guest that

[Qemu-devel] [PATCH v4 5/7] log: adding -d tb_stats to control tbstats

2019-07-19 Thread vandersonmr
Adding -d tb_stats:[limit:[all|jit|exec]] to control TBStatistics collection. "limit" is used to limit the number of TBStats in the linux-user dump. [all|jit|exec] control the profilling level used by the TBStats: all, only jit stats or only execution count stats. Signed-off-by: Vanderson M. do

[Qemu-devel] [PATCH v4 2/7] accel: collecting TB execution count

2019-07-19 Thread vandersonmr
If a TB has a TBS (TBStatistics) with the TB_EXEC_STATS enabled, then we instrument the start code of the TB to atomically count the number of times it is executed. The execution count of the TB is stored in its respective TBS. Signed-off-by: Vanderson M. do Rosario --- accel/tcg/tcg-runtime.c

[Qemu-devel] [PATCH v4 6/7] monitor: adding tb_stats hmp command

2019-07-19 Thread vandersonmr
Adding tb_stats [start|pause|stop|filter] command to hmp. This allows controlling the collection of statistics. It is also possible to set the level of collection: all, jit, or exec. The goal of this command is to allow the dynamic exploration of the TCG behavior and quality. Therefore, for now,

[Qemu-devel] [PATCH v4 4/7] accel: replacing part of CONFIG_PROFILER with TBStats

2019-07-19 Thread vandersonmr
We add some of the statistics collected in the TCGProfiler into the TBStats, having the statistics not only for the whole emulation but for each TB. Then, we removed these stats from TCGProfiler and reconstruct the information for the "info jit" using the sum of all TBStats statistics. The goal

[Qemu-devel] [PATCH v4 1/7] accel: introducing TBStatistics structure

2019-07-19 Thread vandersonmr
To store statistics for each TB we created a TBStatistics structure which is linked with the TBs. The TBStatistics can stay alive after tb_flush and be relinked to a regenerated TB. So the statistics can be accumulated even through flushes. TBStatistics will be also referred to as TBS or tbstats.

[Qemu-devel] [PATCH v4 0/7] Measure Tiny Code Generation Quality

2019-07-19 Thread vandersonmr
This patch is part of Google Summer of Code (GSoC) 2019. More about the project can be found in: https://wiki.qemu.org/Internships/ProjectIdeas/TCGCodeQuality The goal of this patch is to add infrastructure to collect execution and JIT statistics during the emulation with accel/TCG. The

[Qemu-devel] [PATCH v4 3/7] accel: collecting JIT statistics

2019-07-19 Thread vandersonmr
If a TB has a TBS (TBStatistics) with the TB_JIT_STATS enabled then we collect statistics of its translation processes and code translation. To collect the number of host instructions we used a modified version of the disas function to pass through the whole code without printing anything

[Qemu-devel] [PATCH v4 7/7] monitor: adding info tbs, tb, and coverset

2019-07-19 Thread vandersonmr
Adding info [tbs|tb|coverset] commands to HMP. These commands allow the exploration of TBs generated by the TCG. Understand which one hotter, with more guest/host instructions... and examine their guest, host and IR code. The goal of this command is to allow the dynamic exploration of TCG

Re: [Qemu-devel] [PATCH v6 00/14] Add support for io_uring

2019-07-19 Thread no-reply
Patchew URL: https://patchew.org/QEMU/20190719133530.28688-1-mehta.aar...@gmail.com/ Hi, This series failed build test on s390x host. Please find the details below. === TEST SCRIPT BEGIN === #!/bin/bash # Testing script will be invoked under the git checkout with # HEAD pointing to a commit

Re: [Qemu-devel] [PATCH v6 00/14] Add support for io_uring

2019-07-19 Thread no-reply
Patchew URL: https://patchew.org/QEMU/20190719133530.28688-1-mehta.aar...@gmail.com/ Hi, This series failed the asan build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN === #!/bin/bash

Re: [Qemu-devel] [PATCH 1/1] x86: add CPU flags supported inside libvirt

2019-07-19 Thread Paolo Bonzini
On 20/07/19 00:05, Eduardo Habkost wrote: >> Actually KVM does not mark it as supported: >> >> const u32 kvm_cpuid_7_0_ebx_x86_features = >> F(FSGSBASE) | F(BMI1) | F(HLE) | F(AVX2) | F(SMEP) | >> F(BMI2) | F(ERMS) | f_invpcid | F(RTM) | f_mpx | F(RDSEED) |

Re: [Qemu-devel] [PATCH 1/1] x86: add CPU flags supported inside libvirt

2019-07-19 Thread Eduardo Habkost
On Fri, Jul 19, 2019 at 11:44:57PM +0200, Paolo Bonzini wrote: > On 19/07/19 22:53, Eduardo Habkost wrote: > > This is one is named "cqm" on Linux (X86_FEATURE_CQM). I prefer > > to keep consistency with the name already in use by Linux than > > the one in libvirt that was never used. > > > >

[Qemu-devel] [PATCH for-4.2 24/24] target/arm: Enable ARMv8.1-VHE in -cpu max

2019-07-19 Thread Richard Henderson
Signed-off-by: Richard Henderson --- target/arm/cpu64.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 1901997a06..b1bb394c6d 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -337,6 +337,7 @@ static void aarch64_max_initfn(Object

[Qemu-devel] [PATCH for-4.2 23/24] target/arm: Update {fp, sve}_exception_el for VHE

2019-07-19 Thread Richard Henderson
When TGE+E2H are both set, CPACR_EL1 is ignored. Signed-off-by: Richard Henderson --- target/arm/helper.c | 53 - 1 file changed, 28 insertions(+), 25 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index ae3ec9ea67..bbe36eb3a9

Re: [Qemu-devel] [PATCH 1/1] x86: add CPU flags supported inside libvirt

2019-07-19 Thread Paolo Bonzini
On 19/07/19 22:53, Eduardo Habkost wrote: > This is one is named "cqm" on Linux (X86_FEATURE_CQM). I prefer > to keep consistency with the name already in use by Linux than > the one in libvirt that was never used. > > You can still add a "cmt" alias property if you think it would be > useful.

[Qemu-devel] [PATCH for-4.2 13/24] target/arm: Split out vae1_tlbmask, vmalle1_tlbmask

2019-07-19 Thread Richard Henderson
No functional change, but unify code sequences. Signed-off-by: Richard Henderson --- target/arm/helper.c | 118 ++-- 1 file changed, 37 insertions(+), 81 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 9a9809ff4f..7adbf51479

[Qemu-devel] [PATCH for-4.2 20/24] target/arm: Flush tlbs for E2&0 translation regime

2019-07-19 Thread Richard Henderson
Signed-off-by: Richard Henderson --- target/arm/helper.c | 34 ++ 1 file changed, 26 insertions(+), 8 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 22eb056b27..fe022f51d6 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@

Re: [Qemu-devel] [PATCH v4 20/22] target/arm: Create a TLB entry for tag physical address space

2019-07-19 Thread Richard Henderson
On 7/19/19 8:48 AM, Peter Maydell wrote: > Playing around with this series, I have discovered that if > the board model doesn't create the tag-memory then target/arm/cpu.c > will not create the 'cpu-tag-memory' AddressSpace. But nothing > disables the usage of the target_tlb_bit2, and then when >

[Qemu-devel] [PATCH for-4.2 06/24] target/arm: Define isar_feature_aa64_vh

2019-07-19 Thread Richard Henderson
Signed-off-by: Richard Henderson --- target/arm/cpu.h | 5 + 1 file changed, 5 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 94c990cddb..e6a76d14c6 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -3573,6 +3573,11 @@ static inline bool

[Qemu-devel] [PATCH for-4.2 16/24] target/arm: Add regime_has_2_ranges

2019-07-19 Thread Richard Henderson
Signed-off-by: Richard Henderson --- target/arm/internals.h | 16 target/arm/helper.c| 22 +- target/arm/translate-a64.c | 3 +-- 3 files changed, 22 insertions(+), 19 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h

[Qemu-devel] [PATCH for-4.2 08/24] target/arm: Add CONTEXTIDR_EL2

2019-07-19 Thread Richard Henderson
Not all of the breakpoint types are supported, but those that only examine contextidr are extended to support the new register. Signed-off-by: Richard Henderson --- target/arm/debug_helper.c | 50 +-- target/arm/helper.c | 11 + 2 files changed,

[Qemu-devel] [PATCH for-4.2 12/24] target/arm: Add VHE system register redirection and aliasing

2019-07-19 Thread Richard Henderson
Several of the EL1/0 registers are redirected to the EL2 version when in EL2 and HCR_EL2.E2H is set. Many of these registers have side effects. Link together the two ARMCPRegInfo structures after they have been properly instantiated. Install common dispatch routines to all of the relevant

[Qemu-devel] [PATCH for-4.2 09/24] target/arm: Add TTBR1_EL2

2019-07-19 Thread Richard Henderson
At the same time, add writefn to TTBR0_EL2 and TCR_EL2. Signed-off-by: Richard Henderson --- target/arm/helper.c | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index d1bf31ab74..da2e0627b2 100644 ---

[Qemu-devel] [PATCH for-4.2 15/24] target/arm: Reorganize ARMMMUIdx

2019-07-19 Thread Richard Henderson
Prepare for, but do not yet implement, the EL2&0 regime and the Secure EL2 regime. Rename all of the a-profile symbols to make the distictions clearer. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 180 ++-- target/arm/internals.h | 46 ---

[Qemu-devel] [PATCH for-4.2 07/24] target/arm: Enable HCR_E2H for VHE

2019-07-19 Thread Richard Henderson
Signed-off-by: Richard Henderson --- target/arm/cpu.h| 7 --- target/arm/helper.c | 6 +- 2 files changed, 5 insertions(+), 8 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index e6a76d14c6..e37008a4f7 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1366,13

[Qemu-devel] [PATCH for-4.2 21/24] target/arm: Update arm_phys_excp_target_el for TGE

2019-07-19 Thread Richard Henderson
The TGE bit routes all asynchronous exceptions to EL2. Signed-off-by: Richard Henderson --- target/arm/helper.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index fe022f51d6..f06e7bcd77 100644 --- a/target/arm/helper.c +++

[Qemu-devel] [PATCH for-4.2 19/24] target/arm: Install asids for E2&0 translation regime

2019-07-19 Thread Richard Henderson
When clearing HCR_E2H, this involves re-installing the E1&0 asid. Signed-off-by: Richard Henderson --- target/arm/helper.c | 37 - 1 file changed, 32 insertions(+), 5 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index

[Qemu-devel] [PATCH for-4.2 17/24] target/arm: Update arm_mmu_idx for VHE

2019-07-19 Thread Richard Henderson
This covers initial generation in arm_mmu_idx, and reconstruction in core_to_arm_mmu_idx. As a conseqeuence, we also need a bit in TBFLAGS in order to make the latter reliable. Signed-off-by: Richard Henderson --- target/arm/cpu.h| 2 ++ target/arm/helper.c | 42

[Qemu-devel] [PATCH for-4.2 10/24] target/arm: Update CNTVCT_EL0 for VHE

2019-07-19 Thread Richard Henderson
The virtual offset may be 0 depending on EL, E2H and TGE. Signed-off-by: Richard Henderson --- target/arm/helper.c | 40 +--- 1 file changed, 37 insertions(+), 3 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index da2e0627b2..3124d682a2

[Qemu-devel] [PATCH for-4.2 14/24] target/arm: Simplify tlb_force_broadcast alternatives

2019-07-19 Thread Richard Henderson
Rather than call to a separate function and re-compute any parameters for the flush, simply use the correct flush function directly. Signed-off-by: Richard Henderson --- target/arm/helper.c | 52 + 1 file changed, 24 insertions(+), 28 deletions(-)

[Qemu-devel] [PATCH for-4.2 11/24] target/arm: Add the hypervisor virtual counter

2019-07-19 Thread Richard Henderson
Signed-off-by: Richard Henderson --- target/arm/cpu-qom.h | 1 + target/arm/cpu.h | 11 + target/arm/cpu.c | 2 ++ target/arm/helper.c | 57 4 files changed, 66 insertions(+), 5 deletions(-) diff --git a/target/arm/cpu-qom.h

[Qemu-devel] [PATCH for-4.2 18/24] target/arm: Update arm_sctlr for VHE

2019-07-19 Thread Richard Henderson
Use this function in many more places in order to select the correct control. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 10 ++ target/arm/arch_dump.c| 2 +- target/arm/helper-a64.c | 2 +- target/arm/helper.c | 10 +-

[Qemu-devel] [PATCH for-4.2 22/24] target/arm: Update regime_is_user for EL2&0

2019-07-19 Thread Richard Henderson
Signed-off-by: Richard Henderson --- target/arm/helper.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index f06e7bcd77..ae3ec9ea67 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8885,6 +8885,7 @@ static inline bool

[Qemu-devel] [PATCH for-4.2 05/24] target/arm: Install ASIDs for EL2

2019-07-19 Thread Richard Henderson
The VMID is the ASID for the 2nd stage page lookup. Signed-off-by: Richard Henderson --- target/arm/helper.c | 26 -- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 1ed7c06313..3a9f35bf4b 100644 ---

[Qemu-devel] [PATCH for-4.2 02/24] cputlb: Add tlb_flush_asid_by_mmuidx and friends

2019-07-19 Thread Richard Henderson
Since we have remembered ASIDs, we can further minimize flushing by comparing against the one we want to flush. Signed-off-by: Richard Henderson --- include/exec/exec-all.h | 16 + include/qom/cpu.h | 1 + accel/tcg/cputlb.c | 51 +

[Qemu-devel] [PATCH for-4.2 04/24] target/arm: Install ASIDs for short-form from EL1

2019-07-19 Thread Richard Henderson
This is less complex than the LPAE case, but still we now avoid the flush in case it is only the PROCID field that is changing. Signed-off-by: Richard Henderson --- target/arm/helper.c | 34 -- 1 file changed, 24 insertions(+), 10 deletions(-) diff --git

[Qemu-devel] [PATCH for-4.2 01/24] cputlb: Add tlb_set_asid_for_mmuidx

2019-07-19 Thread Richard Henderson
Although we can't do much with ASIDs except remember them, this will allow cleanups within target/ that should make things clearer. Signed-off-by: Richard Henderson --- v2: Assert cpu_is_self; only flush idx w/ asid mismatch. --- include/exec/cpu-all.h | 11 +++

[Qemu-devel] [PATCH for-4.2 00/24] target/arm: Implement ARMv8.1-VHE

2019-07-19 Thread Richard Henderson
About half of this patch set is cleanup of the qemu tlb handling leading up to the actual implementation of VHE, and the biggest piece of that: The EL2&0 translation regime. Testing so far has been limited to booting a debian 9 system with a 4.9 kernel, and a fedora 30 system with a 5.1 kernel.

[Qemu-devel] [PATCH for-4.2 03/24] target/arm: Install ASIDs for long-form from EL1

2019-07-19 Thread Richard Henderson
In addition to providing the core with the current ASID, this minimizes both the number of flushes due to non-changing ASID as well as the set of mmu_idx that are affected by each flush. In particular, updates to the secure mode registers flushes only the relevant secure mode mmu_idx's, and

Re: [Qemu-devel] [PATCH 1/1] x86: add CPU flags supported inside libvirt

2019-07-19 Thread Eduardo Habkost
On Thu, Jul 18, 2019 at 04:45:37PM +0300, Denis V. Lunev wrote: > There are the following flags available in libvirt inside cpu_map.xm > > This is bit 18... > > > > > We have faced the problem that QEMU does not start once these flags are > present in the

Re: [Qemu-devel] [PATCH v3] qapi: Add InetSocketAddress member keep-alive

2019-07-19 Thread Eric Blake
On 6/25/19 8:32 AM, Markus Armbruster wrote: > I apologize for dragging my feet on this review. > > Vladimir Sementsov-Ogievskiy writes: > >> It's needed to provide keepalive for nbd client to track server >> availability. >> >> Signed-off-by: Vladimir Sementsov-Ogievskiy >> --- >> >> +++

[Qemu-devel] [PULL 1/1] nbd: Initialize reply on failure

2019-07-19 Thread Eric Blake
We've had two separate reports of different callers running into use of uninitialized data if s->quit is set (one detected by gcc -O3, another by valgrind), due to checking 'nbd_reply_is_simple(reply) || s->quit' in the wrong order. Rather than chasing down which callers need to pre-initialize

[Qemu-devel] [PULL 0/1] NBD patches for -rc2

2019-07-19 Thread Eric Blake
The following changes since commit e2b47666fe1544959c89bd3ed159e9e37cc9fc73: Merge remote-tracking branch 'remotes/berrange/tags/misc-next-pull-request' into staging (2019-07-19 14:29:13 +0100) are available in the Git repository at: https://repo.or.cz/qemu/ericb.git

[Qemu-devel] [Bug 1818937] Re: Crash with HV_ERROR on macOS host

2019-07-19 Thread Roman Bolshakov
I'm looking into the issue... HV_ERROR is a high-level return value and doesn't give enough details about the nature of the error. The error is returned from vmexit handler in AppleHV.kext (which implements kernel part of Hypervisor.framework). Perhaps we should extract more data from the VMCS and

[Qemu-devel] [PATCH 1/2] net: assert that tx packets have nonzero size

2019-07-19 Thread Oleinik, Alexander
Virtual devices should not try to send zero-sized packets. The caller should check the size prior to calling qemu_sendv_packet_async. Signed-off-by: Alexander Oleinik --- net/net.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/net/net.c b/net/net.c index 7d4098254f..fad20bc611 100644

[Qemu-devel] [PATCH 0/2] Avoid sending zero-size packets

2019-07-19 Thread Oleinik, Alexander
While fuzzing virtio-net I found that attempting to send a zero-size packet leads to an assertion failure, when resetting the device. These patches add an assertion to net/net.c to ensure that virtual devices do not try to send zero-size packets and change virtio-net to check that packets have

[Qemu-devel] [PATCH 2/2] virtio-net: check that tx packet has positive size

2019-07-19 Thread Oleinik, Alexander
virtio_net_flush_tx does not check that the packet size is nonzero, which causes q->aysnc_tx.elem to be set. Then, when the device is reset, there is an assertion failure since q->aysnc_tx.elem must be flushed/cleared. Zero-sized packets are unsupported - check packet size, prior to sending.

Re: [Qemu-devel] [PATCH] migration: equation is more proper than and to check LOADVM_QUIT

2019-07-19 Thread Dr. David Alan Gilbert
* Wei Yang (richardw.y...@linux.intel.com) wrote: > LOADVM_QUIT allows a command to quit all layers of nested loadvm loops, > while current return value check is not that proper even it works now. > > Current return value check "ret & LOADVM_QUIT" would return true if > bit[0] is 1. This would be

Re: [Qemu-devel] [PATCH] migration: use migration_in_postcopy() to check POSTCOPY_ACTIVE

2019-07-19 Thread Dr. David Alan Gilbert
* Wei Yang (richardw.y...@linux.intel.com) wrote: > Use common helper function to check the state. > > Signed-off-by: Wei Yang Reviewed-by: Dr. David Alan Gilbert > --- > migration/rdma.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/migration/rdma.c

Re: [Qemu-devel] [PATCH] scsi-generic: Check sense key before request snooping and patching

2019-07-19 Thread Dmitry Fomichev
Paolo, I've tested this version of the patch and it works fine. Indeed, with this cleanup, the code is more straightforward and robust. Dmitry -Original Message- From: Qemu-devel On Behalf Of Paolo Bonzini Sent: Friday, July 19, 2019 4:17 AM To: qemu-devel@nongnu.org Cc: Shinichiro

[Qemu-devel] [PATCH v1 1/1] riscv/boot: Fixup the RISC-V firmware warning

2019-07-19 Thread Alistair Francis
Fix a typo in the warning message displayed to users, don't print the message when running inside qtest and don't mention a specific QEMU version for the deprecation. Signed-off-by: Alistair Francis --- hw/riscv/boot.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff

Re: [Qemu-devel] [PATCH] migration: check length directly to make sure the range is aligned

2019-07-19 Thread Dr. David Alan Gilbert
* Paolo Bonzini (pbonz...@redhat.com) wrote: > On 19/07/19 19:54, Dr. David Alan Gilbert wrote: > >> -if ((uintptr_t)host_endaddr & (rb->page_size - 1)) { > >> -error_report("ram_block_discard_range: Unaligned end address: > >> %p", > >> -

Re: [Qemu-devel] [PATCH] migration: remove unused field bytes_xfer

2019-07-19 Thread Dr. David Alan Gilbert
* Wei Yang (richardw.y...@linux.intel.com) wrote: > On Tue, Jun 11, 2019 at 10:33:29AM +0200, Juan Quintela wrote: > >Wei Yang wrote: > >> On Tue, Apr 02, 2019 at 08:31:06AM +0800, Wei Yang wrote: > >>>MigrationState->bytes_xfer is only set to 0 in migrate_init(). > >>> > >>>Remove this

Re: [Qemu-devel] [PATCH] migration: check length directly to make sure the range is aligned

2019-07-19 Thread Paolo Bonzini
On 19/07/19 19:54, Dr. David Alan Gilbert wrote: >> -if ((uintptr_t)host_endaddr & (rb->page_size - 1)) { >> -error_report("ram_block_discard_range: Unaligned end address: >> %p", >> - host_endaddr); >> +if (length & (rb->page_size - 1)) { >> +

Re: [Qemu-devel] [PATCH] migration: check length directly to make sure the range is aligned

2019-07-19 Thread Dr. David Alan Gilbert
* Wei Yang (richardw.y...@linux.intel.com) wrote: > Since the start addr is already checked, to make sure the range is > aligned, checking the length is enough. > > Signed-off-by: Wei Yang > --- > exec.c | 7 +++ > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/exec.c

[Qemu-devel] [Bug 1837218] Re: qemu segfaults after spice update with bochs-display

2019-07-19 Thread post-factum
I've built qemu v4.1.0-rc1 with debug symbols, but got no luck in reproducing this. -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1837218 Title: qemu segfaults after spice update with

Re: [Qemu-devel] [PATCH] migration/postcopy: use static PostcopyDiscardState instead of allocating it for each block

2019-07-19 Thread Dr. David Alan Gilbert
* Wei Yang (richardw.y...@linux.intel.com) wrote: > Even we need to do discard for each RAMBlock, we still can leverage the > same memory space to store the information. > > By doing so, we avoid memory allocation and deallocation to the system > and also avoid potential failure of memory

Re: [Qemu-devel] [PATCH for-4.1 v2] nbd: Initialize reply on failure

2019-07-19 Thread Philippe Mathieu-Daudé
On 7/19/19 7:20 PM, Eric Blake wrote: > We've had two separate reports of different callers running into use > of uninitialized data if s->quit is set (one detected by gcc -O3, > another by valgrind), due to checking 'nbd_reply_is_simple(reply) || > s->quit' in the wrong order. Rather than chasing

Re: [Qemu-devel] [PATCH for-4.1] target/arm: Limit ID register assertions to TCG

2019-07-19 Thread Philippe Mathieu-Daudé
On 7/18/19 2:59 PM, Peter Maydell wrote: > In arm_cpu_realizefn() we make several assertions about the values of > guest ID registers: > * if the CPU provides AArch32 v7VE or better it must advertise the >ARM_DIV feature > * if the CPU provides AArch32 A-profile v6 or better it must >

[Qemu-devel] [PATCH for-4.1 v2] nbd: Initialize reply on failure

2019-07-19 Thread Eric Blake
We've had two separate reports of different callers running into use of uninitialized data if s->quit is set (one detected by gcc -O3, another by valgrind), due to checking 'nbd_reply_is_simple(reply) || s->quit' in the wrong order. Rather than chasing down which callers need to pre-initialize

Re: [Qemu-devel] [PATCH] nbd: Initialize reply on failure

2019-07-19 Thread Philippe Mathieu-Daudé
On 7/19/19 7:15 PM, Eric Blake wrote: > On 7/19/19 10:03 AM, Eric Blake wrote: >> We've had two separate reports of a caller running into use of >> uninitialized data if s->quit is set (one detected by gcc -O3, another >> by valgrind), due to checking 'nbd_reply_is_simple(reply) || s->quit' >> in

Re: [Qemu-devel] [PATCH] nbd: Initialize reply on failure

2019-07-19 Thread Eric Blake
On 7/19/19 10:03 AM, Eric Blake wrote: > We've had two separate reports of a caller running into use of > uninitialized data if s->quit is set (one detected by gcc -O3, another > by valgrind), due to checking 'nbd_reply_is_simple(reply) || s->quit' > in the wrong order. Rather than chasing down

Re: [Qemu-devel] [PATCH] nbd: Initialize reply on failure

2019-07-19 Thread Eric Blake
On 7/19/19 10:03 AM, Eric Blake wrote: > We've had two separate reports of a caller running into use of > uninitialized data if s->quit is set (one detected by gcc -O3, another > by valgrind), due to checking 'nbd_reply_is_simple(reply) || s->quit' > in the wrong order. Rather than chasing down

Re: [Qemu-devel] [PULL 00/19] Bugfix/cleanup patches for 2019-07-16

2019-07-19 Thread Paolo Bonzini
On 19/07/19 18:15, Peter Maydell wrote: > Hi Paolo -- it looks like this may have broken the > travis config "--without-default-devices": Alex Bennée already has a queued patch for this (and I did too but I removed it in favor of his). You can apply it directly from message-id

Re: [Qemu-devel] [PATCH 3/3] migration/savevm: move non SaveStateEntry condition check out of iteration

2019-07-19 Thread Dr. David Alan Gilbert
* Wei Yang (richardw.y...@linux.intel.com) wrote: > in_postcopy and iterable_only are not SaveStateEntry specific, it would > be more proper to check them out of iteration. > > Signed-off-by: Wei Yang Worth it just to make that big if statement simpler! Reviewed-by: Dr. David Alan Gilbert >

Re: [Qemu-devel] [PATCH 2/3] migration/savevm: split qemu_savevm_state_complete_precopy() into two parts

2019-07-19 Thread Dr. David Alan Gilbert
* Wei Yang (richardw.y...@linux.intel.com) wrote: > This is a preparation patch for further cleanup. > > No functional change, just wrap two major part of > qemu_savevm_state_complete_precopy() into function. > > Signed-off-by: Wei Yang Reviewed-by: Dr. David Alan Gilbert > --- >

Re: [Qemu-devel] [PATCH 1/3] migration/savevm: flush file for iterable_only case

2019-07-19 Thread Dr. David Alan Gilbert
* Wei Yang (richardw.y...@linux.intel.com) wrote: > It would be proper to flush file even for iterable_only case. > > Signed-off-by: Wei Yang OK, I don't think this is actually necessary; but it's safe. We only really need the flush at the end of the file, and in the non-iterable-only case it's

Re: [Qemu-devel] [PATCH v2 3/4] hw/arm/boot: Avoid placing the initrd on top of the kernel

2019-07-19 Thread Mark Rutland
Hi Peter, I've just been testing on QEMU v4.1.0-rc1, and found a case where the DTB overlapped the end of the kernel, and I think there's a bug in this patch -- explanation below. On Thu, May 16, 2019 at 03:47:32PM +0100, Peter Maydell wrote: > We currently put the initrd at the smaller of: > *

[Qemu-devel] [PATCH v5 5/6] iotests: extended timeout under Valgrind

2019-07-19 Thread Andrey Shinkevich
As the iotests run longer under the Valgrind, the QEMU_COMM_TIMEOUT is to be increased in the test cases 028, 183 and 192 when running under the Valgrind. Suggested-by: Roman Kagan Signed-off-by: Andrey Shinkevich Reviewed-by: Vladimir Sementsov-Ogievskiy --- tests/qemu-iotests/028 | 6 +-

[Qemu-devel] [PATCH v5 3/6] iotests: Add casenotrun report to bash tests

2019-07-19 Thread Andrey Shinkevich
The new function _casenotrun() is to be invoked if a test case cannot be run for some reason. The user will be notified by a message passed to the function. Suggested-by: Kevin Wolf Signed-off-by: Andrey Shinkevich --- tests/qemu-iotests/common.rc | 7 +++ 1 file changed, 7 insertions(+)

[Qemu-devel] [PATCH v5 6/6] iotests: extend sleeping time under Valgrind

2019-07-19 Thread Andrey Shinkevich
To synchronize the time when QEMU is running longer under the Valgrind, increase the sleeping time in the test 247. Signed-off-by: Andrey Shinkevich Reviewed-by: Vladimir Sementsov-Ogievskiy --- tests/qemu-iotests/247 | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git

[Qemu-devel] [PATCH v5 0/6] Allow Valgrind checking all QEMU processes

2019-07-19 Thread Andrey Shinkevich
In the current implementation of the QEMU bash iotests, only qemu-io processes may be run under the Valgrind, which is a useful tool for finding memory usage issues. Let's allow the common.rc bash script runing all the QEMU processes, such as qemu-kvm, qemu-img, qemu-ndb and qemu-vxhs, under the

[Qemu-devel] [PATCH v5 4/6] iotests: Valgrind fails with nonexistent directory

2019-07-19 Thread Andrey Shinkevich
The Valgrind uses the exported variable TMPDIR and fails if the directory does not exist. Let us exclude such a test case from being run under the Valgrind and notify the user of it. Suggested-by: Kevin Wolf Signed-off-by: Andrey Shinkevich --- tests/qemu-iotests/051 | 4 1 file changed,

[Qemu-devel] [PATCH v5 1/6] iotests: allow Valgrind checking all QEMU processes

2019-07-19 Thread Andrey Shinkevich
With the '-valgrind' option, let all the QEMU processes be run under the Valgrind tool. The Valgrind own parameters may be set with its environment variable VALGRIND_OPTS, e.g. VALGRIND_OPTS="--leak-check=yes" ./check -qcow2 -valgrind or they may be listed in the Valgrind checked file

[Qemu-devel] [PATCH v5 2/6] iotests: exclude killed processes from running under Valgrind

2019-07-19 Thread Andrey Shinkevich
The Valgrind tool fails to manage its termination when QEMU raises the signal SIGKILL in the multi-threaded process. The bug has been reported to the Valgrind maintainers and was registered as Bug 409141. Let's exclude such test cases from running under the Valgrind until new release of it

Re: [Qemu-devel] [PATCH-for-4.1] crypto: Fix data type for len parameter in two typedefs

2019-07-19 Thread Daniel P . Berrangé
On Thu, Jul 18, 2019 at 09:51:23PM +0200, Stefan Weil wrote: > Signed-off-by: Stefan Weil > --- > crypto/hash-nettle.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) FYI, A different fix for this problem is now merged. Regards, Daniel -- |: https://berrange.com -o-

Re: [Qemu-devel] [PATCH 3/3] riscv: sifive_u: Fix clock-names property for ethernet node

2019-07-19 Thread Alistair Francis
On Fri, Jul 19, 2019 at 6:41 AM Guenter Roeck wrote: > > The correct property name is clock-names, not clocks-names. > > Without this patch, the Ethernet driver fails to instantiate with > the following error. > > macb 100900fc.ethernet: failed to get macb_clk (-2) > macb: probe of

Re: [Qemu-devel] [PATCH-for-4.1 v7 1/1] hw/block/pflash_cfi01: Add missing DeviceReset() handler

2019-07-19 Thread Philippe Mathieu-Daudé
Hi Laszlo, On 7/18/19 9:35 PM, Philippe Mathieu-Daudé wrote: > On 7/18/19 8:38 PM, Laszlo Ersek wrote: >> On 07/18/19 17:03, Laszlo Ersek wrote: >>> On 07/18/19 12:48, Philippe Mathieu-Daudé wrote: To avoid incoherent states when the machine resets (see but report [...]>>> (3) Using OVMF

Re: [Qemu-devel] [PULL] RISC-V Patches for 4.2-rc2

2019-07-19 Thread Alistair Francis
On Fri, Jul 19, 2019 at 4:11 AM Peter Maydell wrote: > > On Fri, 19 Jul 2019 at 12:03, Peter Maydell wrote: > > This passes the 'make check' tests but it prints out a lot > > of warnings as it does so: > > > > qemu-system-riscv64: warning: No -bios option specified. Not loading a > > firmware.

[Qemu-devel] [Bug 1829242] Re: qemu on windows host exits after savevm command

2019-07-19 Thread Dr. David Alan Gilbert
that code should be ok; if you can find it with a debug I'd try and figure out what block and page pss is currently pointing to. Is it normal RAM or something special? -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU.

[Qemu-devel] [PATCH v1 0/3] virtio-balloon: PartialBalloonedPage rework

2019-07-19 Thread David Hildenbrand
Michael pointed out that stroing and using the address of a RAMBlock might not be safe. So let's rework the pbp handling, cleaning up the code. Did a sanity test with hugepage backing on x86.64. We might want to have this in 4.1. I'll let Michael decide. Cc: Stefan Hajnoczi Cc: David Gibson

Re: [Qemu-devel] [PULL 00/19] Bugfix/cleanup patches for 2019-07-16

2019-07-19 Thread Peter Maydell
On Tue, 16 Jul 2019 at 09:11, Paolo Bonzini wrote: > > The following changes since commit 46cd24e7ed38191b5ab5c40a836d6c5b6b604f8a: > > Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging > (2019-07-12 17:34:13 +0100) > > are available in the git repository at: > > >

Re: [Qemu-devel] [PATCH] nbd: Initialize reply on failure

2019-07-19 Thread Eric Blake
On 7/19/19 10:53 AM, Philippe Mathieu-Daudé wrote: >> if (ret < 0) { >> +memset(reply, 0, sizeof *reply); > > I never had problem with sizeof without parenthesis, but here I find it > not easy to review. Holdover from my work on GNU coding style projects: the rationale is that you

Re: [Qemu-devel] [PATCH v27 7/8] target/avr: Register AVR support with the rest of QEMU, the build system, and the MAINTAINERS file

2019-07-19 Thread Michael Rolnik
You're right. I did not know what next release was going to be. So I did not change it Sent from my cell phone, please ignore typos On Fri, Jul 19, 2019, 6:43 PM Eric Blake wrote: > On 7/19/19 3:26 AM, Michael Rolnik wrote: > > Signed-off-by: Michael Rolnik > > --- > > > +++

[Qemu-devel] [PATCH v1 2/3] virtio-balloon: Better names for offset variables in inflate/deflate code

2019-07-19 Thread David Hildenbrand
"host_page_base" is really confusing, let's make this clearer, also rename the other offsets to indicate to which base they apply. offset -> mr_offset ram_offset -> rb_offset host_page_base -> rb_aligned_offset While at it, use QEMU_ALIGN_DOWN() instead of a handcrafted computation and move the

[Qemu-devel] [PATCH v1 3/3] virtio-balloon: Rework pbp tracking data

2019-07-19 Thread David Hildenbrand
Using the address of a RAMBlock to test for a matching pbp is not really safe. Instead, let's use the guest physical address of the base page along with the page size (via the number of subpages). While at it, move "struct PartiallyBalloonedPage" to virtio-balloon.h now (previously most probably

[Qemu-devel] [PATCH v1 1/3] virtio-balloon: simplify deflate with pbp

2019-07-19 Thread David Hildenbrand
Let's simplify this - the case we are optimizing for is very hard to trigger and not worth the effort. If we're switching from inflation to deflation, let's reset the pbp. Signed-off-by: David Hildenbrand --- hw/virtio/virtio-balloon.c | 24 1 file changed, 4

  1   2   3   >