We can tell that a decodetree input file is "secondary" when it
uses an argument set marked "!extern". This indicates that at
least one of the insn translation functions will have already
been declared by the "primary" input file, but given only the
secondary we cannot tell which.
Avoid redundant
These are now generated by decodetree itself.
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Acked-by: Palmer Dabbelt
Signed-off-by: Richard Henderson
---
target/riscv/translate.c | 19 +--
1 file changed, 1 insertion(+), 1
Call this form a "parameter", returning a value extracted
from the DisasContext.
Signed-off-by: Richard Henderson
---
docs/devel/decodetree.rst | 8 -
scripts/decodetree.py | 49 ---
tests/decode/err_field6.decode| 5
tests/decode/su
Changes from v1:
* Drop unintended hunk from MultiField constructor.
* Typo fixed in ParameterField documentation.
Blurb from v1:
These are split out from my decodetree coversion of the AArch32
base instruction sets.
The first patch has been tidied per review from Peter. I now
diagno
On 8/16/19 1:58 PM, Peter Maydell wrote:
> The translation table walk for an ATS instruction can result in
> various faults. In general these are just reported back via the
> PAR_EL1 fault status fields, but in some cases the architecture
> requires that the fault is turned into an exception:
> *
On 8/16/19 1:58 PM, Peter Maydell wrote:
> @@ -1729,6 +1729,12 @@ static void handle_sys(DisasContext *s, uint32_t insn,
> bool isread,
> tcg_temp_free_ptr(tmpptr);
> tcg_temp_free_i32(tcg_syn);
> tcg_temp_free_i32(tcg_isread);
> +} else if (ri->type & ARM_CP_RAISES_
On Sat, Aug 17, 2019 at 5:30 PM Eric Blake wrote:
> On 8/16/19 5:47 AM, Vladimir Sementsov-Ogievskiy wrote:
>
> >>> +++ b/blockdev-nbd.c
> >>> @@ -189,7 +189,7 @@ void qmp_nbd_server_add(const char *device, bool
> has_name, const char *name,
> >>> }
> >>>
> >>> exp = nbd_export_new(bs
I was able to get both running on 3.11.0, but something broke again by
the time I re-tested on 4.0.0. 98 seems to work on 4.0 at least, but 95
just reboots infinitely after trying to boot from HDD after the initial
setup. I tried searching their mailing list and asking around but nobody
seems inter
On Sun, Aug 18, 2019 at 12:21 AM Nir Soffer wrote:
> Implement alignment probing similar to file-posix, by reading from the
> first 4k of the image.
>
> Before this change, provisioning a VM on storage with sector size of
> 4096 bytes would fail when the installer try to create filesystems. Here
Implement alignment probing similar to file-posix, by reading from the
first 4k of the image.
Before this change, provisioning a VM on storage with sector size of
4096 bytes would fail when the installer try to create filesystems. Here
is an example command that reproduces this issue:
$ qemu-
Replace instances of:
(n & (BDRV_SECTOR_SIZE - 1)) == 0)
With:
QEMU_IS_ALIGNED(n, BDRV_SECTOR_SIZE)
Which reveals the intent of the code better, and makes it easier to
locate the code checking alignment.
QEMU_IS_ALIGNED is implemented using %, which may be less efficient but
it is used
On Thu, Aug 15, 2019 at 1:29 PM Kevin Wolf wrote:
> Am 15.08.2019 um 04:44 hat Eric Blake geschrieben:
> > On 3/26/19 10:51 AM, Kevin Wolf wrote:
> > > We know that the kernel implements a slow fallback code path for
> > > BLKZEROOUT, so if BDRV_REQ_NO_FALLBACK is given, we shouldn't call it.
> >
On 17.08.19 18:22, Laurent Vivier wrote:
> Le 17/08/2019 à 18:14, David Hildenbrand a écrit :
>> On 17.08.19 17:59, David Hildenbrand wrote:
>>> Hi everybody,
>>>
>>> I was just trying to run qemu-s390x (linux-user) with a very simple
>>> binary (gzip + lib/ld64.so.1, compiled under Fedora 27). Thi
Le 17/08/2019 à 18:14, David Hildenbrand a écrit :
> On 17.08.19 17:59, David Hildenbrand wrote:
>> Hi everybody,
>>
>> I was just trying to run qemu-s390x (linux-user) with a very simple
>> binary (gzip + lib/ld64.so.1, compiled under Fedora 27). This used to
>> work just fine a while ago (especia
On 17.08.19 17:59, David Hildenbrand wrote:
> Hi everybody,
>
> I was just trying to run qemu-s390x (linux-user) with a very simple
> binary (gzip + lib/ld64.so.1, compiled under Fedora 27). This used to
> work just fine a while ago (especially when I was working on vector
> instructions using QEM
On 8/17/19 9:49 AM, Eric Blake wrote:
>> This change is a regression of sorts. Now, you are unconditionally
>> attempting the fallback for ALL failures (such as EIO) and for all
>> drivers, even when that was not previously attempted and increases the
>> traffic. I think we should revert this pa
On 8/17/19 9:42 AM, Eric Blake wrote:
> On 4/5/19 9:24 AM, Andrey Shinkevich wrote:
>> On a file system used by the customer, fallocate() returns an error
>
> Which error?
Okay, I read the rest of the thread; EINVAL. But the commit message was
not amended before becoming commit 118f9944.
>>
On 4/5/19 9:24 AM, Andrey Shinkevich wrote:
> On a file system used by the customer, fallocate() returns an error
Which error?
> if the block is not properly aligned. So, bdrv_co_pwrite_zeroes()
> fails. We can handle that case the same way as it is done for the
> unsupported cases, namely, call
On 8/16/19 4:55 AM, Kevin Wolf wrote:
> If QEMU_AIO_NO_FALLBACK is given, we always return failure and don't
> even try to use the BLKZEROOUT ioctl. In this failure case, we shouldn't
> disable has_write_zeroes because we didn't learn anything about the
> ioctl. The next request might not set QEMU_
On 8/16/19 5:47 AM, Vladimir Sementsov-Ogievskiy wrote:
>>> +++ b/blockdev-nbd.c
>>> @@ -189,7 +189,7 @@ void qmp_nbd_server_add(const char *device, bool
>>> has_name, const char *name,
>>> }
>>>
>>> exp = nbd_export_new(bs, 0, len, name, NULL, bitmap,
>>> - wr
On Fri, Aug 16, 2019 at 02:03:23PM -0500, Paul A. Clarke wrote:
65;5603;1c> From: "Paul A. Clarke"
>
> ISA 3.0B added a set of Floating-Point Status and Control Register (FPSCR)
> instructions: mffsce, mffscdrn, mffscdrni, mffscrn, mffscrni, mffsl.
> This patch adds support for 'mffsl'.
>
> 'mff
The "register" device is only used by certain machines. Let's add
a proper config switch for it so that it only gets compiled when we
really need it.
Signed-off-by: Thomas Huth
---
hw/Kconfig| 1 +
hw/core/Kconfig | 3 +++
hw/core/Makefile.objs | 2 +-
hw/dma/Kconfig| 1
The generic loader device is completely optional. Let's add a proper
config switch for it so that people can disable it if they don't need
it and want to create a minimalistic QEMU binary.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Thomas Huth
---
hw/core/Kconfig | 4
hw/core
The "split-irq" device is currently only used by machines that use
CONFIG_ARMSSE. Let's add a proper CONFIG_SPLIT_IRQ switch for this
so that it only gets compiled when we really need it.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Thomas Huth
---
hw/arm/Kconfig| 3 +++
hw/core/K
From: Philippe Mathieu-Daudé
The XLNX_ZYNQMP config is used in multiple subdirectories
(timer, intc). Move it to the root hw/Kconfig.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20190427141459.19728-2-phi...@redhat.com>
Reviewed-by: Alistair Francis
Signed-off-by: Thomas Huth
---
hw/K
The device is only used by some few boards. Let's use a proper Kconfig
switch so that we only compile this code if we really need it.
Signed-off-by: Thomas Huth
---
hw/arm/Kconfig| 11 +++
hw/microblaze/Kconfig | 1 +
hw/misc/Kconfig | 3 +++
hw/misc/Makefile.objs | 2 +-
From: Philippe Mathieu-Daudé
The xlnx_dpdma device is only used by the ZynqMP AArch64 machine
(not the MicroBlaze PMU). Remove it from the ZynqMP generic objects.
(Note, this entry was duplicated for the AArch64).
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20190427141459.19728-4-phi...@
From: Philippe Mathieu-Daudé
The Xilinx I/O Module Interrupt Controller is only used by the
MicroBlaze PMU, not by the AArch64 machine.
Move it from the generic ZynqMP object list to the PMU specific.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20190427141459.19728-3-phi...@redhat.com>
R
Here are some more Kconfig patches that clean up the switches of
existing devices and introduce proper config switches for some
other devices that were always enabled before.
v3:
- Added Philippe's Reviewed-bys
- The MUSCA and MPS2 switches now also select the "unimplemented" device
v2:
- Incl
The "or-irq" device is only used by certain machines. Let's add
a proper config switch for it so that it only gets compiled when we
really need it.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Thomas Huth
---
hw/arm/Kconfig| 3 +++
hw/core/Kconfig | 3 +++
hw/core/Makefile.o
Patchew URL:
https://patchew.org/QEMU/20190817073628.94473-1-ys...@users.sourceforge.jp/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH v23 00/22] Add RX archtecture support
Message-id: 20190817073628.94473-1-ys...
Patchew URL:
https://patchew.org/QEMU/20190817073628.94473-1-ys...@users.sourceforge.jp/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH v23 00/22] Add RX archtecture support
Message-id: 20190817073628.
The previous has_coalesced_range counter has a problem in that it only
works for additions of coalesced mmio ranges but not deletions. The
reason is that has_coalesced_range information can be lost when the
FlatView updates the topology again when the updated region is not
covering the coalesced r
I can easily crash QEMU as long as KVM is used with e1000 and reboot
many times, then I hit this and QEMU aborts [1]:
kvm_mem_ioeventfd_add: error adding ioeventfd: No space left on device (28)
To reproduce this issue and also to avoid rebooting so many times,
simply dump the devcount from KVM
It is a workaround of current KVM's KVM_UNREGISTER_COALESCED_MMIO
interface. The kernel interface only allows to unregister an mmio
device with exactly the zone size when registered, or any smaller zone
that is included in the device mmio zone. It does not support the
userspace to specify a very
Patchew URL:
https://patchew.org/QEMU/20190817073628.94473-1-ys...@users.sourceforge.jp/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH v23 00/22] Add RX archtecture support
Message-id: 20190817073628.
Patchew URL:
https://patchew.org/QEMU/20190817073628.94473-1-ys...@users.sourceforge.jp/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH v23 00/22] Add RX archtecture support
Message-id: 20190817073628.
Since most iotests are now run during "make check" already, we do not
need to test them explicitly from the gitlab-ci.yml script anymore.
And while we're at it, add some of the new non-auto tests >= 246 instead.
Message-Id: <20190717111947.30356-5-th...@redhat.com>
Signed-off-by: Thomas Huth
---
People often forget to run the iotests before submitting patches or pull
requests - this is likely due to the fact that we do not run the tests
during our mandatory "make check" tests yet. Now that we've got a proper
"auto" group of iotests that should be fine to run in every environment,
we can en
From: Paolo Bonzini
Opening a block device on NetBSD has an additional step compared to other OSes,
corresponding to raw_normalize_devicepath. The error message in that function
is slightly different from that in raw_open_common and this was causing spurious
failures in qemu-iotests. However, i
Hi Peter,
the following changes since commit afd760539308a5524accf964107cdb1d54a059e3:
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190816'
into staging (2019-08-16 17:21:40 +0100)
are available in the Git repository at:
https://gitlab.com/huth/qemu.git tags/pull-
Patchew URL:
https://patchew.org/QEMU/20190817073628.94473-1-ys...@users.sourceforge.jp/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH v23 00/22] Add RX archtecture support
Message-id: 20190817073628.
Patchew URL:
https://patchew.org/QEMU/20190817073628.94473-1-ys...@users.sourceforge.jp/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH v23 00/22] Add RX archtecture support
Message-id: 20190817073628.
Patchew URL:
https://patchew.org/QEMU/20190817073628.94473-1-ys...@users.sourceforge.jp/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH v23 00/22] Add RX archtecture support
Message-id: 20190817073628.
Patchew URL:
https://patchew.org/QEMU/20190817073628.94473-1-ys...@users.sourceforge.jp/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH v23 00/22] Add RX archtecture support
Message-id: 20190817073628.
17.08.2019. 00.59, "Aleksandar Markovic" је
написао/ла:
>
>
> 16.08.2019. 21.28, "Paul A. Clarke" је написао/ла:
> >
> > From: "Paul A. Clarke"
> >
> > - target/ppc/fpu_helper.c:
> > - helper_todouble() was not properly converting INFINITY from 32 bit
> > float to 64 bit double.
> > - help
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-17-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
pick ed65c02993 target/rx: Add RX to SysEmuTarget
pick 01372568ae tests: Add rx to machine-none-t
renesas_tmr: 8bit timer modules.
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philip
From: Philippe Mathieu-Daudé
Add two tests for the rx-virt machine, based on the recommended test
setup from Yoshinori Sato:
https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg03586.html
- U-Boot prompt
- Linux kernel with Sash shell
These are very quick tests:
$ avocado run -t arch:rx
v21 changes
Add cpu-param.h
Remove CPU_COMMON
rx_load_image move to rx-virt.
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-4-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-4-ys...@users.sourceforge.jp>
Signed-off-by: Richard Hender
From: Philippe Mathieu-Daudé
While the VIRT machine can use different microcontrollers,
the RX62N microcontroller is tied to the RX62N CPU core.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
---
hw/rx/rx-virt.c | 8
1 file changed, 8 insertions(+)
diff --git a/
This part only supported RXv1 instructions.
Instruction manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-2-ys...@users
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-3-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-3-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
[PMD: Removed tlb_fill, extracted from
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-5-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
include/disas/dis-asm.h |5 +
target/rx/disas.c | 1480 +
From: Richard Henderson
Issue an error if no kernel, no bios, and not qtest'ing.
Fixes make check-qtest-rx: test/qom-test.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-16-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signe
This implementation supported only ICUa.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-6-ys...@users.sourcefo
rx62n - RX62N cpu.
rx-virt - RX QEMU virtual target.
v23 changes.
Add missing includes.
v21 changes.
rx_load_image move to rx-virt.c
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-17-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-D
This module supported only non FIFO type.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-8-ys...@users.sourcef
From: Richard Henderson
Collected, to be used in the next patch.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-23-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
From: Richard Henderson
This has consistency with prt_ri(). It loads all data before
beginning output. It uses exactly one call to prt() to emit
the full instruction.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49
Hello.
This patch series is added Renesas RX target emulation.
Changes for v22.
Added some include.
Changes for v21.
rebase latest master.
Remove unneeded hmp_info_tlb.
Chanegs for v20.
Reorderd patches.
Squashed v19 changes.
Changes for v19.
Follow tcg changes.
Cleanup cpu.c.
simplify rx_cpu_c
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-18-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
MAINTAINERS | 19 +++
1 file changed, 19 insertions(+)
diff --git a/MAINTAINER
From: Richard Henderson
Many of the multi-part prints have been eliminated by previous
patches. Eliminate the rest of them.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-22-ys...@users.sourceforge.jp>
Tested-by
From: Philippe Mathieu-Daudé
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-11-ys...@users.sourceforge.jp>
Tested-by: Philippe Math
From: Richard Henderson
We were eliding all zero indexes. It is only ld==0 that does
not have an index in the instruction. This also allows us to
avoid breaking the final print into multiple pieces.
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-1
From: Richard Henderson
There are so many different forms of each RX instruction
that it will be very useful to be able to look at the bytes
to see on which path a bug may lie.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <201906070
Signed-off-by: Yoshinori Sato
---
target/rx/monitor.c | 38 --
target/rx/Makefile.objs | 1 -
2 files changed, 39 deletions(-)
delete mode 100644 target/rx/monitor.c
diff --git a/target/rx/monitor.c b/target/rx/monitor.c
deleted file mode 100644
index 5d
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-10-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/qemu/bitops.h | 38 +
From: Richard Henderson
Note that the ld == 3 case handled by prt_ldmi is decoded as
XCHG_rr and cannot appear here.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-21-ys...@users.sourceforge.jp>
Tested-by: Philip
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