Re: [PATCH rc2 20/25] hw/avr: Add some ATmega microcontrollers

On 1/26/20 3:46 PM, Aleksandar Markovic wrote: On Friday, January 24, 2020, Philippe Mathieu-Daudé > wrote: Add some microcontrollers from the megaAVR family (ATmega series): - middle range: ATmega168 and ATmega328 - high range: ATmega1280 and ATmega2560

Re: [PATCH] target/arm/arm-semi: Don't let the guest close stdin/stdout/stderr

On 1/24/20 8:57 PM, Alex Bennée wrote: Peter Maydell writes: The guest can use the semihosting API to open a handle corresponding to QEMU's own stdin, stdout, or stderr. When the guest closes this handle, we should not close the underlying host stdin/stdout/stderr the way we would do if the ha

Re: Booting Debian in qemu-system-alpha

On 1/24/20 9:52 PM, John Paul Adrian Glaubitz wrote: On 1/24/20 9:19 PM, Richard Henderson wrote: Oh. Hah! I just tried again, cutting and pasting your command-line. You've got unicode quotes, not ascii ' (\x27). That gets passed through to the kernel as-is and prevents console=ttyS0 from be

Re: [PATCH REPOST v3 78/80] hostmem: fix strict bind policy

On Fri, 24 Jan 2020 20:17:48 +0100 Halil Pasic wrote: > On Thu, 23 Jan 2020 12:38:43 +0100 > Igor Mammedov wrote: > > > With main RAM now converted to hostmem backends, there is no > > point in keeping global mem_prealloc around, so alias > > -mem-prealloc to "memory-backend.prealloc=on" > > m

Re: [PATCH rc3 24/30] hw/avr: Add helper to load raw/ELF firmware binaries

23:56 Ned, 26.01.2020. Aleksandar Markovic је написао/ла: > > From: Philippe Mathieu-Daudé > > Add avr_load_firmware() function to load firmware in ELF or > raw binary format. > > [AM: Corrected the type of the variable containing e_flags] > > Suggested-by: Aleksandar Markovic > Signed-off-by: P

Re: [PATCH 0/3] migration: add sztd compression

Hi, Juan I'll read the series soon. Thanks for sending that to me! Denis On 24.01.2020 15:43, Juan Quintela wrote: > Denis Plotnikov wrote: >> zstd date compression algorithm shows better performance on data compression. >> It might be useful to employ the algorithm in VM migration to reduce CP

Re: OpenBIOS update broke Linux boot on qemu-system-sparc64

On 24/01/2020 16:51, Thomas Huth wrote: > Hi Mark, > > today, I noticed that the Sparc64 image from the QEMU advent calendar > 2018 does not work anymore with the recent QEMU: > > https://www.qemu-advent-calendar.org/2018/download/day23.tar.xz > > The Linux kernel now crashes during the boot

Re: [PATCH 0/9] more audio fixes and improvements

On 23/01/2020 07:41, Volker Rümelin wrote: > The first two patches "audio: fix audio_generic_write" and > "audio: fix audio_generic_read" are only compile tested. The > code is only reachable from the DirectSound backend with the > mixing-engine off. I don't know if it is reachable at all. > I can

Re: [PATCH REPOST v3 74/80] exec: cleanup qemu_minrampagesize()/qemu_maxrampagesize()

On Fri, Jan 24, 2020 at 11:25:11AM +0100, Igor Mammedov wrote: > On Thu, 23 Jan 2020 12:38:39 +0100 > Igor Mammedov wrote: > > > Since all RAM is backed by hostmem backends, drop > > global -mem-path invariant and simplify code. > > Looks like origin of removed here code is PPC, > could PPC folk

Re: [PATCH REPOST v3 64/80] ppc/{ppc440_bamboo,sam460ex}: drop RAM size fixup

On Thu, Jan 23, 2020 at 12:38:29PM +0100, Igor Mammedov wrote: > If user provided non-sense RAM size, board will complain and > continue running with max RAM size supported or sometimes > crash like this: > %QEMU -M bamboo -m 1 > exec.c:1926: find_ram_offset: Assertion `size != 0' failed. >

Re: [PATCH REPOST v3 65/80] ppc/{ppc440_bamboo, sam460ex}: use memdev for RAM

On Thu, Jan 23, 2020 at 12:38:30PM +0100, Igor Mammedov wrote: > memory_region_allocate_system_memory() API is going away, so > replace it with memdev allocated MemoryRegion. The later is > initialized by generic code, so board only needs to opt in > to memdev scheme by providing > MachineClass::

Re: [PATCH rc3 02/30] target/avr: Introduce AVR CPU class object

> +static void avr_cpu_initfn(Object *obj) > +{ > +AVRCPU *cpu = AVR_CPU(obj); > + > +cpu_set_cpustate_pointers(cpu); > + > +#ifndef CONFIG_USER_ONLY > +/* Set the number of interrupts supported by the CPU. */ > +qdev_init_gpio_in(DEVICE(cpu), avr_cpu_set_int, > +sizeof(

Re: [PATCH rc2 01/25] target/avr: Add outward facing interfaces and core CPU logic

On Sun, Jan 26, 2020 at 1:15 PM Joaquin de Andres wrote: > > +struct CPUAVRState { > > +uint32_t pc_w; /* 0x003f up to 22 bits */ > > + > > +uint32_t sregC; /* 0x0001 1 bit */ > > +uint32_t sregZ; /* 0x0001 1 bit */ > > +uint32_t sregN; /* 0x0001 1 bit */ > > +

Re: [PATCH] audio/dsound: fix invalid parameters error

On 2020-01-18 07:30, Philippe Mathieu-Daudé wrote: On 1/17/20 7:26 PM, KJ Liew wrote: QEMU Windows has broken dsound backend since the rewrite of audio API in version 4.2.0. Both playback and capture buffers failed to lock with invalid parameters error. Fixes: 7fa9754ac88 (dsoundaudio: port to

[PATCH rc3 27/30] target/avr: Update build system

From: Michael Rolnik Make AVR support buildable Signed-off-by: Michael Rolnik Tested-by: Philippe Mathieu-Daudé Reviewed-by: Aleksandar Markovic Signed-off-by: Richard Henderson Signed-off-by: Aleksandar Markovic --- configure | 7 +++ default-configs/avr-softmmu

[PATCH rc3 23/30] hw/core/loader: Let load_elf populate the processor-specific flags

From: Philippe Mathieu-Daudé Some platforms (like AVR) need to determine cpu type by reading the ELF flags (field e_flags oin ELF header). This patch enables discovery of the content of that flag while using following functions: - load_elf() - load_elf_as() - load_elf_ram() - load_elf_r

[PATCH rc3 30/30] .travis.yml: Run the AVR acceptance tests

From: Philippe Mathieu-Daudé We have one test so far, and it is very fast: $ avocado --show=app run -t arch:avr tests/acceptance/ (1/1) tests/acceptance/machine_avr6.py:AVR6Machine.test_freertos: PASS (2.13 s) RESULTS: PASS 1 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 0 | CANCE

[PATCH rc3 24/30] hw/avr: Add helper to load raw/ELF firmware binaries

From: Philippe Mathieu-Daudé Add avr_load_firmware() function to load firmware in ELF or raw binary format. [AM: Corrected the type of the variable containing e_flags] Suggested-by: Aleksandar Markovic Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Aleksandar Markovic --- hw/avr/Makef

[PATCH rc3 25/30] hw/avr: Add some ATmega microcontrollers

From: Philippe Mathieu-Daudé Add some microcontrollers from the megaAVR family (ATmega series): - middle range: ATmega168 and ATmega328 - high range: ATmega1280 and ATmega2560 For product comparison: https://www.microchip.com/wwwproducts/ProductCompare/ATmega168P/ATmega328P https://www.micr

[PATCH rc3 29/30] tests/acceptance: Test the Arduino MEGA2560 board

From: Michael Rolnik The test is based on https://github.com/seharris/qemu-avr-tests/tree/master/free-rtos/Demo demo which. If working correctly, prints 'ABCDEFGHIJKLMNOPQRSTUVWX' out. it also demostrates that timer and IRQ are working As the path name demonstrates, the FreeRTOS tests target a b

[PATCH rc3 20/30] target/avr: Register AVR support with the rest of QEMU

From: Michael Rolnik Add AVR related definitions into QEMU Signed-off-by: Michael Rolnik Tested-by: Philippe Mathieu-Daudé Reviewed-by: Aleksandar Markovic Signed-off-by: Richard Henderson Signed-off-by: Aleksandar Markovic --- arch_init.c| 2 ++ include/disas/dis-asm.h

[PATCH rc3 16/30] hw/char: Add limited support for Atmel USART peripheral

From: Michael Rolnik These were designed to facilitate testing but should provide enough function to be useful in other contexts. Only a subset of the functions of each peripheral is implemented, mainly due to the lack of a standard way to handle electrical connections (like GPIO pins). Signed-

[PATCH rc3 21/30] target/avr: Add machine none test

From: Michael Rolnik Signed-off-by: Michael Rolnik Tested-by: Philippe Mathieu-Daudé Reviewed-by: Aleksandar Markovic Reviewed-by: Thomas Huth Signed-off-by: Richard Henderson Signed-off-by: Aleksandar Markovic --- tests/qtest/machine-none-test.c | 1 + 1 file changed, 1 insertion(+) diff

[PATCH rc3 19/30] target/avr: Add section about AVR into QEMU documentation

From: Michael Rolnik Explains basic ways of using AVR target in QEMU. Signed-off-by: Michael Rolnik Message-Id: <20200118191416.19934-16-mrol...@gmail.com> Signed-off-by: Richard Henderson [PMD: Fixed typos] Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Aleksandar Markovic --- qemu-d

[PATCH rc3 02/30] target/avr: Introduce AVR CPU class object

From: Michael Rolnik This introduces AVR CPU class object and its bacis elements and functions. Co-developed-by: Michael Rolnik Co-developed-by: Sarah Harris Signed-off-by: Michael Rolnik Signed-off-by: Sarah Harris Signed-off-by: Michael Rolnik Acked-by: Igor Mammedov Tested-by: Philippe

[PATCH rc3 26/30] hw/avr: Add some Arduino boards

From: Philippe Mathieu-Daudé Arduino boards are build with AVR chipsets. Add some of the popular boards: - Arduino Duemilanove - Arduino Uno - Arduino Mega For more information: https://www.arduino.cc/en/Main/Products https://store.arduino.cc/arduino-genuino/most-popular Reviewed-by: Igor

[PATCH rc3 18/30] hw/misc: Add Atmel power device

From: Michael Rolnik This is a simple device of just one register, whenver this register is written it calls qemu_set_irq function for each of 8 bits/IRQs.. It is used to implement AVR Power Reduction Signed-off-by: Michael Rolnik Signed-off-by: Philippe Mathieu-Daudé [rth: Squash include fix

[PATCH rc3 11/30] target/avr: Add instruction translation - Data Transfer Instructions

From: Michael Rolnik This includes: - MOV, MOVW - LDI, LDS LDX LDY LDZ - LDDY, LDDZ - STS, STX STY STZ - STDY, STDZ - LPM, LPMX - ELPM, ELPMX - SPM, SPMX - IN, OUT - PUSH, POP - XCH - LAS, LAC LAT Signed-off-by: Michael Rolnik Tested-by: Philippe

[PATCH rc3 09/30] target/avr: Add instruction translation - Arithmetic and Logic Instructions

From: Michael Rolnik This includes: - ADD, ADC, ADIW - SBIW, SUB, SUBI, SBC, SBCI - AND, ANDI - OR, ORI, EOR - COM, NEG - INC, DEC - MUL, MULS, MULSU - FMUL, FMULS, FMULSU - DES Signed-off-by: Michael Rolnik Tested-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Signed-off-by: Ale

[PATCH rc3 17/30] hw/timer: Add limited support for Atmel 16 bit timer peripheral

From: Michael Rolnik These were designed to facilitate testing but should provide enough function to be useful in other contexts. Only a subset of the functions of each peripheral is implemented, mainly due to the lack of a standard way to handle electrical connections (like GPIO pins). Signed-

[PATCH rc3 03/30] target/avr: Add migration support

From: Michael Rolnik Add migration functions for AVR cores. Co-developed-by: Michael Rolnik Co-developed-by: Sarah Harris Signed-off-by: Michael Rolnik Signed-off-by: Sarah Harris Signed-off-by: Michael Rolnik Acked-by: Igor Mammedov Tested-by: Philippe Mathieu-Daudé Signed-off-by: Richar

[PATCH rc3 04/30] target/avr: Add GDB support

From: Michael Rolnik This includes GDB hooks for reading from wnd wrtiting to AVR registers, and xml register definition file as well. Co-developed-by: Michael Rolnik Co-developed-by: Sarah Harris Signed-off-by: Michael Rolnik Signed-off-by: Sarah Harris Signed-off-by: Michael Rolnik Acked-

[PATCH rc3 22/30] target/avr: Update MAINTAINERS file

From: Michael Rolnik Include AVR maintaners in MAINTAINERS file Signed-off-by: Michael Rolnik Signed-off-by: Philippe Mathieu-Daudé [rth: Squash ordering fixes from f4bug] Signed-off-by: Richard Henderson Signed-off-by: Aleksandar Markovic --- MAINTAINERS | 24 1 fi

[PATCH rc3 28/30] tests/boot-serial-test: Test some Arduino boards (AVR based)

From: Michael Rolnik Print out 'T' through serial port The Arduino Duemilanove is based on a AVR5 CPU, while the Arduino MEGA2560 on a AVR6 CPU. Signed-off-by: Michael Rolnik Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Acked-by: Thomas Huth Signed-off-by: Philippe

[PATCH rc3 10/30] target/avr: Add instruction translation - Branch Instructions

From: Michael Rolnik This includes: - RJMP, IJMP, EIJMP, JMP - RCALL, ICALL, EICALL, CALL - RET, RETI - CPSE, CP, CPC, CPI - SBRC, SBRS, SBIC, SBIS - BRBC, BRBS Signed-off-by: Michael Rolnik Tested-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Signed-off-

[PATCH rc3 13/30] target/avr: Add instruction translation - MCU Control Instructions

From: Michael Rolnik This includes: - BREAK - NOP - SLEEP - WDR Signed-off-by: Michael Rolnik Signed-off-by: Richard Henderson Signed-off-by: Aleksandar Markovic --- target/avr/insn.decode | 8 ++ target/avr/translate.c | 68 ++

[PATCH rc3 14/30] target/avr: Add instruction translation - CPU main translation function

From: Michael Rolnik Co-developed-by: Richard Henderson Co-developed-by: Michael Rolnik Signed-off-by: Michael Rolnik Tested-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Signed-off-by: Aleksandar Markovic --- target/avr/translate.c | 234

[PATCH rc3 15/30] target/avr: Add instruction disassembly function

From: Michael Rolnik Provide function disassembles executed instruction when `-d in_asm` is provided Example: `./avr-softmmu/qemu-system-avr -bios free-rtos/Demo/AVR_ATMega2560_GCC/demo.elf -d in_asm` will produce something like the following ``` ... IN: 0x014a: CALL 0x38

[PATCH rc3 12/30] target/avr: Add instruction translation - Bit and Bit-test Instructions

From: Michael Rolnik This includes: - LSR, ROR - ASR - SWAP - SBI, CBI - BST, BLD - BSET, BCLR Signed-off-by: Michael Rolnik Tested-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Signed-off-by: Aleksandar Markovic --- target/avr/insn.decode | 14 +++ ta

[PATCH rc3 01/30] target/avr: Add basic parameters for new AVR platform

From: Michael Rolnik This includes definitions of various basic parameters needed for integration of a new platform into QEMU. Co-developed-by: Michael Rolnik Co-developed-by: Sarah Harris Signed-off-by: Michael Rolnik Signed-off-by: Sarah Harris Signed-off-by: Michael Rolnik Acked-by: Igor

[PATCH rc3 06/30] target/avr: Add defintions of AVR core types

From: Michael Rolnik AVR core types are: - avr1 - avr2 - avr25 - avr3 - avr31 - avr35 - avr4 - avr5 - avr51 - avr6 - avrtiny - xmega2 - xmega3 - xmega4 - xmega5 - xmega6 - xmega7 Each core type covers multiple AVR MCUs, mentioned in the comments before definiti

[PATCH rc3 00/30] target/avr merger

From: Aleksandar Markovic This is the AVR port from Michael release (merge) candidate 3. The series can be found also in this repository: https://github.com/AMarkovic/qemu-avr-merger-rc3 History: Since v2: - First patch is split into six smaller logical units (net result remains the same)

[PATCH rc3 08/30] target/avr: Add instruction translation - Registers definition

From: Michael Rolnik Signed-off-by: Michael Rolnik Reviewed-by: Philippe Mathieu-Daudé Tested-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson Signed-off-by: Aleksandar Markovic --- target/avr/translate.c | 171 + 1 file changed, 17

[PATCH rc3 05/30] target/avr: Introduce AVR features

From: Michael Rolnik This patch introduces anumeration "AVRFeature" that will be used for defining AVR core types. Co-developed-by: Michael Rolnik Co-developed-by: Sarah Harris Signed-off-by: Michael Rolnik Signed-off-by: Sarah Harris Signed-off-by: Michael Rolnik Acked-by: Igor Mammedov T

[PATCH rc3 07/30] target/avr: Add instruction helpers

From: Michael Rolnik Stubs for unimplemented instructions and helpers for instructions that need to interact with QEMU. SPM and WDR are unimplemented because they require emulation of complex peripherals. The implementation of SLEEP is very limited due to the lack of peripherals to generate wak

Re: [GSoC/Outreachy QEMU project proposal] Measure and Analyze QEMU Performance

On Wed, Jan 22, 2020 at 12:28 PM Stefan Hajnoczi wrote: > > On Tue, Jan 21, 2020 at 03:07:53PM +0100, Aleksandar Markovic wrote: > > On Mon, Jan 20, 2020 at 3:51 PM Stefan Hajnoczi wrote: > > > > > > On Sat, Jan 18, 2020 at 03:08:37PM +0100, Aleksandar Markovic wrote: > > > > 3) The community wil

Re: Integrating QOM into QAPI

On 26/01/20 10:11, Marc-André Lureau wrote: >> I’m still puzzled as to why anybody would switch to something like >> GObject when there is C++. > C++ is another level of complexity. > > Replacing QOM with GObject would mainly bring us a more solid type > system with better tooling/features, gobjec

Re: Integrating QOM into QAPI

On Sun, 26 Jan 2020 at 08:10, Christophe de Dinechin wrote: > I’m still puzzled as to why anybody would switch to something like > GObject when there is C++. I'm fairly strongly against using C++. C++'s language design is an "everything including the kitchen sink, lots of "this is here for back c

Re: [PATCH rc2 20/25] hw/avr: Add some ATmega microcontrollers

On Friday, January 24, 2020, Philippe Mathieu-Daudé wrote: > Add some microcontrollers from the megaAVR family (ATmega series): > > - middle range: ATmega168 and ATmega328 > - high range: ATmega1280 and ATmega2560 > > For product comparison: > https://www.microchip.com/wwwproducts/ProductCompar

[Bug 1860914] [NEW] QEMU prepends pathnames to command lines of Multiboot kernels and modules, contrary to the specification

Public bug reported: When QEMU is launched with the -kernel option to boot a Multiboot image, the command line passed in the -append option is additionally prefixed the pathname of the kernel image and a space. Likewise, module command lines passed in the -initrd option are passed with the module

High rate of MMIO causes KVM stall

Hi All, I have run into what appears to be a race condition in Qemu with regards to iommu access involving atomic reads performed by a userspace application in the guest virtual machine with a VFIO passthrough GPU. While polling a memory mapped IO address on the ivshmem device at a high rate

Re: [PATCH rc2 01/25] target/avr: Add outward facing interfaces and core CPU logic

Hi! In this mail I only checked the general code and one of the listed features for the different types of avr. I will check the rest in following emails. On 1/24/20 1:51 AM, Philippe Mathieu-Daudé wrote: > From: Michael Rolnik > > This includes: > - CPU data structures > - object model classes

Re: Integrating QOM into QAPI

Hi On Sun, Jan 26, 2020 at 9:10 AM Christophe de Dinechin wrote: > > > > > On 21 Jan 2020, at 16:11, Marc-André Lureau > > wrote: > > > > Hi > > > > On Tue, Jan 21, 2020 at 7:01 PM Markus Armbruster wrote: > >> > >> Daniel P. Berrangé writes: > >> > >>> On Tue, Jan 21, 2020 at 02:36:17PM +010

Re: Integrating QOM into QAPI

> On 21 Jan 2020, at 16:11, Marc-André Lureau > wrote: > > Hi > > On Tue, Jan 21, 2020 at 7:01 PM Markus Armbruster wrote: >> >> Daniel P. Berrangé writes: >> >>> On Tue, Jan 21, 2020 at 02:36:17PM +0100, Markus Armbruster wrote: Marc-André Lureau writes: > Hi >