hi all.
are there any news / updates about AVR support?
On Mon, Mar 23, 2020 at 10:14 PM Michael Rolnik wrote:
> thanks Philippe.
>
> On Mon, Mar 23, 2020 at 9:20 PM Philippe Mathieu-Daudé
> wrote:
>
>> On 3/23/20 7:03 PM, Richard Henderson wrote:
>> > On 3/23/20 10:03 AM, Michael Rolnik wrote
With GByteArray, we should pass the object itself but not to plus an offset.
gdb log:
Thread 1 "qemu-system-x86" received signal SIGSEGV, Segmentation fault.
__memmove_avx_unaligned_erms () at
../sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S:384
384 ../sysdeps/x86_64/multiarch/memmove
On 4/11/20 3:57 PM, Nicholas Piggin wrote:
> Nicholas Piggin's on April 11, 2020 7:32 pm:
>> Nathan Chancellor's on April 11, 2020 10:53 am:
>>> The tt.config values are needed to reproduce but I did not verify that
>>> ONLY tt.config was needed. Other than that, no, we are just building
>>> either
CC: Alex Bennée
The one for m68k is already queued by Alex.
Thanks,
Laurent
Le 12/04/2020 à 12:44, Changbin Du a écrit :
> With GByteArray, we should pass the object itself but not to plus an offset.
>
> gdb log:
> Thread 1 "qemu-system-x86" received signal SIGSEGV, Segmentation fault.
> __memm
On 4/11/20 2:46 PM, lixinyu wrote:
> OPC_SYNC_WMB, OPC_SYNC_MB, OPC_SYNC_ACQUIRE, OPC_SYNC_RELEASE and
> OPC_SYNC_RMB have wrong encode. According to the mips manual,
> their encode should be 'OPC_SYNC | 0x?? << 6' rather than
> 'OPC_SYNC | 0x?? << 5'. Wrong encode can lead illegal instruction
> er
On 4/10/20 4:45 PM, sundeep.l...@gmail.com wrote:
> From: Subbaraya Sundeep
>
> With SmartFusion2 Ethernet MAC model in
> place this patch adds the same to SoC.
>
> Signed-off-by: Subbaraya Sundeep
> ---
> hw/arm/msf2-soc.c | 21 -
> include/hw/arm/msf2-soc.h | 3 +
On 4/10/20 4:45 PM, sundeep.l...@gmail.com wrote:
> From: Subbaraya Sundeep
>
> In addition to simple serial test this patch uses ping
> to test the ethernet block modelled in SmartFusion2 SoC.
>
> Signed-off-by: Subbaraya Sundeep
> ---
> tests/acceptance/boot_linux_console.py | 15 ++-
/* * We default to false if we know other options have been enabled *
which are currently incompatible with MTTCG. Otherwise when each *
guest (target) has been updated to support: * - atomic instructions
* - memory ordering primitives (barriers) * they can set the
appropriate CONFIG flags in $
Hi Sundeep,
On 4/10/20 4:45 PM, sundeep.l...@gmail.com wrote:
> From: Subbaraya Sundeep
>
> Modelled Ethernet MAC of Smartfusion2 SoC.
> Micrel KSZ8051 PHY is present on Emcraft's
> SOM kit hence same PHY is emulated.
>
> Signed-off-by: Subbaraya Sundeep
> ---
> MAINTAINERS|
On 4/11/20 11:36 PM, Peter Maydell wrote:
> On Sat, 11 Apr 2020 at 20:45, Philippe Mathieu-Daudé wrote:
>> Buffer overflows are security issues because they allow attacker to
>> arbitrarily write data in the process memory, and eventually take
>> control of it. When attacker takes control, it can
On Sun, 12 Apr 2020 at 21:46, Oliver Christopher wrote:
>
> /*
> * We default to false if we know other options have been enabled
> * which are currently incompatible with MTTCG. Otherwise when each
> * guest (target) has been updated to support:
> * - atomic instructions
> * - memory ord
Thank you for the clarification.
On Sun, Apr 12, 2020 at 4:54 PM Peter Maydell
wrote:
> On Sun, 12 Apr 2020 at 21:46, Oliver Christopher
> wrote:
> >
> > /*
> > * We default to false if we know other options have been enabled
> > * which are currently incompatible with MTTCG. Otherwise when e
On Sun, 12 Apr 2020 at 21:53, Philippe Mathieu-Daudé wrote:
> "VMs using KVM" as security boundary is very clear, thanks.
>
> Note 1: This this doesn't appear on the QEMU security process
> description: https://www.qemu.org/contribute/security-process/
It's part of the list of how to decide wheth
On 4/12/20 10:57 PM, Peter Maydell wrote:
> On Sun, 12 Apr 2020 at 21:53, Philippe Mathieu-Daudé wrote:
>> "VMs using KVM" as security boundary is very clear, thanks.
>>
>> Note 1: This this doesn't appear on the QEMU security process
>> description: https://www.qemu.org/contribute/security-proces
The CPU() macro is defined as:
#define CPU(obj) ((CPUState *)(obj))
Remove an unnecessary CPU() cast.
Patch created mechanically using spatch with this script:
@@
typedef CPUState;
CPUState *s;
@@
- CPU(s)
+ s
Signed-off-by: Philippe Mathieu-Daudé
---
target/ppc/mmu_helper.
Remove unnecessary casts using coccinelle scripts.
The CPU()/OBJECT() patches don't introduce logical change,
The DEVICE() one removes various OBJECT_CHECK() calls.
Philippe Mathieu-Daudé (3):
target: Remove unnecessary CPU() cast
various: Remove unnecessary OBJECT() cast
hw: Remove unneces
From: lixinyu
OPC_SYNC_WMB, OPC_SYNC_MB, OPC_SYNC_ACQUIRE, OPC_SYNC_RELEASE and
OPC_SYNC_RMB have wrong encode. According to the mips manual,
their encode should be 'OPC_SYNC | 0x?? << 6' rather than
'OPC_SYNC | 0x?? << 5'. Wrong encode can lead illegal instruction
errors. These instructions ofte
The DEVICE() macro is defined as:
#define DEVICE(obj) OBJECT_CHECK(DeviceState, (obj), TYPE_DEVICE)
Remove unnecessary DEVICE() casts.
Patch created mechanically using spatch with this script:
@@
typedef DeviceState;
DeviceState *s;
@@
- DEVICE(s)
+ s
Signed-off-by: Philippe
The OBJECT() macro is defined as:
#define OBJECT(obj) ((Object *)(obj))
Remove unnecessary OBJECT() casts.
Patch created mechanically using spatch with this script:
@@
typedef Object;
Object *o;
@@
- OBJECT(o)
+ o
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/bus.c
The following changes since commit 17e1e49814096a3daaa8e5a73acd56a0f30bdc18:
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into
staging (2020-04-09 19:00:41 +0100)
are available in the Git repository at:
https://github.com/rth7680/qemu.git tags/pull-tc
Switch to using the qdev gpio API which is preferred over
qemu_allocate_irqs(). One step to eventually deprecate and
remove qemu_allocate_irqs() one day.
Patch created mechanically using spatch with this script
inspired from commit d6ef883d9d7:
@@
typedef qemu_irq;
identifier irqs, handler;
Use a coccinelle script to convert few qemu_allocate_irqs()
calls to the qdev gpio API.
One memory leak removed in hw/openrisc/pic_cpu.c
Philippe Mathieu-Daudé (3):
hw/ide/ahci: Use qdev gpio rather than qemu_allocate_irqs()
hw/mips/mips_int: Use qdev gpio rather than qemu_allocate_irqs()
h
Switch to using the qdev gpio API which is preferred over
qemu_allocate_irqs(). One step to eventually deprecate and
remove qemu_allocate_irqs() one day.
Patch created mechanically using spatch with this script
inspired from commit d6ef883d9d7:
@@
typedef qemu_irq;
identifier irqs, handler;
Switch to using the qdev gpio API which is preferred over
qemu_allocate_irqs(). Doing so we also stop leaking the
allocated memory. One step to eventually deprecate and
remove qemu_allocate_irqs() one day.
Patch created mechanically using spatch with this script
inspired from commit d6ef883d9d7:
ping? rc3 is in 2 days.
On Wed, Apr 8, 2020 at 10:10 AM Philippe Mathieu-Daudé
wrote:
>
> Hi Mansour,
>
> On 4/8/20 2:35 AM, Mansour Ahmadi wrote:
> > Signed-off-by: Mansour Ahmadi
> > ---
> > hw/block/pflash_cfi01.c | 6 +-
> > hw/block/pflash_cfi02.c | 6 +-
> > 2 files changed, 10
On 4/7/20 8:36 PM, Richard Henderson wrote:
> On 4/6/20 10:47 AM, Philippe Mathieu-Daudé wrote:
>> Running the coccinelle script produced:
>>
>> $ spatch \
>> --macro-file scripts/cocci-macro-file.h --include-headers \
>> --sp-file scripts/coccinelle/find-missing-error_propagate.cocci \
>
On 4/6/20 8:00 PM, Eric Blake wrote:
> On 4/6/20 12:46 PM, Philippe Mathieu-Daudé wrote:
>> Coccinelle reported:
>>
>> $ spatch ... --timeout 60 --sp-file \
>> scripts/coccinelle/simplify-init-realize-error_propagate.cocci
>> HANDLING: ./hw/arm/allwinner-a10.c
>> >>> possible moves fr
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/aspeed_ast2600.c
>>> possible moves from aspeed_soc_ast2600_init() to
aspeed_soc_ast2600_realize() in ./hw/arm/aspeed_ast2600.c:243
While reviewi
This series is inspired of Peter Maydell fix [1]:
"hw/arm/xlnx-zynqmp.c: fix some error-handling code",
but grew after v1 [2] review :/
Markus: I added the cocci patches to your Error section, I hope
that's fine :)
Part 1: Simplify error propagation by moving some code from
DeviceClass::r
When a device uses an Error* with data not modified before realize(),
this call can be moved to init(). Add a Coccinelle patch to find such
uses.
Signed-off-by: Philippe Mathieu-Daudé
---
...implify-init-realize-error_propagate.cocci | 69 +++
MAINTAINERS
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/aspeed_ast2600.c
>>> possible moves from aspeed_soc_ast2600_init() to
aspeed_soc_ast2600_realize() in ./hw/arm/aspeed_ast2600.c:243
Move the call
Fixes the following coccinelle warnings:
$ spatch --sp-file --verbose-parsing ... \
scripts/coccinelle/remove_local_err.cocci
...
SUSPICIOUS: a \ character appears outside of a #define at
./target/ppc/translate_init.inc.c:5213
SUSPICIOUS: a \ character appears outside of a #define
Coccinelle failed at processing this file:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/fsl-imx6.c
Fatal error: exception Coccinelle_modules.Common.Timeout
While reviewing we noticed some functions can be called
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/msf2-soc.c
>>> possible moves from m2sxxx_soc_initfn() to m2sxxx_soc_realize() in
./hw/arm/msf2-soc.c:86
While reviewing we notice storing the Me
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/allwinner-a10.c
>>> possible moves from aw_a10_init() to aw_a10_realize() in
./hw/arm/allwinner-a10.c:77
Move the calls using &error_fatal which
Coccinelle failed at processing this file:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/xlnx-zynqmp.c
EXN: Coccinelle_modules.Common.Timeout
Move the calls using &error_abort which don't depend on input
updated b
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/stm32f205_soc.c
>>> possible moves from stm32f205_soc_initfn() to stm32f205_soc_realize() in
./hw/arm/stm32f205_soc.c:83
Move the calls using &er
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/aspeed_soc.c
>>> possible moves from aspeed_soc_init() to aspeed_soc_realize() in
./hw/arm/aspeed_soc.c:231
Move the calls using &error_fatal whi
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/stm32f205_soc.c
>>> possible moves from stm32f205_soc_initfn() to stm32f205_soc_realize() in
./hw/arm/stm32f205_soc.c:83
While reviewing we notic
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/microblaze/xlnx-zynqmp-pmu.c
>>> possible moves from xlnx_zynqmp_pmu_soc_init() to
xlnx_zynqmp_pmu_soc_realize() in ./hw/microblaze/xlnx-zynqmp-pmu.c:
In the previous commit we noticed we don't need two different
Error*, drop the one less used.
Reviewed-by: Cédric Le Goater
Signed-off-by: Philippe Mathieu-Daudé
---
v3: Indent 'return'
---
hw/arm/aspeed_soc.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/hw/
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/pci-host/pnv_phb3.c
>>> possible moves from pnv_phb3_instance_init() to pnv_phb3_realize() in
./hw/pci-host/pnv_phb3.c:992
Move the calls using &erro
Coccinelle failed at processing this file:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/xlnx-zynqmp.c
EXN: Coccinelle_modules.Common.Timeout
We are going to manually add the missing propagate_error() calls.
As th
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/riscv/sifive_e.c
>>> possible moves from riscv_sifive_e_soc_init() to
riscv_sifive_e_soc_realize() in ./hw/riscv/sifive_e.c:135
Move the calls using
Coccinelle failed at processing this file:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/xlnx-zynqmp.c
EXN: Coccinelle_modules.Common.Timeout
We are going to manually add the missing propagate_error() calls.
Some
Coccinelle failed at processing this file:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/arm/fsl-imx6.c
Fatal error: exception Coccinelle_modules.Common.Timeout
While reviewing we notice the smp_cpus count is already
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/riscv/sifive_u.c
>>> possible moves from riscv_sifive_u_soc_init() to
riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473
Move the calls using
We can use a single type_init() to call multiple type_register*().
Signed-off-by: Philippe Mathieu-Daudé
---
hw/riscv/sifive_u.c | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 998666c91f..9c90c94c33 100644
--- a/hw
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: hw/arm/fsl-imx31.c
>>> possible moves from fsl_imx31_init() to fsl_imx31_realize() in
hw/arm/fsl-imx31.c:68
Move the calls using &error_abort which don't
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/riscv/sifive_u.c
>>> possible moves from riscv_sifive_u_soc_init() to
riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473
Move the calls using
This series is inspired of Peter Maydell fix [1]:
"hw/arm/xlnx-zynqmp.c: fix some error-handling code",
but grew after v1 [2] review :/
Markus: I added the cocci patches to your Error section, I hope
that's fine :)
Part 2: Add missing error_propagate() calls in DeviceClass::realize().
Regards,
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \
--keep-comments --smpl-spacing --in-place --dir hw
Reviewed-by: Peter Maydell
Signed-off-by: Philippe Ma
In some DeviceClass::realize() while we can propagate errors
to the caller, we forgot to do so. Add a Coccinelle patch to
automatically add the missing code.
Inspired-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
---
.../use-error_propagate-in-realize.cocci | 54 +
Coccinelle reported:
$ spatch ... --timeout 60 --sp-file \
scripts/coccinelle/simplify-init-realize-error_propagate.cocci
HANDLING: ./hw/riscv/sifive_u.c
>>> possible moves from riscv_sifive_u_soc_init() to
riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473
While reviewing we no
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \
--keep-comments --smpl-spacing --in-place --dir hw
Reviewed-by: Cédric Le Goater
Signed-off-by: Philippe
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \
--keep-comments --smpl-spacing --in-place --dir hw
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/all
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \
--keep-comments --smpl-spacing --in-place --dir hw
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/msf
As there already is the riscv_sifive_u_soc_init() method,
rename riscv_sifive_u_init() as riscv_sifive_u_machine_init().
Signed-off-by: Philippe Mathieu-Daudé
---
hw/riscv/sifive_u.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \
--keep-comments --smpl-spacing --in-place --dir hw
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/arm
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/add-missing-error_propagate.cocci \
--keep-comments --smpl-spacing --in-place --dir hw
Reviewed-by: Peter Maydell
Signed-off-by: Philippe Mathi
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \
--keep-comments --smpl-spacing --in-place --dir hw
Signed-off-by: Philippe Mathieu-Daudé
---
hw/intc/ar
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \
--keep-comments --smpl-spacing --in-place --dir hw
Signed-off-by: Philippe Mathieu-Daudé
---
hw/block/o
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \
--keep-comments --smpl-spacing --in-place --dir hw
Reviewed-by: Alistair Francis
Reviewed-by: Peter Mayd
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \
--keep-comments --smpl-spacing --in-place --dir hw
Signed-off-by: Philippe Mathieu-Daudé
---
hw/microbl
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/add-missing-error_propagate.cocci \
--keep-comments --smpl-spacing --in-place --dir hw
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
In some places in we put an error into a local Error*, but forget
to check for failure and pass it back to the caller.
Add a Coccinelle patch to catch and automatically add the missing
code.
Inspired-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
---
v3: Fixed typo 'provides', let proto
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \
--keep-comments --smpl-spacing --in-place --dir hw
Signed-off-by: Philippe Mathieu-Daudé
---
hw/riscv/s
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/add-missing-error_propagate.cocci \
--keep-comments --smpl-spacing --dir hw
Then review showed this file has a 'xilinx_axidma_realize_fail'
labe
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \
--keep-comments --smpl-spacing --in-place --dir hw
Signed-off-by: Philippe Mathieu-Daudé
---
hw/pci-hos
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/add-missing-error_propagate.cocci \
--keep-comments --smpl-spacing --in-place --dir hw
Reviewed-by: Peter Maydell
Signed-off-by: Philippe Mathi
Running the coccinelle script:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/add-missing-error_propagate.cocci \
--keep-comments --smpl-spacing --dir hw
inserted a block after object_property_set_uint("apic-id") which
calls error
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/add-missing-error_propagate.cocci \
--keep-comments --smpl-spacing --in-place --dir hw
Unfortunately the cocci script doesn't properly patch tra
This series is inspired of Peter Maydell fix [1]:
"hw/arm/xlnx-zynqmp.c: fix some error-handling code",
but grew after v1 [2] review :/
Markus: I added the cocci patches to your Error section, I hope
that's fine :)
Part 3: Use &error_abort/&error_fatal in instance_init().
Regards,
Phil.
[1] ht
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/add-missing-error_propagate.cocci \
--keep-comments --smpl-spacing --dir hw
Then review showed this file has a 'xilinx_enet_realize_fail'
label
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/add-missing-error_propagate.cocci \
--keep-comments --smpl-spacing --dir hw
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-of
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/add-missing-error_propagate.cocci \
--keep-comments --smpl-spacing --dir hw
Reviewed-by: David Gibson
Acked-by: David Gibson
Reviewed-by: Pete
Patch created mechanically by running:
$ spatch \
--macro-file scripts/cocci-macro-file.h --include-headers \
--sp-file scripts/coccinelle/add-missing-error_propagate.cocci \
--keep-comments --smpl-spacing --dir hw
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/milkymist-memcard.
On Sun, Apr 12, 2020 at 11:29:43PM +0200, Philippe Mathieu-Daudé wrote:
> Switch to using the qdev gpio API which is preferred over
> qemu_allocate_irqs(). Doing so we also stop leaking the
> allocated memory. One step to eventually deprecate and
> remove qemu_allocate_irqs() one day.
>
> Patch cr
On Sun, Apr 12, 2020 at 02:58:56PM +0200, Laurent Vivier wrote:
> CC: Alex Bennée
>
> The one for m68k is already queued by Alex.
>
Great. I will send x86 fix only. Thanks!
> Thanks,
> Laurent
>
--
Cheers,
Changbin Du
With GByteArray, we should pass the object itself but not to plus an offset.
gdb log:
Thread 1 "qemu-system-x86" received signal SIGSEGV, Segmentation fault.
__memmove_avx_unaligned_erms () at
../sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S:384
384 ../sysdeps/x86_64/multiarch/memmove
Patchew URL: https://patchew.org/QEMU/20200412212943.4117-1-f4...@amsat.org/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
export AR
Patchew URL: https://patchew.org/QEMU/20200412212943.4117-1-f4...@amsat.org/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/b
Patchew URL: https://patchew.org/QEMU/20200412223619.11284-1-f4...@amsat.org/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/
Hi,
This patch " COLO: Optimize memory back-up process " should only affects VM's
migration process before COLO compare starting to work.
Have you tried to revert this patch to see if it affects your tests ?
For memory size we used for secondary qemu, we only need a backup of VM's ram,
so it sh
Patchew URL: https://patchew.org/QEMU/20200412224144.12205-1-f4...@amsat.org/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/
This patchset introduces a migration_version attribute under sysfs of VFIO
Mediated devices.
This migration_version attribute is used to check migration compatibility
between two mdev devices.
Currently, it has two locations:
(1) under mdev_type node,
which can be used even before device crea
migration_version attribute is used to check migration compatibility
between two mdev devices of the same mdev type.
The key is that it's rw and its data is opaque to userspace.
Userspace reads migration_version of mdev device at source side and
writes the value to migration_version attribute of m
This patch implements the mdev_type part of migration_version attribute
for Intel's vGPU mdev devices.
migration_version attribute under mdev_type node is rw.
It is located at
/sys/class/mdev_bus/:00:02.0/mdev_supported_types/$MDEV_TYPE/
or
/sys/devices/pci:00/:00:02.0/mdev_supported_t
migration_version attribute is used to check migration compatibility
between two mdev devices of the same mdev type.
The key is that it's rw and its data is opaque to userspace.
Userspace reads migration_version of mdev device at source side and
writes the value to migration_version attribute of m
mdev device par of migration_version attribute for Intel vGPU is rw.
It is located at
/sys/bus/pci/devices/\:00\:02.0/$mdev_UUID/migration_version,
or /sys/bus/mdev/devices/$mdev_UUID/migration_version
It's used to check migration compatibility for two vGPUs.
migration_version string is define
patch 1 modifies handler of ram device memory regions to drop guest writes
to read-only ram device memory regions
patch 2 modifies handler of non-mmap'd read-only vfio regions to drop guest
writes to those regions
patch 3 set read-only flag to mmap'd read-only vfio regions, so that guest
writes
for ram device regions, drop guest writes if the regions is read-only.
Signed-off-by: Yan Zhao
Signed-off-by: Xin Zeng
---
memory.c | 6 +-
trace-events | 2 +-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/memory.c b/memory.c
index 601b749906..a380b59980 100644
--- a/m
for vfio regions that are without write permission,
drop guest writes to those regions.
Signed-off-by: Yan Zhao
Signed-off-by: Xin Zeng
---
hw/vfio/common.c | 8 +++-
hw/vfio/trace-events | 2 +-
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/hw/vfio/common.c b/hw/vfio/c
along side setting host page table to be read-only, the memory regions
are also required to be read-only, so that when guest writes to the
read-only & mmap'd regions, vmexits would happen and region write handlers
are called.
Signed-off-by: Yan Zhao
Signed-off-by: Xin Zeng
---
hw/vfio/common.c
AVX512_VP2INTERSECT compute vector pair intersection to a pair
of mask registers, which is introduced with intel Tiger Lake,
defining as CPUID.(EAX=7,ECX=0):EDX[bit 08].
Refer to the following release spec:
https://software.intel.com/sites/default/files/managed/c5/15/\
architecture-instruction-set
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