There is a very low probability that hitting physical NVMe disk
hardware critical warning case, it's hard to write & test a monitor
agent service.
For debugging purposes, add a new 'smart_critical_warning' property
to emulate this situation.
Test with this patch:
1, append 'smart_critical_warning
On 11/01/21 08:29, Stefan Weil wrote:
Am 11.01.21 um 08:04 schrieb Thomas Huth:
On 08/01/2021 19.30, Joshua Watt wrote:
On 1/8/21 1:25 AM, Thomas Huth wrote:
On 07/01/2021 22.38, Joshua Watt wrote:
There are two cases that need to be accounted for when compiling QEMU
for MinGW32:
1) A sta
+ Eric W. Biederman
Eric's email was filtered by my server for some reason so I can't
directly reply to it, this is the closest thread relative I could answer on.
On 01/12/2020 12:00, Eric W. Biederman wrote:
>
>
> On 27.11.20 19:26, Catangiu, Adrian Costin wrote:
>> - Background
>>
>> The VM Gen
For now the switch of vfio dirty page tracking is integrated into
the vfio_save_handler, it causes some problems [1].
The object of dirty tracking is guest memory, but the object of
the vfio_save_handler is device state. This mixed logic produces
unnecessary coupling and conflicts:
1. Coupling: T
Am 11.01.21 um 08:04 schrieb Thomas Huth:
On 08/01/2021 19.30, Joshua Watt wrote:
On 1/8/21 1:25 AM, Thomas Huth wrote:
On 07/01/2021 22.38, Joshua Watt wrote:
There are two cases that need to be accounted for when compiling QEMU
for MinGW32:
1) A standalone distribution, where QEMU is sel
On 08/01/2021 19.30, Joshua Watt wrote:
On 1/8/21 1:25 AM, Thomas Huth wrote:
On 07/01/2021 22.38, Joshua Watt wrote:
There are two cases that need to be accounted for when compiling QEMU
for MinGW32:
1) A standalone distribution, where QEMU is self contained and
extracted by the user,
-- Forwarded message -
From: Shreyansh Chouhan
Date: Mon, 11 Jan 2021 at 11:59
Subject: Re: VirtioSound device emulation implementation
To: Gerd Hoffmann
On Sun, 10 Jan 2021 at 13:55, Shreyansh Chouhan <
chouhan.shreyansh2...@gmail.com> wrote:
> Hi,
>
> I have been reading ab
If previous write commands write the same length of data with the same step,
we view it as a hint.
Signed-off-by: Qiuhao Li
Reviewed-by: Alexander Bulekov
Tested-by: Alexander Bulekov
---
scripts/oss-fuzz/minimize_qtest_trace.py | 56
1 file changed, 56 insertions(+)
-M1: remove IO commands iteratively
-M2: try setting bits in operand of write/out to zero
Signed-off-by: Qiuhao Li
Reviewed-by: Alexander Bulekov
Tested-by: Alexander Bulekov
---
scripts/oss-fuzz/minimize_qtest_trace.py | 30
1 file changed, 26 insertions(+), 4 deletio
Simplifying the crash cases by opportunistically setting bits in operands of
out/write to zero may help to debug, since usually bit one means turn on or
trigger a function while zero is the default turn-off setting.
Tested Bug 1908062.
Signed-off-by: Qiuhao Li
Reviewed-by: Alexander Bulekov
Tes
Now we use a one-time scan and remove strategy in the minimizer,
which is not suitable for timing dependent instructions.
For example, instruction A will indicate an address where the config
chunk locates, and instruction B will make the configuration active.
If we have the following instruction s
Currently, we split the write commands' data from the middle. If it does not
work, try to move the pivot left by one byte and retry until there is no
space.
But, this method has two flaws:
1. It may fail to trim all unnecessary bytes on the right side.
For example, there is an IO write command:
Instead of removing IO instructions one by one, we can try deleting multiple
instructions at once. According to the locality of reference, we double the
number of instructions to remove for the next round and recover it to one
once we fail.
This patch is usually significant for large input.
Test
We spend much time waiting for the timeout program during the minimization
process until it passes a time limit. This patch hacks the CLOSED (indicates
the redirection file closed) notification in QTest's output if it doesn't
crash.
Test with quadrupled trace input at:
https://bugs.launchpad.net
Extend and refine the crash case minimization process.
Test input:
Bug 1909261 full_reproducer
6500 QTest instructions (write mostly)
Refined (-M1 minimization level) vs. Original version:
real 38m31.942s <-- real 532m57.192s
user 28m18.188s <-- user 89m0.536s
sys 12m42.239s <-
I have a question, does this support/test on Windows?
On Mon, Jan 11, 2021 at 1:08 PM Jagannathan Raman
wrote:
>
> Hi
>
> This is the v16 of the patchset. Thank you for your time reviewing v15.
>
> This version has the following changes:
>
> [PATCH v16 04/20] multi-process: Add config option for
Initializes the message handler function in the remote process. It is
called whenever there's an event pending on QIOChannel that registers
this function.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
include/hw/
x-remote-machine object sets up various subsystems of the remote
device process. Instantiate PCI host bridge object and initialize RAM, IO &
PCI memory regions.
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
Reviewed-by: Stefan Hajnoczi
---
inclu
From: Elena Ufimtseva
Adds qio_channel_writev_full_all() to transmit both data and FDs.
Refactors existing code to use this helper.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
Acked-by: Daniel P. Berrangé
---
in
IOHUB object is added to manage PCI IRQs. It uses KVM_IRQFD
ioctl to create irqfd to injecting PCI interrupts to the guest.
IOHUB object forwards the irqfd to the remote process. Remote process
uses this fd to directly send interrupts to the guest, bypassing QEMU.
Signed-off-by: John G Johnson
Si
Add ProxyMemoryListener object which is used to keep the view of the RAM
in sync between QEMU and remote process.
A MemoryListener is registered for system-memory AddressSpace. The
listener sends SYNC_SYSMEM message to the remote process when memory
listener commits the changes to memory, the remot
Retrieve PCI configuration info about the remote device and
configure the Proxy PCI object based on the returned information
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
hw/remote/proxy.c | 84 ++
From: Elena Ufimtseva
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Reviewed-by: Stefan Hajnoczi
---
include/hw/remote/mpqemu-link.h | 4
hw/remote/mpqemu-link.c | 34 ++
2 files changed, 38 inserti
From: John G Johnson
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
docs/devel/index.rst | 1 +
docs/devel/multi-process.rst | 966 +++
MAINTAINERS
From: Elena Ufimtseva
Perform device reset in the remote process when QEMU performs
device reset. This is required to reset the internal state
(like registers, etc...) of emulated devices
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by
Proxy device object implements handler for PCI BAR writes and reads.
The handler uses BAR_WRITE/BAR_READ message to communicate to the
remote process with the BAR address and value to be written/read.
The remote process implements handler for BAR_WRITE/BAR_READ
message.
Signed-off-by: Jagannathan
Associate the file descriptor for a PCIDevice in remote process with
DeviceState object.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
hw/remote/remote-obj.c | 203
From: Elena Ufimtseva
Defines MPQemuMsg, which is the message that is sent to the remote
process. This message is sent over QIOChannel and is used to
command the remote process to perform various tasks.
Define transmission functions used by proxy and by remote.
Signed-off-by: Jagannathan Raman
From: Elena Ufimtseva
The Proxy Object sends the PCI config space accesses as messages
to the remote process over the communication channel
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Reviewed-by: Stefan Hajnoczi
---
include/hw/remote/mpqemu
PCI host bridge is setup for the remote device process. It is
implemented using remote-pcihost object. It is an extension of the PCI
host bridge setup by QEMU.
Remote-pcihost configures a PCI bus which could be used by the remote
PCI device to latch on to.
Signed-off-by: Jagannathan Raman
Signed-
From: Elena Ufimtseva
Defines a PCI Device proxy object as a child of TYPE_PCI_DEVICE.
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Reviewed-by: Stefan Hajnoczi
---
include/hw/remote/proxy.h | 33
hw/remote/proxy.c |
SyncSysMemMsg message format is defined. It is used to send
file descriptors of the RAM regions to remote device.
RAM on the remote device is configured with a set of file descriptors.
Old RAM regions are deleted and new regions, each with an fd, is
added to the RAM.
Signed-off-by: Jagannathan Ram
Allow RAM MemoryRegion to be created from an offset in a file, instead
of allocating at offset of 0 by default. This is needed to synchronize
RAM between QEMU & remote process.
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Signed-off-by: Elena Ufimtseva
Reviewed-by: Stefan Hajn
From: Elena Ufimtseva
Adds qio_channel_readv_full_all_eof() and qio_channel_readv_full_all()
to read both data and FDs. Refactors existing code to use these helpers.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
---
include/io/channel.h | 51 ++
Add configuration options to enable or disable multiprocess QEMU code
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Signed-off-by: Elena Ufimtseva
Reviewed-by: Stefan Hajnoczi
---
configure | 10 ++
meson.build | 4 +++-
Kconfig.host | 4
hw/
Hi
This is the v16 of the patchset. Thank you for your time reviewing v15.
This version has the following changes:
[PATCH v16 04/20] multi-process: Add config option for multi-process QEMU
- Using “default_feature” value to enable/disable multiprocess
[PATCH v16 07/20] io: add qio_channel_wri
From: Elena Ufimtseva
Adds documentation explaining the command-line arguments needed
to use multi-process.
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-by: John G Johnson
Reviewed-by: Stefan Hajnoczi
---
docs/multi-process.rst | 64
Additional information: This error occurs only if spice is compiled as
module (`--enable-modules`) and spice parameters are supplied from file
with `-readconfig /path/to/file` . If spice parameters are supplied from
the command line (`-spice param1=a,param2=b`) , an error does not occur.
Possible
On Sun, Jan 10, 2021 at 01:08:54PM -0800, Hill Ma wrote:
> This prevents illegal instruction on cpus do not support xgetbv.
>
> Buglink: https://bugs.launchpad.net/qemu/+bug/1758819
> Signed-off-by: Hill Ma
> ---
> v2: xgetbv() modified based on feedback.
>
> target/i386/hvf/x86_cpuid.c | 28 +
On Sun, Jan 10, 2021 at 08:38:36AM -1000, Richard Henderson wrote:
> On 1/10/21 8:34 AM, Richard Henderson wrote:
> > On 1/9/21 3:46 PM, Roman Bolshakov wrote:
> >> +static int xgetbv(uint32_t cpuid_ecx, uint32_t idx, uint64_t *xcr)
> >> {
> >> -uint32_t eax, edx;
> >> +uint32_t xcrl, xcrh
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1776096
Title:
qemu 2.12.0
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1777301
Title:
Boot failed
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1777232
Title:
NVME fails
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1778473
Title:
[Crash] qem
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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Title:
NVME is mis
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1903712
Title:
when ../con
This is OSS-Fuzz Issue 26797
=== Reproducer ===
cat << EOF | ./qemu-system-i386 -machine q35 \
-device virtio-blk,drive=disk0 \
-drive file=null-co://,id=disk0,if=none,format=raw \
-serial none -monitor none -qtest stdio -nographic
outl 0xcf8 0x80001890
outl 0xcfc 0x4
outl 0xcf8 0x8000188a
outl 0
On Sun, Jan 10, 2021 at 4:16 PM Philippe Mathieu-Daudé
wrote:
>
> Commit dfbd0b873a8 inadvertently swapped the arguments
> of _aligned_malloc(), correct it to fix [*]:
>
>
G_TEST_SRCDIR=C:/Users/ContainerAdministrator/AppData/Local/Temp/cirrus-ci-build/tests
>
G_TEST_BUILDDIR=C:/Users/ContainerAdm
In commit dfbd0b873a85021c083d9b4b84630c3732645963, the use of
_aligned_malloc are called with wrong parameter order, fixed it.
Signed-off-by: Yonggang Luo
---
util/oslib-win32.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/util/oslib-win32.c b/util/oslib-win32.c
index 83b
On 2021/01/11 6:32, Philippe Mathieu-Daudé wrote:
> On 1/10/21 7:23 PM, Richard Henderson wrote:
>> On 1/9/21 6:10 PM, Wataru Ashihara wrote:
>>> This fixes the build with --enable-tcg-interpreter:
>>>
>>> clang -Ilibqemu-arm-softmmu.fa.p -I. -I.. -Itarget/arm -I../target/arm
>>> -I../dtc/libfdt
Philippe, Richard, thank you for reviewing.
On 2021/01/11 1:17, Philippe Mathieu-Daudé wrote:
> Cc'ing Stefan.
>
> On 1/10/21 5:10 AM, Wataru Ashihara wrote:
>> This fixes the build with --enable-tcg-interpreter:
>>
>> clang -Ilibqemu-arm-softmmu.fa.p -I. -I.. -Itarget/arm -I../target/arm
>> -
On Sun, Jan 10, 2021 at 3:19 PM Volker Rümelin wrote:
>
> > We do not need or want to be allocating page sized quanta.
> >
> > Reviewed-by: Philippe Mathieu-Daudé
> > Reviewed-by: Stefan Weil
> > Message-Id: <20201018164836.1149452-1-richard.hender...@linaro.org>
> > Signed-off-by: Philippe Math
On 210110 2119, Qiuhao Li wrote:
> We spend much time waiting for the timeout program during the minimization
> process until it passes a time limit. This patch hacks the CLOSED (indicates
> the redirection file closed) notification in QTest's output if it doesn't
> crash.
>
> Test with quadrupled
Public bug reported:
Hello,
Using hypervisor fuzzer, hyfuzz, I found an assertion failure through
virtio-blk emulator.
A malicious guest user/process could use this flaw to abort the QEMU
process on the host, resulting in a denial of service.
This was found in version 5.2.0 (master)
```
qemu-
> -Original Message-
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Friday, January 8, 2021 7:43 PM
> To: ganqixin
> Cc: QEMU Developers ; QEMU Trivial
> ; Beniamino Galvani ;
> Antony Pavlov ; Igor Mitsyanko
> ; sundeep subbaraya ;
> Jan Kiszka ; Chenqun (kuhn)
> ; Zhangh
On Sun, 2021-01-10 at 11:00 -0500, Alexander Bulekov wrote:
> On 210110 2110, Qiuhao Li wrote:
> > On Wed, 2021-01-06 at 23:18 -0500, Alexander Bulekov wrote:
> > > On 201229 1240, Qiuhao Li wrote:
> > > > We spend much time waiting for the timeout program during the
> > > > minimization
> > > > pr
The bug is still present so changing the status back to New.
** Changed in: qemu
Status: Expired => New
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https://bugs.launchpad.net/bugs/1658141
Title:
QEMU's default msrs hand
This bug is still present.
However the "ignore_msrs=1" workaround does not work with QEmu 3.1 anymore. To
prevent Windows 10 from crashing one must upgrade QEmu to 5.0.14.
--
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devel-ml, which is subscribed to QEMU.
https://bugs.
On Mon, Jan 11, 2021, at 3:25 AM, BALATON Zoltan wrote:
> On Sun, 10 Jan 2021, Philippe Mathieu-Daudé wrote:
> > +PCI experts
> >
> > On 1/10/21 1:43 AM, BALATON Zoltan wrote:
> >> On Sun, 10 Jan 2021, Philippe Mathieu-Daudé wrote:
[...]
> > I'm not a PCI expert but my understanding is PCI dev
On Mon, Jan 11, 2021, at 8:36 AM, Huacai Chen wrote:
> I think R_END should be 0x60, Jiaxun, what do you think?
U r right.
The manual is misleading.
Thanks.
- Jiaxun
>
> Huacai
>
> On Mon, Jan 11, 2021 at 5:51 AM BALATON Zoltan wrote:
> >
> > On Sun, 10 Jan 2021, Philippe Mathieu-Daudé wr
On Tue, Sep 01, 2020 at 12:40:42PM +0200, Philippe Mathieu-Daudé wrote:
> We call pci_register_root_bus() to register 4 IRQs with the
> ppc4xx_pci_set_irq() handler. As it can only be called with
> values in the [0-4[ range, replace the pointless warning by
> an assert().
>
> Signed-off-by: Philip
On Sat, Dec 12, 2020 at 12:15:33AM +, Peter Maydell wrote:
> Switch the bamboo board to directly creating and configuring the UIC,
> rather than doing it via the old ppcuic_init() helper function.
>
> Signed-off-by: Peter Maydell
> ---
> hw/ppc/ppc440_bamboo.c | 38 ++
I think R_END should be 0x60, Jiaxun, what do you think?
Huacai
On Mon, Jan 11, 2021 at 5:51 AM BALATON Zoltan wrote:
>
> On Sun, 10 Jan 2021, Philippe Mathieu-Daudé wrote:
> > Hi Peter, Huacai,
> >
> > On 1/10/21 8:49 PM, Peter Maydell wrote:
> >> On Sun, 3 Jan 2021 at 21:11, Philippe Mathieu-D
Commit dfbd0b873a8 inadvertently swapped the arguments
of _aligned_malloc(), correct it to fix [*]:
G_TEST_SRCDIR=C:/Users/ContainerAdministrator/AppData/Local/Temp/cirrus-ci-build/tests
G_TEST_BUILDDIR=C:/Users/ContainerAdministrator/AppData/Local/Temp/cirrus-ci-build/build/tests
tests/te
> We do not need or want to be allocating page sized quanta.
>
> Reviewed-by: Philippe Mathieu-Daudé
> Reviewed-by: Stefan Weil
> Message-Id: <20201018164836.1149452-1-richard.hender...@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé
> Signed-off-by: Richard Henderson
> ---
> util/oslib-wi
> Patchew URL:
> https://patchew.org/QEMU/9315afe5-5958-c0b4-ea1e-14769511a...@t-online.de/
>
>
>
> Hi,
>
> This series seems to have some coding style problems. See output below for
> more information:
>
> Type: series
> Message-id: 9315afe5-5958-c0b4-ea1e-14769511a...@t-online.de
> Subject: [PAT
On Sun, 10 Jan 2021, Philippe Mathieu-Daudé wrote:
Hi Peter, Huacai,
On 1/10/21 8:49 PM, Peter Maydell wrote:
On Sun, 3 Jan 2021 at 21:11, Philippe Mathieu-Daudé wrote:
From: Huacai Chen
As suggested by Philippe Mathieu-Daudé, rework Loongson's liointc:
1, Move macro definitions to loongso
Hi Peter, Huacai,
On 1/10/21 8:49 PM, Peter Maydell wrote:
> On Sun, 3 Jan 2021 at 21:11, Philippe Mathieu-Daudé wrote:
>>
>> From: Huacai Chen
>>
>> As suggested by Philippe Mathieu-Daudé, rework Loongson's liointc:
>> 1, Move macro definitions to loongson_liointc.h;
>> 2, Remove magic values a
On 1/10/21 7:23 PM, Richard Henderson wrote:
> On 1/9/21 6:10 PM, Wataru Ashihara wrote:
>> This fixes the build with --enable-tcg-interpreter:
>>
>> clang -Ilibqemu-arm-softmmu.fa.p -I. -I.. -Itarget/arm -I../target/arm
>> -I../dtc/libfdt -I../capstone/include/capstone -Iqapi -Itrace -Iui
>> -
Hi Alex,
happy new year,
I am trying to get check-tcg to run reliably,
as I am doing some substantial refactoring of tcg cpu operations, so I need to
verify that TCG is fine.
This is an overall getting started question, is there a how-to on how to use
check-tcg and how to fix things when thing
This prevents illegal instruction on cpus do not support xgetbv.
Buglink: https://bugs.launchpad.net/qemu/+bug/1758819
Signed-off-by: Hill Ma
---
v2: xgetbv() modified based on feedback.
target/i386/hvf/x86_cpuid.c | 28 +++-
1 file changed, 19 insertions(+), 9 deletion
On 1/10/21 6:51 PM, Richard Henderson wrote:
> On 1/10/21 6:27 AM, Philippe Mathieu-Daudé wrote:
>> The tcg_out* functions are utility routines that may or
>> may not be used by a particular backend. Similarly to commit
>> 4196dca63b8, mark them with the 'unused' attribute to suppress
>> spurious w
Hi; Coverity has just come up with a new warning (CID 1438968) about
an unchecked error return value in the 9pfs code. (I'm not sure why
now -- the code in question is unchanged since 2011; probably some
other callsites changed enough to trigger the "other callsites check
return value" heuristic.)
On Fri, 18 Dec 2020 at 06:01, Alistair Francis wrote:
>
> Instead of using string compares to determine if a RISC-V machine is
> using 32-bit or 64-bit CPUs we can use the initalised CPUs. This avoids
> us having to maintain a list of CPU names to compare against.
>
> This commit also fixes the na
On Sun, 3 Jan 2021 at 21:11, Philippe Mathieu-Daudé wrote:
>
> From: Huacai Chen
>
> As suggested by Philippe Mathieu-Daudé, rework Loongson's liointc:
> 1, Move macro definitions to loongson_liointc.h;
> 2, Remove magic values and use macros instead;
> 3, Replace dead D() code by trace events.
>
On Sun, 10 Jan 2021, Philippe Mathieu-Daudé wrote:
+PCI experts
On 1/10/21 1:43 AM, BALATON Zoltan wrote:
On Sun, 10 Jan 2021, Philippe Mathieu-Daudé wrote:
Hi Zoltan,
On 1/9/21 9:16 PM, BALATON Zoltan wrote:
Currently the ISA devices that are part of the VIA south bridge,
superio chip are w
On Sat, Jan 9, 2021 at 1:51 AM Peter Maydell
wrote:
>
> On Fri, 8 Jan 2021 at 15:36, Peter Maydell
wrote:
> >
> > Nothing too exciting, but does include the last bits of v8.1M support
work.
> >
> > -- PMM
> >
> > The following changes since commit
e79de63ab1bd1f6550e7b915e433bec1ad1a870a:
> >
> >
Signed-off-by: Alexey Baturo
---
target/riscv/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 19398977d3..234401c3c6 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -499,6 +499,7 @@ static void riscv_cpu_realize(DeviceState *de
Signed-off-by: Alexey Baturo
Reviewed-by: Richard Henderson
---
target/riscv/cpu.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index d50f09b757..19398977d3 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -287,
Signed-off-by: Alexey Baturo
---
target/riscv/cpu.c | 3 +
target/riscv/cpu.h | 12 ++
target/riscv/cpu_bits.h | 66 ++
target/riscv/csr.c | 271
4 files changed, 352 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/
From: Anatoly Parshintsev
Signed-off-by: Anatoly Parshintsev
Reviewed-by: Richard Henderson
---
target/riscv/cpu.h | 19 +++
target/riscv/translate.c | 34 --
2 files changed, 51 insertions(+), 2 deletions(-)
diff --git a/target/riscv/cpu.
Hi folks,
Sorry it took me almost 3 month to provide the reply and fixes: it was a really
busy EOY.
This series contains fixed @Alistair suggestion on enabling J-ext.
As for @Richard comments:
- Indeed I've missed appending review-by to the approved commits. Now I've
restored them except for th
Signed-off-by: Alexey Baturo
Reviewed-by: Richard Henderson
---
target/riscv/cpu.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 6339e84819..d152842e37 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -72,6 +72,7 @@
#define RVS RV
Signed-off-by: Alexey Baturo
---
target/riscv/insn_trans/trans_rva.c.inc | 3 +++
target/riscv/insn_trans/trans_rvd.c.inc | 2 ++
target/riscv/insn_trans/trans_rvf.c.inc | 2 ++
target/riscv/insn_trans/trans_rvi.c.inc | 2 ++
target/riscv/translate.c| 14 ++
5 file
On 1/10/21 8:34 AM, Richard Henderson wrote:
> On 1/9/21 3:46 PM, Roman Bolshakov wrote:
>> +static int xgetbv(uint32_t cpuid_ecx, uint32_t idx, uint64_t *xcr)
>> {
>> -uint32_t eax, edx;
>> +uint32_t xcrl, xcrh;
>>
>> -__asm__ volatile ("xgetbv"
>> - : "=a" (eax),
On 1/9/21 3:46 PM, Roman Bolshakov wrote:
> +static int xgetbv(uint32_t cpuid_ecx, uint32_t idx, uint64_t *xcr)
> {
> -uint32_t eax, edx;
> +uint32_t xcrl, xcrh;
>
> -__asm__ volatile ("xgetbv"
> - : "=a" (eax), "=d" (edx)
> - : "c" (xcr));
>
On 1/9/21 1:34 PM, Philippe Mathieu-Daudé wrote:
> Use the dedicated X86Seg enum type for segment registers.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> target/i386/cpu.h| 4 ++--
> target/i386/gdbstub.c| 2 +-
> target/i386/tcg/seg_helper.c | 8
> target/i386/
On 1/9/21 6:10 PM, Wataru Ashihara wrote:
> This fixes the build with --enable-tcg-interpreter:
>
> clang -Ilibqemu-arm-softmmu.fa.p -I. -I.. -Itarget/arm -I../target/arm
> -I../dtc/libfdt -I../capstone/include/capstone -Iqapi -Itrace -Iui
> -Iui/shader -I/usr/include/pixman-1 -I/usr/include/g
Hello Brijesh,
On 05/01/2021 18:39, Brijesh Singh wrote:
The SEV FW >= 0.23 added a new command that can be used to query the
attestation report containing the SHA-256 digest of the guest memory
and VMSA encrypted with the LAUNCH_UPDATE and sign it with the PEK.
Note, we already have a command
On 1/10/21 6:27 AM, Philippe Mathieu-Daudé wrote:
> The tcg_out* functions are utility routines that may or
> may not be used by a particular backend. Similarly to commit
> 4196dca63b8, mark them with the 'unused' attribute to suppress
> spurious warnings if they aren't used.
>
> This fixes the bu
On 10/13/20 4:55 PM, Philippe Mathieu-Daudé wrote:
> On 10/13/20 4:38 PM, Claudio Fontana wrote:
>> This series now unbreaks current non-tcg builds
>> (!CONFIG_TCG).
>>
>> tests Makefiles need to avoid relying on all non-native
>> archs binaries to be present,
>>
>> bios-tables-test needs to skip t
Split the current GCC build-tci job in 2, and use Clang
compiler in the new job.
Signed-off-by: Philippe Mathieu-Daudé
---
RFC in case someone have better idea to optimize can respin this patch.
.gitlab-ci.yml | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff -
The tcg_out* functions are utility routines that may or
may not be used by a particular backend. Similarly to commit
4196dca63b8, mark them with the 'unused' attribute to suppress
spurious warnings if they aren't used.
This fixes the build with --enable-tcg-interpreter:
[98/151] Compiling C obj
Fix the build failure reported by Wataru Ashihara on [*]
and add a CI test to catch future problems.
[*] https://www.mail-archive.com/qemu-devel@nongnu.org/msg771326.html
Philippe Mathieu-Daudé (2):
tcg: Mark more tcg_out*() functions with attribute 'unused'
gitlab-ci: Add a job building TCI
Cc'ing Stefan.
On 1/10/21 5:10 AM, Wataru Ashihara wrote:
> This fixes the build with --enable-tcg-interpreter:
>
> clang -Ilibqemu-arm-softmmu.fa.p -I. -I.. -Itarget/arm -I../target/arm
> -I../dtc/libfdt -I../capstone/include/capstone -Iqapi -Itrace -Iui
> -Iui/shader -I/usr/include/pixman-1
On 210110 2110, Qiuhao Li wrote:
> On Wed, 2021-01-06 at 23:18 -0500, Alexander Bulekov wrote:
> > On 201229 1240, Qiuhao Li wrote:
> > > We spend much time waiting for the timeout program during the
> > > minimization
> > > process until it passes a time limit. This patch hacks the CLOSED
> > > (i
On Fri, Jan 8, 2021 at 2:02 AM Cédric Le Goater wrote:
>
> On 1/8/21 5:21 AM, 罗勇刚(Yonggang Luo) wrote:
> >
> >
> > On Fri, Jan 8, 2021 at 5:54 AM Cédric Le Goater > wrote:
> >>
> >> On 1/7/21 8:14 PM, 罗勇刚(Yonggang Luo) wrote:
> >> > This is the first patch,:
> >> > It's store MSR bits differntly f
Extend and refine the crash case minimization process.
Test input:
Bug 1909261 full_reproducer
6500 QTest instructions (write mostly)
Refined (-M1 minimization level) vs. Original version:
real 38m31.942s <-- real 532m57.192s
user 28m18.188s <-- user 89m0.536s
sys 12m42.239s <-
If previous write commands write the same length of data with the same step,
we view it as a hint.
Signed-off-by: Qiuhao Li
Reviewed-by: Alexander Bulekov
Tested-by: Alexander Bulekov
---
scripts/oss-fuzz/minimize_qtest_trace.py | 56
1 file changed, 56 insertions(+)
Currently, we split the write commands' data from the middle. If it does not
work, try to move the pivot left by one byte and retry until there is no
space.
But, this method has two flaws:
1. It may fail to trim all unnecessary bytes on the right side.
For example, there is an IO write command:
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