On Thu, Mar 11, 2021 at 5:32 AM Georg Kotheimer
wrote:
>
> According to the specification the "field SPVP of hstatus controls the
> privilege level of the access" for the hypervisor virtual-machine load
> and store instructions HLV, HLVX and HSV.
>
> Signed-off-by: Georg Kotheimer
Reviewed-by: A
* Stefan Hajnoczi (stefa...@redhat.com) wrote:
> On Tue, Feb 09, 2021 at 07:02:16PM +, Dr. David Alan Gilbert (git) wrote:
> > From: "Dr. David Alan Gilbert"
> >
> > Define a new slave command 'VHOST_USER_SLAVE_FS_IO' for a
> > client to ask qemu to perform a read/write from an fd directly
>
On 16/03/2021 17:25, BALATON Zoltan wrote:
On Tue, 16 Mar 2021, Mark Cave-Ayland wrote:
On 16/03/2021 13:06, BALATON Zoltan wrote:
The PATCH 1 doesn't seem to be needed to have a working Pegasos 2 machine, does
it?
It is needed (as well as all other patches in the series). Patch 1 is needed
On Thu, Mar 11, 2021 at 4:49 AM Georg Kotheimer
wrote:
>
> Signed-off-by: Georg Kotheimer
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/csr.c | 7 ---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index fd2e6363
On Sun, Feb 21, 2021 at 10:31 AM Jim Shu wrote:
>
> If PMP permission of any address has been changed by updating PMP entry,
> flush all TLB pages to prevent from getting old permission.
>
> Signed-off-by: Jim Shu
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/pmp.c | 4
>
On Sun, Feb 21, 2021 at 10:31 AM Jim Shu wrote:
>
> Like MMU translation, add qemu log of PMP permission checking for
> debugging.
>
> Signed-off-by: Jim Shu
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu_helper.c | 12
> 1 file changed, 12 insertions(+)
>
> dif
On Fri, Feb 12, 2021 at 10:44 AM LIU Zhiwei wrote:
>
> Signed-off-by: LIU Zhiwei
Acked-by: Alistair Francis
Alistair
> ---
> target/riscv/helper.h | 8 +++
> target/riscv/insn32-64.decode | 4 --
> target/riscv/insn32.decode | 10
> target/risc
Several QOM type names contain ',':
ARM,bitband-memory
etraxfs,pic
etraxfs,serial
etraxfs,timer
fsl,imx25
fsl,imx31
fsl,imx6
fsl,imx6ul
fsl,imx7
grlib,ahbpnp
grlib,apbpnp
grlib,apbuart
grlib,gptimer
grlib,irqmp
qemu,register
SUNW,bpp
Fat-fingered, will resend. Sorry for the noise!
Drop the crap deprecated in commit a1b40bda08 "blockdev: Deprecate
-drive with bogus interface type" (v5.1.0).
Signed-off-by: Markus Armbruster
Reviewed-by: Daniel P. Berrangé
Reviewed-by: John Snow
Message-id: 20210309161214.1402527-5-arm...@redhat.com
Signed-off-by: John Snow
---
docs/syste
Patchew URL: https://patchew.org/QEMU/20210316183035.9424-1-cfont...@suse.de/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210316183035.9424-1-cfont...@suse.de
Subject: [PATCH v27 00/20] i386 cleanup PART 2
=== TES
On 3/16/21 6:21 PM, Dr. David Alan Gilbert wrote:
> Hi,
> I've got a half-baked idea, which I thought might be worth mentioning.
>
> How hard would it be to give qemu a usbredir server rather than client?
> It would have nothing guest visible but would look logically like the
> front (?) half of
Almost all QOM type names consist only of letters, digits, '-', '_',
and '.'. Just two contain ':': "qemu:memory-region" and
"qemu:iommu-memory-region". Neither can be plugged with -object.
Rename them to "memory-region" and "iommu-memory-region".
Signed-off-by: Markus Armbruster
Message-Id: <2
Drop the crap deprecated in commit 4a27a638e7 "fdc: Deprecate
configuring floppies with -global isa-fdc" (v5.1.0).
Signed-off-by: Markus Armbruster
Reviewed-by: Daniel P. Berrangé
Reviewed-by: John Snow
Message-id: 20210309161214.1402527-3-arm...@redhat.com
Signed-off-by: John Snow
---
docs/s
put the KVM-specific and TCG-specific functionality
in the respective subdirectories kvm/ and tcg/
Signed-off-by: Claudio Fontana
---
target/arm/cpu-sve.h | 2 +-
target/arm/kvm/cpu-sve.h | 30 +++
target/arm/tcg/cpu-sve.h | 24 ++
target/arm/cpu-sve.c | 166 +
On Mon, Mar 15, 2021 at 4:24 PM Gerd Hoffmann wrote:
>
> On Mon, Mar 15, 2021 at 12:29:16PM +0100, Vitaly Chipounov wrote:
> > On Mon, Mar 15, 2021 at 8:21 AM Gerd Hoffmann wrote:
> > >
> > > If your guest has no virtio driver use stdvga instead of running
> > > virtio-vga permanently in vga comp
Skip the test_device_intro_concrete for now for ARM KVM-only build,
as on ARM we currently build devices for ARM that are not
compatible with a KVM-only build.
We can remove this workaround when we fix this in KConfig etc,
and we only list and build machines that are compatible with KVM
for KVM-on
The following changes since commit 6e31b3a5c34c6e5be7ef60773e607f189eaa15f3:
Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into
staging (2021-03-16 10:53:47 +)
are available in the Git repository at:
git://repo.or.cz/qemu/armbru.git tags/pull-qom-fdc-2021-03-16
sve_tests_sve_max_vq_8,
sve_tests_sve_off,
test_query_cpu_model_expansion
all require TCG to run. Skip them for KVM-only builds.
Signed-off-by: Claudio Fontana
---
tests/qtest/arm-cpu-features.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/tests/qtest/arm-cpu-features.c
Commit 4a27a638e7 "fdc: Deprecate configuring floppies with -global
isa-fdc" actually deprecated any use of floppy controller driver
properties, not just with -global. Correct the deprecation note
accordingly.
Fixes: 4a27a638e718b445648de6b27c709353551d9b44
Signed-off-by: Markus Armbruster
Revie
Hello, this problem is resolved when using Meson 0.57.1, as suggested by
bonzini on #qemu (OFTC).
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1919253
Title:
QEMU doesn't build reproducibly anymor
The QEMU PSCI implementation is not used for KVM,
we do not need the kvm constants header.
Signed-off-by: Claudio Fontana
---
target/arm/arm-powerctl.h | 2 --
target/arm/psci.c | 1 -
2 files changed, 3 deletions(-)
diff --git a/target/arm/arm-powerctl.h b/target/arm/arm-powerctl.h
ind
extract the SVE-related cpu object properties and functions,
and move them to a separate module.
Disentangle SVE from pauth that is a separate, TCG-only feature.
Signed-off-by: Claudio Fontana
---
target/arm/cpu-sve.h | 40 +
target/arm/cpu.h | 20 +--
target/arm/cpu-sve.c
The previous commit rendered the name fdctrl_connect_drives() somewhat
misleading. Get rid of it by inlining the (now pretty simple)
function into its only caller.
Signed-off-by: Markus Armbruster
Reviewed-by: Daniel P. Berrangé
Reviewed-by: John Snow
Message-id: 20210309161214.1402527-4-arm..
and adapt the code including the header references,
and trace-events / trace.h
Signed-off-by: Claudio Fontana
---
meson.build | 2 +-
target/arm/cpu.h | 2 +-
target/arm/{ => kvm}/kvm-consts.h | 0
target/arm/{ => kvm}/kvm_arm.h| 0
target/arm/kvm/t
Signed-off-by: Claudio Fontana
---
target/arm/cpu.c | 4
target/arm/kvm/kvm-cpu.c | 1 +
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 3d6501c2c5..ac01fa0bae 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -786,10 +786
Hi Thomas,
Sorry for the late reply.
On Wed, Mar 10, 2021 at 2:49 AM Thomas Huth wrote:
>
> On 09/03/2021 23.27, Philippe Mathieu-Daudé wrote:
> > ping?
>
> I guess we really need someone who could act as a maintainer for the
> tests/acceptance directory, who could pick up patches and send pull
provide helper functions there to initialize 32bit models,
and export the a15 cpu model.
We still need to keep around a15 until we sort out the board configurations.
cpu.c will continue to contain the common parts between
32 and 64.
Note that we need to build cpu32 also for TARGET_AARCH64,
becau
we need to be careful not to use
if (tcg_enabled())
here, because of the VMSTATE definitions in machine.c,
which are only protected by CONFIG_TCG, and thus
it would break the --enable-tcg --enable-kvm build.
Signed-off-by: Claudio Fontana
---
target/arm/tcg/tcg-cpu.h| 1 +
target/arm/
this function is used for kvm too, add it to the
cpu-common module.
Signed-off-by: Claudio Fontana
---
target/arm/cpu-common.c | 11 +++
target/arm/tcg/helper.c | 11 ---
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/target/arm/cpu-common.c b/target/arm/cpu-com
move the call for sysemu specifically in machine_run_board_init,
mirror the calling sequence for user mode too.
Suggested-by: Paolo Bonzini
Signed-off-by: Claudio Fontana
---
bsd-user/main.c | 2 +-
hw/core/machine.c | 1 +
linux-user/main.c | 2 +-
softmmu/vl.c | 1 -
4 files changed, 3
On Tue, 16 Mar 2021 18:33:47 +0100
Paolo Bonzini wrote:
> On 16/03/21 17:49, Igor Mammedov wrote:
> > | smm=on | smm=off|
> > --
> > QEMU6.0 pc-i440fx-5.2 |pass| pass |
> > defaut smm-compat=on |
it is required by arch-dump.c and cpu.c, so apparently
we need this for KVM too
Signed-off-by: Claudio Fontana
---
target/arm/cpu-common.c | 43 +
target/arm/tcg/helper.c | 33 ---
2 files changed, 43 insertions(+), 33 deletions
on ARM we currently list and build all machines, even when
building KVM-only, without TCG.
Until we fix this (and we only list and build machines that are
compatible with KVM), only test specifically using the "virt"
machine in this case.
Signed-off-by: Claudio Fontana
Cc: Philippe Mathieu-Daudé
* Philippe Mathieu-Daudé (phi...@redhat.com) wrote:
> On 3/16/21 6:21 PM, Dr. David Alan Gilbert wrote:
> > Hi,
> > I've got a half-baked idea, which I thought might be worth mentioning.
> >
> > How hard would it be to give qemu a usbredir server rather than client?
> > It would have nothing gue
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/cpu-common.c | 42 +
target/arm/tcg/helper.c | 41
2 files changed, 42 insertions(+), 41 deletions(-)
diff --git a/target/arm/cpu-common.
This reverts commit 6e937ba7f8fb90d66cb3781f7fed32fb4239556a
This change breaks quickly at startup, as all interfaces in boards
are checked in vl.c in select_machine():
{
GSList *machines = object_class_get_list(TYPE_MACHINE, false);
}
In order to restrict v8M IDAU to TCG,
we need to first disa
while on x86 all CPU classes can use the same set of TCGCPUOps,
on ARM the right accel behavior depends on the type of the CPU.
So we need a way to specialize the accel behavior according to
the CPU. Therefore, add a second initialization, after the
accel_cpu->cpu_class_init, that allows to do thi
start by moving minimal init and realizefn code.
Signed-off-by: Claudio Fontana
Cc: Paolo Bonzini
---
target/arm/tcg/tcg-cpu.h| 4 ++-
target/arm/cpu.c| 38 +++
target/arm/tcg/sysemu/tcg-cpu.c | 27 +++
target/arm/tcg/tcg-cpu-mode
cpu.c,
cpu32.c,
cpu64.c,
tcg/sysemu/tcg-cpu.c,
all need a good cleanup when it comes to included header files.
Signed-off-by: Claudio Fontana
---
target/arm/cpu.c| 8 ++--
target/arm/cpu32.c | 14 --
target/arm/cpu64.c | 6 --
targ
on ARM we currently list and build all machines, even when
building KVM-only, without TCG.
Until we fix this (and we only list and build machines that are
compatible with KVM), only test specifically using the "virt"
machine in this case.
Signed-off-by: Claudio Fontana
Cc: Philippe Mathieu-Daudé
start by moving minimal init and realizefn code.
Signed-off-by: Claudio Fontana
---
target/arm/internals.h | 1 -
target/arm/cpu-sysemu.c| 32 --
target/arm/cpu.c | 43 +++--
target/arm/kvm/kvm-cpu.c | 122 +
target/arm/
We do not move psci.c to tcg/ because we expect other
hypervisors to use it (waiting for HVF enablement).
Signed-off-by: Claudio Fontana
Cc: Alexander Graf
---
target/arm/meson.build | 4
1 file changed, 4 insertions(+)
diff --git a/target/arm/meson.build b/target/arm/meson.build
index 01
test is TCG-only.
Signed-off-by: Claudio Fontana
Cc: Philippe Mathieu-Daudé
---
tests/qtest/bios-tables-test.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index e020c83d2a..bd7b85909c 100644
--- a/tests/qtest/bios-ta
There might be more than just KVM and TCG in the future,
so where appropriate, replace broad "else" statements
with the appropriate if (accel_enabled()) check.
Also invert some checks for !kvm_enabled() or !tcg_enabled()
where it seems appropriate to do so.
Note that to make qtest happy we need t
After this patch it is possible to build only kvm:
./configure --disable-tcg --enable-kvm
Signed-off-by: Claudio Fontana
---
target/arm/cpu-sysemu.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/target/arm/cpu-sysemu.c b/target/arm/cpu-sysemu.c
index eb928832a
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
[claudio: moved vec_internal.h and op_addsub.h to tcg/ too]
Signed-off-by: Claudio Fontana
---
meson.build | 1 +
target/arm/{ => tcg}/op_addsub.h | 0
target/arm/tcg/trace.h | 1 +
tar
and arm_phys_excp_target_el since it is tied up inside the
same #ifdef block.
aarch64_sync_32_to_64 and aarch64_sync_64_to_32 are
mixed in with the TCG helpers, but they shouldn't, as they
are needed for KVM too.
kvm_arch_get_registers()
{
if (!is_a64(env)) {
aarch64_sync_64_to_32(env
we need this for KVM too.
Signed-off-by: Claudio Fontana
---
target/arm/cpu-sysemu.c | 60
target/arm/cpu-user.c | 5
target/arm/tcg/helper.c | 61 -
3 files changed, 65 insertions(+), 61 deletions(-)
diff
Signed-off-by: Claudio Fontana
Reviewed-by: Philippe Mathieu-Daudé
---
target/arm/cpu-sysemu.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/target/arm/cpu-sysemu.c b/target/arm/cpu-sysemu.c
index 126263dbf4..eb928832a9 100644
--- a/target/arm/cpu-sysemu.
cpu-vfp.c: vfp_get_fpsr and vfp_set_fpsr are needed also for KVM,
so create a new cpu-vfp.c
tcg/cpu-vfp.c: vfp_get_fpscr_from_host and vv are TCG-only, so we
move the implementation to tcg/cpu-vfp.c
kvm/helper-stubs.c: vfp_get_fpscr_from_host and vv stubs for KVM.
Signe
move exception code out of tcg/
as we need part of it for KVM too.
put the exception code into separate cpu modules as appropriate,
including:
cpu-sysemu.c
tcg/tcg-cpu.c
tcg/sysemu/tcg-cpu.c
to avoid naming confusion with the existing cpu_tcg.c,
containg cpu models definitions for 32bit TCG-only
Signed-off-by: Claudio Fontana
Cc: Paolo Bonzini
Reviewed-by: Richard Henderson
---
target/i386/gdbstub.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
index 4ad1295425..098a2ad15a 100644
--- a/target/i386/gdbstub.c
+++ b/target/i3
at least the armv7m one should go away with proper
configuration changes (only enabling possible boards for KVM).
Signed-off-by: Claudio Fontana
---
target/arm/kvm/helper-stubs.c | 27 +++
target/arm/kvm/meson.build| 3 +++
target/arm/meson.build| 1 +
3 fil
16.03.2021 19:08, Roman Kagan wrote:
On Mon, Mar 15, 2021 at 11:15:44PM +0300, Vladimir Sementsov-Ogievskiy wrote:
15.03.2021 09:06, Roman Kagan wrote:
As the reconnect logic no longer interferes with drained sections, it
appears unnecessary to explicitly manipulate the in_flight counter.
Fixe
this should go away once the configuration and hw/arm is clean
Signed-off-by: Claudio Fontana
---
hw/arm/boot.c | 5 -
target/arm/arm-powerctl.c | 8 +---
target/arm/kvm/helper-stubs.c | 6 ++
3 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/hw/arm/
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/i386/cpu-internal.h | 70 +++
target/i386/cpu-sysemu.c | 352 +
target/i386/cpu.c | 385 +
target/i386/meson.build| 1 +
4 files chan
we need as a result to move switch_mode too,
so we put an implementation into cpu_user and cpu_sysemu.
Signed-off-by: Claudio Fontana
---
target/arm/cpu.h| 2 +
target/arm/cpu-common.c | 192 +++
target/arm/cpu-sysemu.c | 30 ++
target/arm/cpu-user.
Signed-off-by: Claudio Fontana
---
target/arm/cpregs.h | 54 ++---
target/arm/cpregs.c | 60 ++
target/arm/tcg/cpregs.c | 253 ++--
3 files changed, 241 insertions(+), 126 deletions(-)
diff --git a/target/arm/cpregs.h b/target/arm/cpregs.
of note, cpreg lists were previously initialized by TCG first,
and then thrown away and replaced with the data coming from KVM.
Now we just initialize once, either for TCG or for KVM.
Signed-off-by: Claudio Fontana
---
target/arm/cpu.c | 32 ++--
target/arm/kvm.c
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/i386/tcg/excp_helper.c| 572 --
target/i386/tcg/sysemu/excp_helper.c | 581 +++
target/i386/tcg/user/excp_helper.c | 39 ++
target/i386/tcg/sysemu/meson.build |
Signed-off-by: Claudio Fontana
---
target/arm/cpu-mmu.c| 95 +
target/arm/tcg/helper.c | 95 -
2 files changed, 95 insertions(+), 95 deletions(-)
diff --git a/target/arm/cpu-mmu.c b/target/arm/cpu-mmu.c
index f46
Signed-off-by: Claudio Fontana
---
target/arm/cpu-mmu.h| 3 +-
target/arm/cpu-mmu-sysemu.c | 149
2 files changed, 101 insertions(+), 51 deletions(-)
diff --git a/target/arm/cpu-mmu.h b/target/arm/cpu-mmu.h
index fdedc8fb92..01b060613a 100644
--- a/
create a separate tcg/sysemu/fpu_helper.c for the sysemu-only parts.
For user mode, some small #ifdefs remain in tcg/fpu_helper.c
which do not seem worth splitting into their own user-mode module.
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/i386/cpu.h
Signed-off-by: Claudio Fontana
---
target/arm/cpu-common.c | 41 +
target/arm/tcg/helper.c | 29 -
target/arm/meson.build | 1 +
3 files changed, 42 insertions(+), 29 deletions(-)
create mode 100644 target/arm/cpu-common.c
di
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/{ => tcg}/translate-a64.h | 0
target/arm/{ => tcg}/translate.h | 0
target/arm/{ => tcg}/a32-uncond.decode| 0
target/arm/{ => tcg}/a32.decode | 0
target/arm/{ => tcg}/m-nocp.decode
Here a new version of the series that enables kvm-only builds.
The goal here is to enable the KVM-only build.
In this iteration, SVE AARCH64 CPU properties have been
refactored slightly, to split the functionality from cpu to
cpu-sve first, and then putting the accel-specific stuff
in tcg/ and kvm
Hi.
I have a question about adding
a network device.
qemu-system-arm -machine vexpress-a9 \
-net nic,model=lan9118 -net user ...
works for me, but 'man qemu-system-arm'
says this is "Legacy option".
Is there any new (or recommended) form
to use a lan9118 device?
If I understand correctly,
move work is needed later on to split things into
tcg-specific portions and kvm-specific portions of this
Signed-off-by: Claudio Fontana
---
target/arm/internals.h | 8 ++-
target/arm/cpu-sysemu.c | 105
target/arm/cpu.c| 83 --
the lack of target_user_arch makes it hard to fully leverage the
build system in order to separate user code from sysemu code.
Provide it, so that we can avoid the proliferation of #ifdef
in target code.
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
[claudio: added changes for new ta
cpu_load_efer is now used only for sysemu code.
Therefore, move this function implementation to
sysemu-only section of helper.c
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/i386/cpu.h| 20 +---
target/i386/helper.c | 13 +
2 files cha
Signed-off-by: Claudio Fontana
---
target/arm/tcg/meson.build| 3 +++
target/arm/tcg/sysemu/meson.build | 3 +++
target/arm/tcg/user/meson.build | 3 +++
3 files changed, 9 insertions(+)
create mode 100644 target/arm/tcg/sysemu/meson.build
create mode 100644 target/arm/tcg/user/meson.
i386 is the first user of AccelCPUClass, allowing to split
cpu.c into:
cpu.ccpuid and common x86 cpu functionality
host-cpu.c host x86 cpu functions and "host" cpu type
kvm/kvm-cpu.cKVM x86 AccelCPUClass
hvf/hvf-cpu.cHVF x86 AccelCPUClass
tcg/tcg-cpu.cTCG x86 AccelCPU
For now we just copy over the previous user stubs, but really,
everything that requires s->cpl == 0 should be impossible
to trigger from user-mode emulation.
Later on we should add a check that asserts this easily f.e.:
static bool check_cpl0(DisasContext *s)
{
int cpl = s->cpl;
#ifdef CON
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/i386/tcg/helper-tcg.h| 5 +
target/i386/tcg/seg_helper.h| 66
target/i386/tcg/seg_helper.c| 233 +---
target/i386/tcg/sysemu/seg_helper.c | 125 +++
ta
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/arm/tcg/meson.build | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build
index 0bd4e9d954..3b4146d079 100644
--- a/target/arm/tcg/meson.build
+++
v26 -> v27: rebased on latest master
v25 -> v26:
* i386: separate fpu_helper into user and sysemu parts
- removed the splitting of the user mode into their own user/fpu_helper.c,
seems not worth it.
v24 -> v25:
* i386: separate fpu_helper into user and sysemu parts
- added 2 preliminary pa
a number of registers are read as 64bit under the condition that
(hflags & HF_CS64_MASK) || TARGET_X86_64)
and a number of registers are written as 64bit under the condition that
(hflags & HF_CS64_MASK).
Provide some auxiliary functions that do that.
Signed-off-by: Claudio Fontana
Cc: Paolo Bon
for user-mode, assert that the hidden IOBPT flags are not set
while attempting to generate io_bpt helpers.
Signed-off-by: Claudio Fontana
Cc: Paolo Bonzini
Reviewed-by: Richard Henderson
---
target/i386/helper.h| 7 +
target/i386/tcg/helper-tcg.h| 3 +
target/i386/t
From: Richard Henderson
The helper_* functions must use GETPC() to unwind from TCG.
The cpu_x86_* functions cannot, and directly calling the
helper_* functions is a bug. Split out new functions that
perform the work and can be used by both.
Signed-off-by: Richard Henderson
Reviewed-by: Philipp
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/i386/tcg/misc_helper.c| 463 ---
target/i386/tcg/sysemu/misc_helper.c | 438 +
target/i386/tcg/user/misc_stubs.c| 75 +
target/i386/tcg/sysemu/meson.build |
Signed-off-by: Claudio Fontana
Reviewed-by: Richard Henderson
---
target/i386/tcg/tcg-cpu.h | 24 +
target/i386/tcg/sysemu/tcg-cpu.c | 83 ++
target/i386/tcg/tcg-cpu.c | 75 ++-
target/i386/tcg/meson.build|
smm is only really useful for sysemu, split in two modules
around the CONFIG_USER_ONLY, in order to remove the ifdef
and use the build system instead.
add cpu_abort() when detecting attempts to enter SMM mode via
SMI interrupt in user-mode, and assert that the cpu is not
in SMM mode while translat
avoid open coding the accesses to cpu->accel_cpu interfaces,
and instead introduce:
accel_cpu_instance_init,
accel_cpu_realizefn
to be used by the targets/ initfn code,
and by cpu_exec_realizefn respectively.
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderso
move the check for phys_bits outside of host_cpu_adjust_phys_bits,
because otherwise it is impossible to return an error condition
explicitly.
Signed-off-by: Claudio Fontana
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
target/i386/host-cpu.c
16.03.2021 19:03, Roman Kagan wrote:
On Mon, Mar 15, 2021 at 11:10:14PM +0300, Vladimir Sementsov-Ogievskiy wrote:
15.03.2021 09:06, Roman Kagan wrote:
The reconnection logic doesn't need to stop while in a drained section.
Moreover it has to be active during the drained section, as the request
overall, all devices' realize functions take an Error **errp, but return void.
hw/core/qdev.c code, which realizes devices, therefore does:
local_err = NULL;
dc->realize(dev, &local_err);
if (local_err != NULL) {
goto fail;
}
However, we can improve at least accel_cpu to return a meaningful
move the call to accel_cpu->cpu_realizefn to the general
cpu_exec_realizefn from target/i386, so it does not need to be
called for every target explicitly as we enable more targets.
Signed-off-by: Claudio Fontana
Reviewed-by: Alex Bennée
Reviewed-by: Richard Henderson
---
cpu.c |
From: Richard Henderson
Change the prefix from "helper" to "do". The former should be
reserved for those functions that are called from TCG; the latter
is in use within the file already for those functions that are
called from the helper functions, adding a "retaddr" argument.
Signed-off-by: Ri
On 3/16/21 6:29 PM, Eric Blake wrote:
> On 3/16/21 12:24 PM, Philippe Mathieu-Daudé wrote:
>> Introduce the 'query-accels' QMP command which returns a list
>> of built-in accelerator names.
>>
>> - Accelerator is a QAPI enum of all existing accelerators,
>>
>> - AcceleratorInfo is a QAPI structure
On 3/16/21 9:49 AM, Rebecca Cran wrote:
+for (page = addr; page < (addr + length); page += TARGET_PAGE_SIZE) {
This test means that it's impossible to flush the last page of the address
space (addr + length == 0). I think better to do
for (l = 0; l < length; l += TARGET_PAGE_SIZE)
16.03.2021 15:25, Max Reitz wrote:
On 15.03.21 15:40, Vladimir Sementsov-Ogievskiy wrote:
15.03.2021 12:58, Max Reitz wrote:
[...]
The question is whether it really makes sense to even have a seqcache_read()
path when in reality it’s probably never accessed. I mean, besides the fact
that
On 15/03/21 19:38, Alexander Bulekov wrote:
https://gitlab.com/a1xndr/qemu tags/20210315-pull-request
Pulled, thanks.
Paolo
The following changes since commit 6e31b3a5c34c6e5be7ef60773e607f189eaa15f3:
Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into
staging (2021-03-16 10:53:47 +)
are available in the Git repository at:
git://repo.or.cz/qemu/kevin.git tags/for-upstream
for you to f
On 16/03/21 17:27, Reinoud Zandijk wrote:
On Tue, Mar 16, 2021 at 01:49:57PM +0100, Paolo Bonzini wrote:
On 16/03/21 13:13, Igor Mammedov wrote:
Although I don't know about nvmm case, this function also needs to be updated
if smi isn't supported.
can you submit a patch for this please?
nvmm
On 16/03/21 17:49, Igor Mammedov wrote:
| smm=on | smm=off|
--
QEMU6.0 pc-i440fx-5.2 |pass| pass |
defaut smm-compat=on |||
--
Q
Am 12.03.2021 um 18:35 hat Paolo Bonzini geschrieben:
> This is a replacement for -object QAPIfication that keeps QemuOpts
> in order to not break some of the CLI parsing extensions that OptsVisitor
> includes. Since keyval is not used, support for directly passing
> JSON syntax to the option must
On 3/16/21 12:24 PM, Philippe Mathieu-Daudé wrote:
> Now than we can probe if the TCG accelerator is available
> at runtime with a QMP command, do it once at the beginning
> and only register the tests we can run.
> We can then replace the #ifdef'ry by an assertion.
>
> Signed-off-by: Philippe Mat
On 3/16/21 12:24 PM, Philippe Mathieu-Daudé wrote:
> Introduce the qtest_has_accel() method which allows
> to query at runtime if a QEMU instance has an accelerator
which allows a runtime query on whether a QEMU instance
> built-in.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> Since v1:
>
On 3/16/21 12:24 PM, Philippe Mathieu-Daudé wrote:
> Introduce the 'query-accels' QMP command which returns a list
> of built-in accelerator names.
>
> - Accelerator is a QAPI enum of all existing accelerators,
>
> - AcceleratorInfo is a QAPI structure providing accelerator
> specific informati
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