From: Richard Henderson
Signed-off-by: Richard Henderson
---
target/ppc/insn32.decode | 8 +
target/ppc/insn64.decode | 14
target/ppc/translate.c | 29 ---
target/ppc/translate/fixedpoint-impl.c.inc | 42
From: Richard Henderson
These are all connected by macros in the legacy decoding.
Signed-off-by: Richard Henderson
Signed-off-by: Matheus Ferst
---
target/ppc/insn32.decode | 37
target/ppc/translate.c | 136 ++-
target/ppc/translate/fix
From: Richard Henderson
Signed-off-by: Richard Henderson
---
target/ppc/insn64.decode | 5 +
target/ppc/translate/fixedpoint-impl.c.inc | 12
2 files changed, 17 insertions(+)
diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode
index 68ed2cbff8.
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Luis Pires
---
target/ppc/cpu.h | 1 +
target/ppc/insn32.decode | 18 +
target/ppc/insn64.decode | 18 +
target/ppc/meson.build
From: Richard Henderson
We do not need to emit an exit_tb after an exception,
as the latter will exit via longjmp.
Signed-off-by: Richard Henderson
---
target/ppc/translate.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/transla
From: Richard Henderson
The special logging is unnecessary. It will have been done
immediately before in the log file.
Signed-off-by: Richard Henderson
---
target/ppc/translate.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/trans
From: Richard Henderson
Signed-off-by: Richard Henderson
---
target/ppc/translate.c | 115 +++--
1 file changed, 64 insertions(+), 51 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index ee25badba2..ebe5afe7ae 100644
--- a/target/p
From: Richard Henderson
Signed-off-by: Richard Henderson
---
target/ppc/helper.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 6a4dccf70c..af5b3586d1 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -1,5 +1,5
From: Richard Henderson
There are other valid settings for is_jmp besides
DISAS_NEXT and DISAS_NORETURN, so eliminating that
dichotomy from ppc_tr_translate_insn is helpful.
Signed-off-by: Richard Henderson
Signed-off-by: Luis Pires
---
target/ppc/translate.c | 65 ---
Allow '64' to be specified for the instruction width command line params
and use the appropriate insn/field data types, mask, extract and deposit
functions in that case.
This will be used to implement the new 64-bit Power ISA 3.1 instructions.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: L
From: Richard Henderson
Signed-off-by: Richard Henderson
---
target/ppc/translate.c | 34 ++
1 file changed, 18 insertions(+), 16 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 0984ce637b..ee25badba2 100644
--- a/target/ppc/trans
This series provides the basic infrastructure for adding the new 32/64-bit
instructions in Power ISA 3.1 to target/ppc.
It starts by changing decodetree.py to support 64-bit instructions,
then changes the target/ppc code to allow 32- and 64-bit instructions
to be decoded using decodetree, and fini
On 4/27/21 9:54 AM, Stefan Hajnoczi wrote:
I suggest fixing this at the qdev level. Make piix3-ide have a
sub-device that inherits from ISA_DEVICE so it can only be instantiated
when there's an ISA bus.
Stefan
My qdev knowledge is shaky. Does this imply that you agree with the
direction of Th
On 4/15/21 6:23 AM, Philippe Mathieu-Daudé wrote:
Some machines use floppy controllers via the SysBus interface,
and don't need to pull in all the ISA code.
Extract the ISA specific code to a new unit: fdc-isa.c, and
add a new Kconfig symbol: "FDC_ISA".
Signed-off-by: Philippe Mathieu-Daudé
---
On 4/13/21 9:07 AM, Peter Maydell wrote:
Make the remaining functions needed by the translate-neon code
global.
Signed-off-by: Peter Maydell
---
target/arm/translate-a32.h | 8
target/arm/translate.c | 10 ++
2 files changed, 10 insertions(+), 8 deletions(-)
Reviewed-
On 4/13/21 9:07 AM, Peter Maydell wrote:
Move the NeonGenThreeOpEnvFn typedef to translate.h together
with the other similar typedefs.
Signed-off-by: Peter Maydell
---
target/arm/translate.h | 2 ++
target/arm/translate.c | 3 ---
2 files changed, 2 insertions(+), 3 deletions(-)
Reviewed-b
On 4/13/21 9:07 AM, Peter Maydell wrote:
Switch translate-neon.c.inc from being #included into translate.c
to being its own compilation unit.
Signed-off-by: Peter Maydell
---
target/arm/translate-a32.h | 3 +++
.../arm/{translate-neon.c.inc => translate-neon.c} |
On 4/13/21 9:07 AM, Peter Maydell wrote:
The function vfp_reg_ptr() is used only in translate-neon.c.inc;
move it there.
Signed-off-by: Peter Maydell
---
target/arm/translate.c | 7 ---
target/arm/translate-neon.c.inc | 7 +++
2 files changed, 7 insertions(+), 7 deletions(-)
On 4/13/21 9:07 AM, Peter Maydell wrote:
The VFPGenFixPointFn typedef is unused; delete it.
Signed-off-by: Peter Maydell
---
target/arm/translate.c | 2 --
1 file changed, 2 deletions(-)
Reviewed-by: Richard Henderson
r~
On 4/13/21 9:07 AM, Peter Maydell wrote:
Switch translate-vfp.c.inc from being #included into translate.c
to being its own compilation unit.
Signed-off-by: Peter Maydell
---
target/arm/translate-a32.h | 2 ++
target/arm/{translate-vfp.c.inc => translate-vfp.c} | 12 +
On 4/13/21 9:07 AM, Peter Maydell wrote:
+static inline void gen_set_condexec(DisasContext *s)
+{
+if (s->condexec_mask) {
+uint32_t val = (s->condexec_cond << 4) | (s->condexec_mask >> 1);
+TCGv_i32 tmp = tcg_temp_new_i32();
+tcg_gen_movi_i32(tmp, val);
+store
On 4/15/21 6:23 AM, Philippe Mathieu-Daudé wrote:
We want to extract ISA/SysBus code from the generic fdc.c file.
First, declare the prototypes we will access from the new units
into a new local header: "fdc-internal.h".
Signed-off-by: Philippe Mathieu-Daudé
---
hw/block/fdc-internal.h | 155
On 4/13/21 9:07 AM, Peter Maydell wrote:
The functions vfp_load_reg32(), vfp_load_reg64(), vfp_store_reg32()
and vfp_store_reg64() are used only in translate-vfp.c.inc. Move
them to that file.
Signed-off-by: Peter Maydell
---
target/arm/translate.c | 20
target/ar
On Tue, 27 Apr 2021 at 17:44, Richard Henderson
wrote:
>
> On 4/13/21 9:07 AM, Peter Maydell wrote:
> > Move the various gen_aa32* functions and macros out of translate.c
> > and into translate-a32.h.
> >
> > Signed-off-by: Peter Maydell
> > ---
> > target/arm/translate-a32.h | 44 ++
On 4/13/21 9:07 AM, Peter Maydell wrote:
Move the various gen_aa32* functions and macros out of translate.c
and into translate-a32.h.
Signed-off-by: Peter Maydell
---
target/arm/translate-a32.h | 44 ++
target/arm/translate.c | 49 +++---
On 4/13/21 9:07 AM, Peter Maydell wrote:
We want to split out the .c.inc files which are currently included
into translate.c so they are separate compilation units. To do this
we need to make some functions which are currently file-local to
translate.c have global scope; create a translate-a32.h
On 4/13/21 9:07 AM, Peter Maydell wrote:
Currently the trans functions for m-nocp.decode all live in
translate-vfp.inc.c; move them out into their own translation unit,
translate-m-nocp.c.
The trans_* functions here are pure code motion with no changes.
Signed-off-by: Peter Maydell
---
target
On 4/13/21 9:07 AM, Peter Maydell wrote:
The unallocated_encoding() function is the same in both
translate-a64.c and translate.c; make the translate.c function global
and drop the translate-a64.c version. To do this we need to also
share gen_exception_insn(), which currently exists in two slight
Hi Alex
Based on your comments and thinking a bit, wonder if it makes sense to
allow DMA map for the DAX cache but make unexpected mappings to be not
fatal. Please let me know your thoughts.
Dev
On Mon, Apr 26, 2021 at 10:22 PM Alex Williamson
wrote:
>
> On Mon, 26 Apr 2021 21:50:38 +0100
> Dev
On 4/13/21 9:07 AM, Peter Maydell wrote:
Some of the constant expanders defined in translate.c are generically
useful and will be used by the separate C files for VFP and Neon once
they are created; move the expander definitions to translate.h.
Signed-off-by: Peter Maydell
---
target/arm/trans
On 4/8/21 6:07 PM, Taylor Simpson wrote:
Taylor Simpson (26):
Hexagon (target/hexagon) TCG generation cleanup
Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pair
Hexagon (target/hexagon) remove unnecessary inline directives
Hexagon (target/hexagon) use env_archcpu and e
On Tue, Apr 27, 2021 at 04:01:10PM +0100, Peter Maydell wrote:
> On Tue, 27 Apr 2021 at 15:58, Peter Maydell wrote:
> >
> > On Tue, 27 Apr 2021 at 15:48, Andrew Jones wrote:
> >
> > > Since these types of features seem to blur the line between being a CPU
> > > and board property, then I think I'
On Tue, Apr 27, 2021 at 7:23 PM Gerd Hoffmann wrote:
> When the 4 descriptors in the base edid block are filled, jump to the
> dta extension block. This allows for more than four descriptors.
> Happens for example when generating an edid blob with a serial number
> (qemu-edid -s $serial).
>
> Si
On Tue, Apr 27, 2021 at 7:20 PM Gerd Hoffmann wrote:
> Initialize the "Established timings III" block earlier. Also move up
> edid_fill_modes(). That'll make sure the offset for the additional
> descriptors in the dta block don't move any more, which in turn makes it
> easier to actually use th
On Tue, Apr 27, 2021 at 7:09 PM Gerd Hoffmann wrote:
> Add helper function to find the next free desc block.
> Needed when we start to use the dta descriptor entries.
>
> Signed-off-by: Gerd Hoffmann
>
Reviewed-by: Marc-André Lureau
---
> hw/display/edid-generate.c | 41 +
On Tue, Apr 27, 2021 at 7:15 PM Gerd Hoffmann wrote:
> So we only write out that part of the edid blob
> which has been filled with data.
> Also use a larger buffer for the blob.
>
> Signed-off-by: Gerd Hoffmann
>
Reviewed-by: Marc-André Lureau
---
> qemu-edid.c | 6 --
> 1 file changed,
Hi
On Tue, Apr 27, 2021 at 7:04 PM Gerd Hoffmann wrote:
> Hi,
>
> > What about the endianness of the vdagent messages?
> >
> > It looks like this was never well defined, but that it was settled on LE:
> >
> https://gitlab.freedesktop.org/spice/linux/vd_agent/-/commit/99d9d3583143aef7143ec986ce
Patchew URL: https://patchew.org/QEMU/20210427150824.638359-1-kra...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210427150824.638359-1-kra...@redhat.com
Subject: [PATCH v2 0/8] edid: windows fixes
===
On 4/15/21 6:23 AM, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
---
hw/block/fdc.c| 7 +--
hw/block/trace-events | 1 +
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/hw/block/fdc.c b/hw/block/fdc.c
index a825c2acbae..1d3a0473678 100644
---
When the 4 descriptors in the base edid block are filled, jump to the
dta extension block. This allows for more than four descriptors.
Happens for example when generating an edid blob with a serial number
(qemu-edid -s $serial).
Signed-off-by: Gerd Hoffmann
---
hw/display/edid-generate.c | 8 ++
Initialize the "Established timings III" block earlier. Also move up
edid_fill_modes(). That'll make sure the offset for the additional
descriptors in the dta block don't move any more, which in turn makes it
easier to actually use them.
Signed-off-by: Gerd Hoffmann
---
hw/display/edid-generat
From: Akihiko Odaki
Signed-off-by: Akihiko Odaki
Signed-off-by: Gerd Hoffmann
---
include/hw/display/edid.h | 12 +++-
hw/display/edid-generate.c | 9 +
2 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/include/hw/display/edid.h b/include/hw/display/edid.h
index
Windows guests are not that happy with the edid blob we provide.
Tweak things a bit to make windows pick up more resolutions.
Also rebased all pending edid patches on top of that, so this
is the latest "all in one" patch series.
v2:
- rebase the latest master.
- drop one bugfix patch which was
From: Konstantin Nazarov
The timing generation is currently performed inside the function that
fills in the DTD. The DisplayID generation needs it as well, so moving
it out to a separate function.
Based-on: <20210303152948.59943-2-akihiko.od...@gmail.com>
Signed-off-by: Konstantin Nazarov
Messa
From: Konstantin Nazarov
Some of the EDID extensions like DisplayID do checksums of their
subsections. Currently checksums can be only applied to the whole
extension blocks which are 128 bytes.
This patch allows to checksum arbitrary parts of EDID, and not only
whole extension blocks.
Based-on:
So we only write out that part of the edid blob
which has been filled with data.
Also use a larger buffer for the blob.
Signed-off-by: Gerd Hoffmann
---
qemu-edid.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/qemu-edid.c b/qemu-edid.c
index 1cd6a9517238..c3a9fba10dc
From: Konstantin Nazarov
The Detailed Timing Descriptor has only 12 bits to store the
resolution. This limits the guest to 4095 pixels.
This patch adds support for the DisplayID extension, that has 2 full
bytes for that purpose, thus allowing 5k resolutions and above.
Based-on: <20210303152948.
From: Yuheng Su
Signed-off-by: Yuheng Su
---
hw/i386/acpi-microvm.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/hw/i386/acpi-microvm.c b/hw/i386/acpi-microvm.c
index ccd3303aac..4f32bf512f 100644
--- a/hw/i386/acpi-microvm.c
+++ b/hw/i386/acpi-microvm.c
@@ -26,6 +26,7 @@
From: Yuheng Su
Signed-off-by: Yuheng Su
---
hw/i386/acpi-microvm.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/hw/i386/acpi-microvm.c b/hw/i386/acpi-microvm.c
index ccd3303aac..4f32bf512f 100644
--- a/hw/i386/acpi-microvm.c
+++ b/hw/i386/acpi-microvm.c
@@ -26,6 +26,7 @@
Add helper function to find the next free desc block.
Needed when we start to use the dta descriptor entries.
Signed-off-by: Gerd Hoffmann
---
hw/display/edid-generate.c | 41 --
1 file changed, 26 insertions(+), 15 deletions(-)
diff --git a/hw/display/edid-g
On 4/25/21 3:23 AM, Markus Armbruster wrote:
John Snow writes:
get_expr can return many things, depending on where it is used. In the
outer parsing loop, we expect and require it to return a dict.
(It's (maybe) a bit involved to teach mypy that when nested is False,
this is already always Tru
Hi,
> What about the endianness of the vdagent messages?
>
> It looks like this was never well defined, but that it was settled on LE:
> https://gitlab.freedesktop.org/spice/linux/vd_agent/-/commit/99d9d3583143aef7143ec986cebe2980fdeeb776
>
> It's worth checking or leaving a TODO, I suppose.
On Tue, 27 Apr 2021 at 15:48, Andrew Jones wrote:
> Since these types of features seem to blur the line between being a CPU
> and board property, then I think I'd prefer we call them CPU properties,
> as they come from the CPU manual.
Conversely, I prefer to call them board properties, because t
On Tue, 27 Apr 2021 at 15:58, Peter Maydell wrote:
>
> On Tue, 27 Apr 2021 at 15:48, Andrew Jones wrote:
>
> > Since these types of features seem to blur the line between being a CPU
> > and board property, then I think I'd prefer we call them CPU properties,
> > as they come from the CPU manual.
On Tue, Apr 27, 2021 at 12:02:44PM +, Thanos Makatos wrote:
>
>
> > -Original Message-
> > From: Stefan Hajnoczi
> > Sent: 26 April 2021 16:48
> > To: Thanos Makatos ; Peter Maydell
> > ; Michael S. Tsirkin
> > Cc: qemu-devel@nongnu.org; John Levon ;
> > John G Johnson ;
> > benjami
On Thu, 22 Apr 2021 13:54:30 +0200
Claudio Fontana wrote:
> After the reshuffling, update MAINTAINERS accordingly.
> Make use of the new directories:
>
> target/s390x/kvm/
> target/s390x/tcg/
Is there anything left in target/s390x/ that is neither in kvm/ nor in
tcg/? It seems that will only be
On Tue, Apr 13, 2021 at 04:07:45PM +0800, Yanan Wang wrote:
> From: Andrew Jones
>
> The virt machine type has never used the CPU topology parameters, other
> than number of online CPUs and max CPUs. When choosing how to allocate
> those CPUs the default has been to assume cores. In preparation f
On Thu, 22 Apr 2021 13:54:21 +0200
Claudio Fontana wrote:
> now that we protect all calls to the tcg-specific functions
> with if (tcg_enabled()), we do not need the TCG stub anymore.
>
> Signed-off-by: Claudio Fontana
> Reviewed-by: David Hildenbrand
> ---
> target/s390x/tcg-stub.c | 30 ---
On Tue, Apr 13, 2021 at 04:07:42PM +0800, Yanan Wang wrote:
> From: Ying Fang
>
> When building ACPI tables regarding CPUs we should always build
> them for the number of possible CPUs, not the number of present
> CPUs. We then ensure only the present CPUs are enabled in MADT.
> Furthermore, it i
On Tue, Apr 27, 2021 at 01:15:24PM +0100, Peter Maydell wrote:
> On Tue, 27 Apr 2021 at 10:55, Andrew Jones wrote:
> >
> > On Tue, Apr 27, 2021 at 10:42:18AM +0100, Peter Maydell wrote:
> > > Why are we making the UI for "enable EL2 guest with KVM" different
> > > from that for "enable EL2 guest w
Hi @davidhildenbrand, I'm on the same team as @nam121 and I've been
looking at this issue as well.
I think this is the same issue as: https://github.com/multiarch/qemu-
user-static/issues/129
I've been running an s390x docker image on a master build (with latest
s390x commit from Apr 23) of user
Hello,
Recently I’m learning QEMU storage. I think the two structures are very
important, BlockBackend and BlockDriver. Usually BlockBackend resides in the
block device structure like disk, flash etc and the block device is storage
device seen by guest OS and driver. BlockDriver will handle the
Hello,
On 4/27/21 10:54 AM, Francisco Iglesias wrote:
> On [2021 Apr 27] Tue 15:56:10, Alistair Francis wrote:
>> On Fri, Apr 23, 2021 at 4:46 PM Bin Meng wrote:
>>>
>>> On Mon, Feb 8, 2021 at 10:41 PM Bin Meng wrote:
On Thu, Jan 21, 2021 at 10:18 PM Francisco Iglesias
wrote:
>>>
On Tue, Apr 27, 2021 at 06:24:55PM +0800, Yongji Xie wrote:
> On Mon, Apr 26, 2021 at 11:34 PM Stefan Hajnoczi wrote:
> >
> > On Thu, Apr 08, 2021 at 06:12:49PM +0800, Xie Yongji wrote:
> > > Since we already have some ways to emulate vDPA block device
> > > in kernel[1] or userspace[2]. This seri
The vfio_ccw_unrealize() routine makes an unconditional attempt to
unregister every IRQ notifier, though they may not have been registered
in the first place (when running on an older kernel, for example).
Let's mirror this behavior in the error cleanups in vfio_ccw_realize()
so that if/when new I
On 4/27/21 4:02 PM, Dr. David Alan Gilbert wrote:
> * Laurent Vivier (lviv...@redhat.com) wrote:
>> In the failover case configuration, virtio_net_device_realize() uses an
>> add_migration_state_change_notifier() to add a state notifier, but this
>> notifier is not removed by the unrealize function
On Tue, Apr 13, 2021 at 04:07:44PM +0800, Yanan Wang wrote:
> Add the Processor Properties Topology Table (PPTT) to present
> CPU topology information to ACPI guests. Note, while a DT boot
> Linux guest with a non-flat CPU topology will see socket and
> core IDs being sequential integers starting f
On 4/27/21 2:13 AM, Markus Armbruster wrote:
John Snow writes:
On 4/25/21 3:27 AM, Markus Armbruster wrote:
John Snow writes:
The single quote token implies the value is a string. Assert this to be
the case.
Signed-off-by: John Snow
---
scripts/qapi/parser.py | 2 ++
1 file changed,
On Thu, 22 Apr 2021 13:54:20 +0200
Claudio Fontana wrote:
> replace general "else" with specific checks for each possible accelerator.
>
> Handle qtest as a NOP, and error out for an unknown accelerator used in
> combination with tod.
>
> Signed-off-by: Claudio Fontana
> Reviewed-by: David Hil
On Thu, 22 Apr 2021 13:54:19 +0200
Claudio Fontana wrote:
> this will allow in later patches to remove unneeded stubs
> in target/s390x.
>
> Signed-off-by: Claudio Fontana
> Reviewed-by: David Hildenbrand
> ---
> hw/s390x/meson.build | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
On Thu, 22 Apr 2021 13:54:18 +0200
Claudio Fontana wrote:
> we stop short of renaming the actual qom object though,
> so type remains TYPE_QEMU_S390_TOD, ie "s390-tod-qemu".
>
> Signed-off-by: Claudio Fontana
> ---
> hw/s390x/{tod-qemu.c => tod-tcg.c} | 0
> hw/s390x/meson.build
Hi Eric,
On 2021/4/11 20:08, Eric Auger wrote:
Let's introduce two helpers that allow to DMA map/unmap a RAM
section. Those helpers will be called for nested stage setup in
another call site. Also the vfio_listener_region_add/del()
structure may be clearer.
Signed-off-by: Eric Auger
---
v8 -
* Laurent Vivier (lviv...@redhat.com) wrote:
> In the failover case configuration, virtio_net_device_realize() uses an
> add_migration_state_change_notifier() to add a state notifier, but this
> notifier is not removed by the unrealize function when the virtio-net
> card is unplugged.
>
> If the c
On 4/27/21 8:56 AM, Mahesh Salgaonkar wrote:
With upstream kernel, especially after commit 98ba956f6a389
("powerpc/pseries/eeh: Rework device EEH PE determination") we see that KVM
guest isn't able to enable EEH option for PCI pass-through devices anymore.
[root@atest-guest ~]# dmesg | grep E
On 4/27/21 8:30 AM, Markus Armbruster wrote:
I assume you need this assertion for mypy. If yes, let's get the job
done with minimal fuss. If no, please drop the assertion entirely.
Yep, needed for mypy. You are right that these assertions are for
clarifying postconditions of accept() that ti
On Tue, Apr 27, 2021 at 03:27:40PM +0200, Philippe Mathieu-Daudé wrote:
> 2/ There is no Kconfig dependency IDE_PIIX -> ISA_BUS, apparently
>we need it.
Adding an ISA_BUS Kconfig dependency won't solve the problem since the
qemu-system-x86_64 binary is built with many machine types. Most of th
In the failover case configuration, virtio_net_device_realize() uses an
add_migration_state_change_notifier() to add a state notifier, but this
notifier is not removed by the unrealize function when the virtio-net
card is unplugged.
If the card is unplugged and a migration is started, the notifier
John Snow writes:
> On 4/23/21 11:46 AM, Markus Armbruster wrote:
>> John Snow writes:
>>
>>> The short-ish version of what motivates this patch is:
>>>
>>> - The parser initializer does not possess adequate context to write a
>>>good error message -- It tries to determine the caller's sema
Just discovered that `hdparm -a 128` works around the issue (it was 256
at boot).
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1926231
Title:
SCSI passthrough of SATA cdrom -> errors & performance
On Tue, Apr 13, 2021 at 04:07:43PM +0800, Yanan Wang wrote:
> Add a generic API to build Processor Hierarchy Node Structure(Type 0),
> which is strictly consistent with descriptions in ACPI 6.3: 5.2.29.1.
>
> This function will be used to build ACPI PPTT table for cpu topology.
>
> Signed-off-by:
Oops you are right. The problem is I don't have reproducer, so I rely on
your testing :)
--
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devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1926277
Title:
MIPS MT dvpe does not regard VPEConf0.MVP
Stat
According to the 'MIPS MT Application-Specific Extension' manual:
If the VPE executing the instruction is not a Master VPE,
with the MVP bit of the VPEConf0 register set, the EVP bit
is unchanged by the instruction.
Modify the DVPE/EVPE opcodes to only update the MVPControl.EVP bit
if execut
Hi Thomas,
On 4/16/21 2:52 PM, Thomas Huth wrote:
> QEMU currently crashes when the user tries to do something like:
>
> qemu-system-x86_64 -M x-remote -device piix3-ide
>
> This happens because the "isabus" variable is not initialized with
> the x-remote machine yet.
The qdev contract is ever
On Tue, Apr 13, 2021 at 04:07:42PM +0800, Yanan Wang wrote:
> From: Ying Fang
>
> When building ACPI tables regarding CPUs we should always build
> them for the number of possible CPUs, not the number of present
> CPUs. We then ensure only the present CPUs are enabled in MADT.
> Furthermore, it i
El dv. 23 de 04 de 2021 a les 16:14 +0100, en/na Alex Bennée va
escriure:
> > > > > > > >
> > As Stefan pointed out, this means plugin writers will have to write
> > their own TCG tracing code. Hopefully, the plugin API can be
> > extended
> > to integrate with qemu's logging backend (it seems qem
ping (for series or simply patch 6).
On 3/24/21 12:13 AM, Philippe Mathieu-Daudé wrote:
> I started to fix the LeakSanitizer error in piix4_realize(),
> then looked for similar pattern and found 2 other places.
> The older is i82378 (historically the first one) which then
> spread.
>
> Philippe M
> The 2 fscr functions below aren't readers and writers for the FSCR.
> Instead they're used by instructions related to facilities the FSCR
> can enable and disable - this generates the code to check the FSCR and
> generate an exception if the units are disabled.
>
> That doesn't mean they don't be
On 3/24/21 12:43 AM, BALATON Zoltan wrote:
> On Wed, 24 Mar 2021, Philippe Mathieu-Daudé wrote:
>> Instead of creating an input IRQ with qemu_allocate_irqs()
>> to pass it as output IRQ of the PIC, with its handler simply
>> dispatching into the "intr" output IRQ, simplify by directly
>> connecting
ping?
On 4/15/21 12:23 PM, Philippe Mathieu-Daudé wrote:
> Hi,
>
> The floppy disc controllers pulls in irrelevant devices (sysbus in
> an ISA-only machine, ISA bus + isa devices on a sysbus-only machine).
>
> This series clean that by extracting each device in its own file,
> adding the corresp
On Tue, 27 Apr 2021 12:28:13 +0100
"Dr. David Alan Gilbert" wrote:
> * Greg Kurz (gr...@kaod.org) wrote:
> > FUSE_SYNCFS allows the client to flush the host page cache.
> > This isn't available in upstream linux yet, but the following
> > tree can be used to test:
>
> That looks OK to me; but we
Hello Corey,
On 3/29/21 2:19 PM, Cédric Le Goater wrote:
> Implement an IPMI BT interface model using a chardev backend to
> communicate with an external PowerNV machine. It uses the OpenIPMI
> simulator protocol for virtual machines described in :
>
> https://github.com/cminyard/openipmi/blo
Here is the command line to start chromium, --no-zygote is needed to
avoid the gpu releated crash:
qemu-aarch64 /usr/lib/chromium/chrome --no-sandbox --no-zygote
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On 4/27/21 12:04 PM, Andrew Jones wrote:
> On Tue, Apr 27, 2021 at 11:47:17AM +0200, Philippe Mathieu-Daudé wrote:
>> Hi Yanan, Drew,
>>
>> On 4/13/21 10:07 AM, Yanan Wang wrote:
>>> From: Andrew Jones
>>>
>>> Support device tree CPU topology descriptions.
>>>
>>> Signed-off-by: Andrew Jones
>>>
On 2021/4/27 20:08, Philippe Mathieu-Daudé wrote:
On 4/27/21 1:00 PM, wangyanan (Y) wrote:
On 2021/4/27 17:57, Philippe Mathieu-Daudé wrote:
On 3/31/21 11:53 AM, Yanan Wang wrote:
Hi,
This series introduces the cluster cpu topology support, besides now
existing sockets, cores, and threads.
John Snow writes:
> On 4/24/21 4:33 AM, Markus Armbruster wrote:
>> The second operand of assert provides no additional information. Please
>> drop it.
>
> I don't agree with "no additional information", strictly.
>
> I left you a comment on gitlab before you started reviewing on-list.
> What I
On 1/23/20 2:28 PM, Damien Hedde wrote:
> Deprecate device_legacy_reset(), qdev_reset_all() and
> qbus_reset_all() to be replaced by new functions
> device_cold_reset() and bus_cold_reset() which uses resettable API.
>
> Also introduce resettable_cold_reset_fn() which may be used as a
> replacemen
On Tue, 27 Apr 2021 at 10:55, Andrew Jones wrote:
>
> On Tue, Apr 27, 2021 at 10:42:18AM +0100, Peter Maydell wrote:
> > Why are we making the UI for "enable EL2 guest with KVM" different
> > from that for "enable EL2 guest with TCG" ? Currently an EL2
> > TCG guest is set up with "-M virt,virtual
On Mon, Apr 26, 2021 at 01:34:17PM -0400, John Snow wrote:
> On 4/23/21 8:59 AM, Vladimir Sementsov-Ogievskiy wrote:
> > Modern way is using blockdev-add + blockdev-backup, which provides a
> > lot more control on how target is opened.
[...]
> 1) Let's add a sphinx reference to
> https://qemu-pro
On 4/27/21 1:00 PM, wangyanan (Y) wrote:
> On 2021/4/27 17:57, Philippe Mathieu-Daudé wrote:
>> On 3/31/21 11:53 AM, Yanan Wang wrote:
>>> Hi,
>>> This series introduces the cluster cpu topology support, besides now
>>> existing sockets, cores, and threads.
>>>
>>> A cluster means a group of cores
Yes. It fixes the execve issue.
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https://bugs.launchpad.net/bugs/1926246
Title:
chrome based apps can not be run under qemu user mode
Status in QEMU:
New
Bug description:
chrome
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