Am 13.06.21 um 00:32 schrieb Richard Henderson:
I've renamed arch:* to target:* as there was some amount of confusion
as to what "arch" really meant without context. I've removed labels
for lm32 and unicore32 which have been removed from qemu 6.1. I've
added a label for hexagon.
I have not
Am 13.06.21 um 03:40 schrieb Brad Smith:
This same problem also applies to OpenBSD as we have the same
version of ncurses with support for wide characters. I have a similar
patch in our QEMU port.
Then we should either extend the conditional statement to handle OpenBSD
as well, or simply def
On 12/06/2021 21.58, Philippe Mathieu-Daudé wrote:
Use memory_region_size() to get the MemoryRegion size,
and display it with the '0x' prefix.
Signed-off-by: Philippe Mathieu-Daudé
---
v2:
- Use PRIx64 (lvivier)
- Use memory_region_size()
---
tests/qtest/fuzz/generic_fuzz.c | 4 ++--
1 file
On 210612 2158, Philippe Mathieu-Daudé wrote:
> Use memory_region_size() to get the MemoryRegion size,
> and display it with the '0x' prefix.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> v2:
> - Use PRIx64 (lvivier)
> - Use memory_region_size()
> ---
> tests/qtest/fuzz/generic_fuzz.c | 4 ++
This same problem also applies to OpenBSD as we have the same
version of ncurses with support for wide characters. I have a similar
patch in our QEMU port.
On 6/12/2021 4:03 AM, Stefan Weil wrote:
MacOS provides header files for curses 5.7 with support
for wide characters, but requires _XOPEN_SO
On Sat, Jun 12, 2021 at 12:10 PM Paul Zimmerman wrote:
>
> On Sat, Jun 12, 2021 at 12:40 AM Philippe Mathieu-Daudé
> wrote:
> >
> > On 6/11/21 9:48 PM, Paul Zimmerman wrote:
> > > I will take a look. Might take me a couple of days to get to it though.
> >
> > Thanks!
> >
> > Odd, your comment ap
We had a single ATOMIC_MMU_LOOKUP macro that probed for
read+write on all atomic ops. This is incorrect for
plain atomic load and atomic store.
For user-only, we rely on the host page permissions.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/390
Signed-off-by: Richard Henderson
---
I've renamed arch:* to target:* as there was some amount of confusion as to what "arch"
really meant without context. I've removed labels for lm32 and unicore32 which have been
removed from qemu 6.1. I've added a label for hexagon.
I have not yet added labels for host architecture, because I
On 6/11/21 12:06 PM, Peter Collingbourne wrote:
MTE3 introduces an asymmetric tag checking mode, in which loads are
checked synchronously and stores are checked asynchronously. Add
support for it.
Signed-off-by: Peter Collingbourne
---
target/arm/cpu64.c | 2 +-
target/arm/mte_helper.c
On 6/12/21 12:58 PM, Philippe Mathieu-Daudé wrote:
Use memory_region_size() to get the MemoryRegion size,
and display it with the '0x' prefix.
Signed-off-by: Philippe Mathieu-Daudé
---
v2:
- Use PRIx64 (lvivier)
- Use memory_region_size()
---
tests/qtest/fuzz/generic_fuzz.c | 4 ++--
1 file c
Use memory_region_size() to get the MemoryRegion size,
and display it with the '0x' prefix.
Signed-off-by: Philippe Mathieu-Daudé
---
v2:
- Use PRIx64 (lvivier)
- Use memory_region_size()
---
tests/qtest/fuzz/generic_fuzz.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/
The test was off-by-one, because tag_last points to the
last byte of the tag to check, thus tag_last - prev_page
will equal TARGET_PAGE_SIZE when we use the first byte
of the next page.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/403
Reported-by: Peter Collingbourne
Signed-off-by: Ric
Hello,
On Tue, 23 Jun 2020, Philippe Mathieu-Daudé wrote:
This is v2 of Zoltan's patch:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg714711.html
- rebased
- added docstring
- include hw/misc/auxbus.c fix
Supersedes: <20200621145235.9e241745...@zero.eik.bme.hu>
What happened to this
On Sat, Jun 12, 2021 at 12:40 AM Philippe Mathieu-Daudé wrote:
>
> On 6/11/21 9:48 PM, Paul Zimmerman wrote:
> > I will take a look. Might take me a couple of days to get to it though.
>
> Thanks!
>
> Odd, your comment appears as posted by myself on GitLab:
> https://gitlab.com/qemu-project/qemu/-
On Sat, Jun 12, 2021 at 6:16 PM Laurent Vivier wrote:
>
> Le 12/06/2021 à 17:00, Philippe Mathieu-Daudé a écrit :
> > Signed-off-by: Philippe Mathieu-Daudé
> > ---
> > tests/qtest/fuzz/generic_fuzz.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/tests/qtest/fuzz/
Le 12/06/2021 à 17:00, Philippe Mathieu-Daudé a écrit :
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> tests/qtest/fuzz/generic_fuzz.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tests/qtest/fuzz/generic_fuzz.c b/tests/qtest/fuzz/generic_fuzz.c
> index cea7d4058e8..
We extend virt machine to emulate ACLINT devices only when "aclint=on"
parameter is passed along with machine name in QEMU command-line.
Signed-off-by: Anup Patel
---
hw/riscv/virt.c | 110 +++-
include/hw/riscv/virt.h | 2 +
2 files changed, 111 ins
We re-factor and break the FDT generation into smaller functions
so that it is easier to modify FDT generation for different
configurations of virt machine.
Signed-off-by: Anup Patel
---
hw/riscv/virt.c | 514 ++--
1 file changed, 320 insertions(+), 19
The RISC-V Advanced Core Local Interruptor (ACLINT) is an improvement
over the SiFive CLINT but also maintains backward compatibility with
the SiFive CLINT.
Latest RISC-V ACLINT specification (will be frozen in a month) can be
found at:
https://github.com/riscv/riscv-aclint/blob/main/riscv-aclint.
The RISC-V ACLINT is more modular and backward compatible with
original SiFive CLINT so instead of duplicating the orignal
SiFive CLINT implementation we upgrade the current SiFive CLINT
implementation to RISC-V ACLINT implementation.
Signed-off-by: Anup Patel
---
hw/intc/Kconfig
On 6/12/21 3:21 AM, Philippe Mathieu-Daudé wrote:
On 6/1/21 5:00 PM, Richard Henderson wrote:
This removes all of the problems with unaligned accesses
to the bytecode stream.
With an 8-bit opcode at the bottom, we have 24 bits remaining,
which are generally split into 6 4-bit slots. This fits
Signed-off-by: Philippe Mathieu-Daudé
---
tests/qtest/fuzz/generic_fuzz.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/qtest/fuzz/generic_fuzz.c b/tests/qtest/fuzz/generic_fuzz.c
index cea7d4058e8..1307299df52 100644
--- a/tests/qtest/fuzz/generic_fuzz.c
+++ b/tests/q
Le 12/06/2021 à 08:08, Richard Henderson a écrit :
> Signal the translator to use host atomic instructions for
> guest operations, insofar as it is possible. This is the
> best we can do to allow the guest to interact atomically
> with other processes.
>
> Resolves: https://gitlab.com/qemu-projec
On 6/1/21 5:00 PM, Richard Henderson wrote:
> This removes all of the problems with unaligned accesses
> to the bytecode stream.
>
> With an 8-bit opcode at the bottom, we have 24 bits remaining,
> which are generally split into 6 4-bit slots. This fits well
> with the maximum length opcodes, e.g
On 6/1/21 5:00 PM, Richard Henderson wrote:
> This operation is critical to staying within the interpretation
> loop longer, which avoids the overhead of setup and teardown for
> many TBs.
>
> The check in tcg_prologue_init is disabled because TCI does
> want to use NULL to indicate exit, as oppos
On 6/1/21 5:01 PM, Richard Henderson wrote:
> We already had the 32-bit versions for a 32-bit host; expand this
> to 64-bit hosts as well. The 64-bit opcodes are new.
>
> Tested-by: Philippe Mathieu-Daudé
> Signed-off-by: Richard Henderson
> ---
> tcg/tci/tcg-target.h | 8
> tcg/
On 6/1/21 5:01 PM, Richard Henderson wrote:
> This reverts commit dc09f047eddec8f4a1991c4f5f4a428d7aa3f2c0.
>
> For tcg, tracepoints are expanded inline in tcg opcodes.
> Using a helper which generates a second tracepoint is incorrect.
>
> For system mode, the extraction and re-packing of MemOp a
On 6/1/21 5:01 PM, Richard Henderson wrote:
> Wrap guest memory operations for tci like we do for cpu_ld*_data.
>
> We cannot actually use the cpu_ldst.h interface without duplicating
> the memory trace operations performed within, which will already
> have been expanded into the tcg opcode stream
Hi,
On 6/12/21 8:24 AM, Liu Cyrus wrote:
> Hi folks, this is a suggestion for fixing this bug.
> I'm willing to discuss this with you because I'm new to contribute to
QEMU.
Thanks for your fix!
You didn't Cc'ed the maintainers of the SCSI subsystem (see
https://wiki.qemu.org/Contribute/SubmitAPa
MacOS provides header files for curses 5.7 with support
for wide characters, but requires _XOPEN_SOURCE_EXTENDED=1
to activate that.
By default those old header files are used even if there
is a newer Homebrew installation of ncurses 6.2 available.
Change also the old macro definition of NCURSES_
MacOS provides header files for curses 5.7 with support
for wide characters, but requires _XOPEN_SOURCE_EXTENDED=1
to activate that.
By default those old header files are used even if there
is a newer Homebrew installation of ncurses 6.2 available.
Change also the old macro definition of NCURSES_
On 6/11/21 9:48 PM, Paul Zimmerman wrote:
> I will take a look. Might take me a couple of days to get to it though.
Thanks!
Odd, your comment appears as posted by myself on GitLab:
https://gitlab.com/qemu-project/qemu/-/issues/198#note_599551747
BTW Paul, could you join QEMU GitLab project to he
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