Re: [PATCH 01/31] vdpa: Reorder virtio/vhost-vdpa.c functions

2022-01-27 Thread Eugenio Perez Martin
On Fri, Jan 28, 2022 at 6:59 AM Jason Wang wrote: > > > 在 2022/1/22 上午4:27, Eugenio Pérez 写道: > > vhost_vdpa_set_features and vhost_vdpa_init need to use > > vhost_vdpa_get_features in svq mode. > > > > vhost_vdpa_dev_start needs to use almost all _set_ functions: > > vhost_vdpa_set_vring_dev_kick

Re: [PATCH v6 2/5] target/riscv: add PTE_A/PTE_D/PTE_U bits check for inner PTE

2022-01-27 Thread Weiwei Li
在 2022/1/28 下午1:40, Alistair Francis 写道: On Tue, Jan 25, 2022 at 5:47 PM Weiwei Li wrote: Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Anup Patel Could you please add a commit message to this patch? Alistair OK. I'll add it. Regards, Weiwei Li --- target/ris

Re: [PATCH 21/31] util: Add iova_tree_alloc

2022-01-27 Thread Eugenio Perez Martin
On Fri, Jan 28, 2022 at 6:56 AM Jason Wang wrote: > > > 在 2022/1/28 上午11:57, Peter Xu 写道: > > On Thu, Jan 27, 2022 at 10:24:27AM +0100, Eugenio Perez Martin wrote: > >> On Thu, Jan 27, 2022 at 9:06 AM Peter Xu wrote: > >>> On Tue, Jan 25, 2022 at 10:40:01AM +0100, Eugenio Perez Martin wrote: > >>

Re: [PATCH v4 3/6] target/riscv: add support for zfinx

2022-01-27 Thread Weiwei Li
在 2022/1/28 下午2:09, Alistair Francis 写道: On Thu, Jan 13, 2022 at 11:52 AM Weiwei Li wrote: - update extension check REQUIRE_ZFINX_OR_F - update single float point register read/write - disable nanbox_s check Co-authored-by: ardxwe Signed-off-by: Weiwei Li Signed-off-by: Junqiang W

Re: [PATCH v3 11/11] 9p: darwin: adjust assumption on virtio-9p-test

2022-01-27 Thread Thomas Huth
-EMISSINGPATCHDESCRIPTION Please avoid sending patches without patch description. E.g. explain here *why* this needs to be adjusted. Thanks, Thomas On 28/01/2022 01.56, Will Cohen wrote: Signed-off-by: Fabian Franz Signed-off-by: Will Cohen --- tests/qtest/virtio-9p-test.c | 2 +-

Re: [PATCH] hw/arm/virt: Fix CPU's default NUMA node ID

2022-01-27 Thread wangyanan (Y)
Hi, On 2022/1/26 17:14, Igor Mammedov wrote: On Wed, 26 Jan 2022 13:24:10 +0800 Gavin Shan wrote: The default CPU-to-NUMA association is given by mc->get_default_cpu_node_id() when it isn't provided explicitly. However, the CPU topology isn't fully considered in the default association and it

Re: [PATCH 06/31] vhost: Route guest->host notification through shadow virtqueue

2022-01-27 Thread Jason Wang
在 2022/1/22 上午4:27, Eugenio Pérez 写道: At this moment no buffer forwarding will be performed in SVQ mode: Qemu just forward the guest's kicks to the device. This commit also set up SVQs in the vhost device. Host memory notifiers regions are left out for simplicity, and they will not be addresse

Re: [PATCH 05/31] vhost: Add Shadow VirtQueue kick forwarding capabilities

2022-01-27 Thread Jason Wang
在 2022/1/22 上午4:27, Eugenio Pérez 写道: At this mode no buffer forwarding will be performed in SVQ mode: Qemu will just forward the guest's kicks to the device. Also, host notifiers must be disabled at SVQ start, and they will not start if SVQ has been enabled when the device is stopped. This wi

Re: [PATCH 04/31] vdpa: Add vhost_svq_set_svq_kick_fd

2022-01-27 Thread Jason Wang
在 2022/1/22 上午4:27, Eugenio Pérez 写道: This function allows the vhost-vdpa backend to override kick_fd. Signed-off-by: Eugenio Pérez --- hw/virtio/vhost-shadow-virtqueue.h | 1 + hw/virtio/vhost-shadow-virtqueue.c | 45 ++ 2 files changed, 46 insertions(+) dif

Re: [PATCH v4 3/6] target/riscv: add support for zfinx

2022-01-27 Thread Alistair Francis
On Thu, Jan 13, 2022 at 11:52 AM Weiwei Li wrote: > > - update extension check REQUIRE_ZFINX_OR_F > - update single float point register read/write > - disable nanbox_s check > > Co-authored-by: ardxwe > Signed-off-by: Weiwei Li > Signed-off-by: Junqiang Wang > Reviewed-by: Richard Hender

Re: [PATCH 00/31] vDPA shadow virtqueue

2022-01-27 Thread Jason Wang
在 2022/1/22 上午4:27, Eugenio Pérez 写道: This series enables shadow virtqueue (SVQ) for vhost-vdpa devices. This is intended as a new method of tracking the memory the devices touch during a migration process: Instead of relay on vhost device's dirty logging capability, SVQ intercepts the VQ datap

Re: [PATCH 03/31] vdpa: Add vhost_svq_get_dev_kick_notifier

2022-01-27 Thread Jason Wang
在 2022/1/22 上午4:27, Eugenio Pérez 写道: Is needed so vhost-vdpa knows the device's kick event fd. Signed-off-by: Eugenio Pérez --- hw/virtio/vhost-shadow-virtqueue.h | 4 hw/virtio/vhost-shadow-virtqueue.c | 10 +- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a

Re: [PATCH 02/31] vhost: Add VhostShadowVirtqueue

2022-01-27 Thread Jason Wang
在 2022/1/22 上午4:27, Eugenio Pérez 写道: Vhost shadow virtqueue (SVQ) is an intermediate jump for virtqueue notifications and buffers, allowing qemu to track them. While qemu is forwarding the buffers and virtqueue changes, it is able to commit the memory it's being dirtied, the same way regular q

Re: [PATCH 01/31] vdpa: Reorder virtio/vhost-vdpa.c functions

2022-01-27 Thread Jason Wang
在 2022/1/22 上午4:27, Eugenio Pérez 写道: vhost_vdpa_set_features and vhost_vdpa_init need to use vhost_vdpa_get_features in svq mode. vhost_vdpa_dev_start needs to use almost all _set_ functions: vhost_vdpa_set_vring_dev_kick, vhost_vdpa_set_vring_dev_call, vhost_vdpa_set_dev_vring_base and vhost

Re: [PATCH 21/31] util: Add iova_tree_alloc

2022-01-27 Thread Jason Wang
在 2022/1/28 上午11:57, Peter Xu 写道: On Thu, Jan 27, 2022 at 10:24:27AM +0100, Eugenio Perez Martin wrote: On Thu, Jan 27, 2022 at 9:06 AM Peter Xu wrote: On Tue, Jan 25, 2022 at 10:40:01AM +0100, Eugenio Perez Martin wrote: So I think that the first step to remove complexity from the old one

Re: [PATCH v6 2/5] target/riscv: add PTE_A/PTE_D/PTE_U bits check for inner PTE

2022-01-27 Thread Alistair Francis
On Tue, Jan 25, 2022 at 5:47 PM Weiwei Li wrote: > > Signed-off-by: Weiwei Li > Signed-off-by: Junqiang Wang > Reviewed-by: Anup Patel Could you please add a commit message to this patch? Alistair > --- > target/riscv/cpu_helper.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/

Re: [PATCH v4 2/6] target/riscv: hardwire mstatus.FS to zero when enable zfinx

2022-01-27 Thread Alistair Francis
On Thu, Jan 13, 2022 at 11:52 AM Weiwei Li wrote: > > Co-authored-by: ardxwe > Signed-off-by: Weiwei Li > Signed-off-by: Junqiang Wang Reviewed-by: Alistair Francis Alistair > --- > target/riscv/cpu_helper.c | 6 +- > target/riscv/csr.c| 25 - > target/

Re: [PATCH v4 6/6] target/riscv: expose zfinx, zdinx, zhinx{min} properties

2022-01-27 Thread Alistair Francis
On Thu, Jan 13, 2022 at 11:56 AM Weiwei Li wrote: > > Co-authored-by: ardxwe > Signed-off-by: Weiwei Li > Signed-off-by: Junqiang Wang > Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Alistair > --- > target/riscv/cpu.c | 5 + > 1 file changed, 5 insertions(+) > > diff -

Re: [PATCH v4 1/6] target/riscv: add cfg properties for zfinx, zdinx and zhinx{min}

2022-01-27 Thread Alistair Francis
On Thu, Jan 13, 2022 at 11:51 AM Weiwei Li wrote: > > Co-authored-by: ardxwe > Signed-off-by: Weiwei Li > Signed-off-by: Junqiang Wang > Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Alistair > --- > target/riscv/cpu.c | 12 > target/riscv/cpu.h |

Re: [PATCH] target/riscv: correct "code should not be reached" for x-rv128

2022-01-27 Thread Alistair Francis
On Mon, Jan 24, 2022 at 5:54 PM Frédéric Pétrot wrote: > > The addition of uxl support in gdbstub adds a few checks on the maximum > register length, but omitted MXL_RV128, leading to the occurence of > "code should not be reached" in a few places. > This patch makes rv128 react as rv64 for gdb, a

[PATCH] target/i386: Add kvm_get_one_msr helper

2022-01-27 Thread Yang Weijiang
When try to get one msr from KVM, I found there's no such kind of existing interface while kvm_put_one_msr() is there. So here comes the patch. It'll remove redundant preparation code before finally call KVM_GET_MSRS IOCTL. No functional change intended. Signed-off-by: Yang Weijiang --- target/

Re: [PATCH 21/31] util: Add iova_tree_alloc

2022-01-27 Thread Peter Xu
On Thu, Jan 27, 2022 at 10:24:27AM +0100, Eugenio Perez Martin wrote: > On Thu, Jan 27, 2022 at 9:06 AM Peter Xu wrote: > > > > On Tue, Jan 25, 2022 at 10:40:01AM +0100, Eugenio Perez Martin wrote: > > > So I think that the first step to remove complexity from the old one > > > is to remove iova_b

[RFC PATCH v5 23/30] hw/loongarch: Add some devices support for 3A5000.

2022-01-27 Thread Xiaojuan Yang
1.Add uart,virtio-net,vga and usb for 3A5000. 2.Add irq set and map for the pci host. Non pci device use irq 0-16, pci device use 16-64. 3.Add some unimplented device to emulate guest unused memory space. Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- hw/loongarch/Kconfig | 7 +

[RFC PATCH v5 20/30] hw/intc: Add LoongArch extioi interrupt controller(EIOINTC)

2022-01-27 Thread Xiaojuan Yang
This patch realize the EIOINTC interrupt controller. Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- hw/intc/Kconfig| 3 + hw/intc/loongarch_extioi.c | 409 + hw/intc/meson.build| 1 + hw/intc/trace-events

[RFC PATCH v5 29/30] hw/loongarch: Add fdt support.

2022-01-27 Thread Xiaojuan Yang
Add tree nodes for 3A5000 device tree. - cpu nodes; - fw_cfg nodes; - pcie nodes. The lastest loongarch bios have supported fdt. - https://github.com/loongson/edk2 - https://github.com/loongson/edk2-platforms Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- hw/loongarch/loongson3.c

[RFC PATCH v5 24/30] hw/loongarch: Add LoongArch ls7a rtc device support

2022-01-27 Thread Xiaojuan Yang
This patch add ls7a rtc device support. Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- hw/loongarch/Kconfig | 1 + hw/loongarch/loongson3.c | 4 + hw/rtc/Kconfig | 3 + hw/rtc/ls7a_rtc.c | 322 + hw/rtc/meson.build

[RFC PATCH v5 28/30] hw/loongarch: Add LoongArch acpi support

2022-01-27 Thread Xiaojuan Yang
Add a simple acpi model for LoongArch cpu More complex functions will be added later Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- hw/acpi/Kconfig | 4 + hw/acpi/ls7a.c | 374 ++ hw/acpi/meson.build | 1 + hw/loongar

Re: [PATCH v6 1/5] target/riscv: Ignore reserved bits in PTE for RV64

2022-01-27 Thread Guo Ren
On Tue, Jan 25, 2022 at 5:49 PM Weiwei Li wrote: > > > 在 2022/1/25 下午5:00, Guo Ren 写道: > > On Tue, Jan 25, 2022 at 4:54 PM LIU Zhiwei wrote: > >> > >> On 2022/1/25 16:40, Guo Ren wrote: > >>> On Tue, Jan 25, 2022 at 4:34 PM LIU Zhiwei wrote: > On 2022/1/25 14:45, Weiwei Li wrote: > > Fr

[RFC PATCH v5 30/30] tests/tcg/loongarch64: Add hello/memory test in loongarch64 system

2022-01-27 Thread Xiaojuan Yang
- We write a very minimal softmmu harness. - This is a very simple smoke test with no need to run a full Linux/kernel. - The Makefile.softmmu-target record the rule to run. Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- tests/tcg/loongarch64/Makefile.softmmu-target | 33 +++ tests

[RFC PATCH v5 15/30] hw/loongarch: Add support loongson3-ls7a machine type.

2022-01-27 Thread Xiaojuan Yang
Emulate a 3A5000 board use the new loongarch instruction. 3A5000 belongs to the Loongson3 series processors. The board consists of a 3A5000 cpu model and the 7A1000 bridge. The host 3A5000 board is really complicated and contains many functions.Now for the tcg softmmu mode only part functions are e

[RFC PATCH v5 21/30] hw/loongarch: Add irq hierarchy for the system

2022-01-27 Thread Xiaojuan Yang
This patch add the irq hierarchy for the virt board. Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- hw/loongarch/loongson3.c | 88 ++ include/hw/pci-host/ls7a.h | 13 ++ 2 files changed, 101 insertions(+) diff --git a/hw/loongarch/loongson3.c

Re: [PATCH v8 20/23] hw/intc: Add RISC-V AIA IMSIC device emulation

2022-01-27 Thread Anup Patel
On Fri, Jan 28, 2022 at 7:24 AM Alistair Francis wrote: > > On Thu, Jan 20, 2022 at 1:55 AM Anup Patel wrote: > > > > From: Anup Patel > > > > The RISC-V AIA (Advanced Interrupt Architecture) defines a new > > interrupt controller for MSIs (message signal interrupts) called > > IMSIC (Incoming M

[RFC PATCH v5 19/30] hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI)

2022-01-27 Thread Xiaojuan Yang
This patch realize PCH-MSI interrupt controller. Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- hw/intc/Kconfig | 5 ++ hw/intc/loongarch_pch_msi.c | 75 + hw/intc/meson.build | 1 + hw/intc/trace-events

[RFC PATCH v5 25/30] hw/loongarch: Add default bios startup support.

2022-01-27 Thread Xiaojuan Yang
Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- hw/loongarch/Kconfig | 4 hw/loongarch/fw_cfg.c| 33 ++ hw/loongarch/fw_cfg.h| 15 ++ hw/loongarch/loongson3.c | 35

[RFC PATCH v5 26/30] hw/loongarch: Add -kernel and -initrd options support

2022-01-27 Thread Xiaojuan Yang
Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- hw/loongarch/loongson3.c | 81 include/hw/loongarch/loongarch.h | 5 ++ 2 files changed, 86 insertions(+) diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c index ef46a5cfc4..07a974c

[RFC PATCH v5 16/30] hw/loongarch: Add LoongArch cpu interrupt support(CPUINTC)

2022-01-27 Thread Xiaojuan Yang
Loongson-3A5000 support 14 interrupts from 64 - 77(Timer->75 IPI->76) Loongson-3A5000 and ls7a form a legacy model and extended model irq hierarchy.Tcg mode emulate a simplified extended model which has no Legacy I/O Interrupt Controller(LIOINTC) and LPC. e.g: |+-++-+ +---

[RFC PATCH v5 13/30] target/loongarch: Add gdb support.

2022-01-27 Thread Xiaojuan Yang
Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- configs/targets/loongarch64-softmmu.mak | 1 + gdb-xml/loongarch-base64.xml| 43 +++ gdb-xml/loongarch-fpu64.xml | 57 +++ target/loongarch/cpu.c | 7 ++ target/loongarch/gdbst

[RFC PATCH v5 27/30] hw/loongarch: Add LoongArch smbios support

2022-01-27 Thread Xiaojuan Yang
Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- hw/loongarch/Kconfig | 1 + hw/loongarch/loongson3.c | 42 include/hw/loongarch/loongarch.h | 1 + 3 files changed, 44 insertions(+) diff --git a/hw/loongarch/Kconfig b/hw/loongarch/K

[RFC PATCH v5 22/30] Enable common virtio pci support for LoongArch

2022-01-27 Thread Xiaojuan Yang
Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- softmmu/qdev-monitor.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c index 01f3834db5..49491d74a1 100644 --- a/softmmu/qdev-monitor.c +++ b/softmmu/qdev-monitor.c @@ -

[RFC PATCH v5 12/30] target/loongarch: Add timer related instructions support.

2022-01-27 Thread Xiaojuan Yang
This includes: -RDTIME{L/H}.W -RDTIME.D Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- target/loongarch/helper.h | 1 + target/loongarch/insn_trans/trans_extra.c.inc | 32 +++ target/loongarch/op_helper.c | 6 target/loongarc

[RFC PATCH v5 08/30] target/loongarch: Add LoongArch IOCSR instruction

2022-01-27 Thread Xiaojuan Yang
This includes: - IOCSR{RD/WR}.{B/H/W/D} Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- target/loongarch/cpu.c| 8 + target/loongarch/cpu.h| 4 + target/loongarch/disas.c | 8 + target/loongarch/helper.h

[RFC PATCH v5 18/30] hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC)

2022-01-27 Thread Xiaojuan Yang
This patch realize the PCH-PIC interrupt controller. Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- hw/intc/Kconfig | 4 + hw/intc/loongarch_pch_pic.c | 488 hw/intc/meson.build | 1 + hw/intc/trace-events

[RFC PATCH v5 14/30] hw/pci-host: Add ls7a1000 PCIe Host bridge support for Loongson3 Platform

2022-01-27 Thread Xiaojuan Yang
This is a model of the PCIe Host Bridge found on a Loongson-5000 processor. It includes a interrupt controller, some interface for pci and nonpci devices. Mainly emulate part of it that is not exactly the same as the host and only use part devices for tcg mode. It support for MSI and MSIX interrupt

[RFC PATCH v5 11/30] target/loongarch: Add LoongArch interrupt and exception handle

2022-01-27 Thread Xiaojuan Yang
1.This patch Add loongarch interrupt and exception handle. 2.Rename the user excp to the exccode from the csr defintions. Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- linux-user/loongarch64/cpu_loop.c | 8 +- target/loongarch/cpu.c| 251

[RFC PATCH v5 17/30] hw/loongarch: Add LoongArch ipi interrupt support(IPI)

2022-01-27 Thread Xiaojuan Yang
This patch realize the IPI interrupt controller. Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- hw/intc/Kconfig | 3 + hw/intc/loongarch_ipi.c | 164 hw/intc/meson.build | 1 + hw/intc/trace-events|

[RFC PATCH v5 04/30] target/loongarch: Implement qmp_query_cpu_definitions()

2022-01-27 Thread Xiaojuan Yang
Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao Reviewed-by: Richard Henderson --- qapi/machine-target.json | 6 -- target/loongarch/cpu.c | 26 ++ 2 files changed, 30 insertions(+), 2 deletions(-) diff --git a/qapi/machine-target.json b/qapi/machine-target.

[RFC PATCH v5 09/30] target/loongarch: Add TLB instruction support

2022-01-27 Thread Xiaojuan Yang
This includes: - TLBSRCH - TLBRD - TLBWR - TLBFILL - TLBCLR - TLBFLUSH - INVTLB Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- target/loongarch/disas.c | 17 + target/loongarch/helper.h | 12 + .../insn_trans/trans_privileged.c.inc |

[RFC PATCH v5 06/30] target/loongarch: Add MMU support for LoongArch CPU.

2022-01-27 Thread Xiaojuan Yang
Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- target/loongarch/cpu-param.h | 2 +- target/loongarch/cpu.c| 30 target/loongarch/cpu.h| 42 - target/loongarch/internals.h | 9 + target/loongarch/machine.c| 17 ++ target/loongarch/meson.build | 1

[RFC PATCH v5 10/30] target/loongarch: Add other core instructions support

2022-01-27 Thread Xiaojuan Yang
This includes: -CACOP -LDDIR -LDPTE -ERTN -DBCL -IDLE Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- target/loongarch/cpu.h| 2 + target/loongarch/disas.c | 17 target/loongarch/helper.h | 4 + .../insn_trans/tran

[RFC PATCH v5 07/30] target/loongarch: Add LoongArch CSR instruction

2022-01-27 Thread Xiaojuan Yang
This includes: - CSRRD - CSRWR - CSRXCHG Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- target/loongarch/cpu.h| 88 target/loongarch/csr_helper.c | 112 target/loongarch/disas.c | 15 +++ targ

[RFC PATCH v5 05/30] target/loongarch: Add constant timer support

2022-01-27 Thread Xiaojuan Yang
Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- target/loongarch/constant_timer.c | 62 +++ target/loongarch/cpu.h| 10 + target/loongarch/meson.build | 1 + 3 files changed, 73 insertions(+) create mode 100644 target/loongarch/constant

[RFC PATCH v5 02/30] target/loongarch: Add CSRs definition

2022-01-27 Thread Xiaojuan Yang
Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- target/loongarch/cpu-csr.h | 236 + target/loongarch/cpu.c | 35 ++ target/loongarch/cpu.h | 57 + 3 files changed, 328 insertions(+) create mode 100644 target/loongarch/cpu-csr.h

[RFC PATCH v5 03/30] target/loongarch: Add basic vmstate description of CPU.

2022-01-27 Thread Xiaojuan Yang
Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao Reviewed-by: Richard Henderson --- target/loongarch/cpu.c | 3 ++ target/loongarch/internals.h | 4 ++ target/loongarch/machine.c | 85 target/loongarch/meson.build | 6 +++ 4 files changed, 98

[RFC PATCH v5 01/30] target/loongarch: Add system emulation introduction

2022-01-27 Thread Xiaojuan Yang
Signed-off-by: Xiaojuan Yang Signed-off-by: Song Gao --- docs/system/loongarch/loongson3.rst | 78 + target/loongarch/README | 28 +++ 2 files changed, 106 insertions(+) create mode 100644 docs/system/loongarch/loongson3.rst diff --git a/docs/sys

[RFC PATCH v5 00/30] Add LoongArch softmmu support

2022-01-27 Thread Xiaojuan Yang
This series patch add softmmu support for LoongArch. The latest kernel: * https://github.com/loongson/linux/tree/loongarch-next The latest uefi: * https://github.com/loongson/edk2 * https://github.com/loongson/edk2-platforms The manual: * https://github.com/loongson/LoongArch-Documentation/

[RFC PATCH v5 00/30] Add LoongArch softmmu support

2022-01-27 Thread Xiaojuan Yang
This series patch add softmmu support for LoongArch. The latest kernel: * https://github.com/loongson/linux/tree/loongarch-next The latest uefi: * https://github.com/loongson/edk2 * https://github.com/loongson/edk2-platforms The manual: * https://github.com/loongson/LoongArch-Documentation/

Re: [PATCH 14/14] hw/intc/arm_gicv3_its: Implement MOVI

2022-01-27 Thread Richard Henderson
On 1/23/22 05:24, Peter Maydell wrote: Implement the ITS MOVI command. This command specifies a (physical) LPI by DeviceID and EventID and provides a new ICID for it. The ITS must find the interrupt translation table entry for the LPI, which will tell it the old ICID. It then moves the pending st

Re: [PATCH 13/14] hw/intc/arm_gicv3_its: Implement MOVALL

2022-01-27 Thread Richard Henderson
On 1/23/22 05:24, Peter Maydell wrote: Implement the ITS MOVALL command, which takes all the pending interrupts on a source redistributor and makes the not-pending on that source redistributor and pending on a destination redistributor. This is a GICv3 ITS command which we forgot to implement. (

Re: [PATCH 12/14] hw/intc/arm_gicv3_its: Check table bounds against correct limit

2022-01-27 Thread Richard Henderson
On 1/23/22 05:24, Peter Maydell wrote: Currently when we fill in a TableDesc based on the value the guest has written to the GITS_BASER register, we calculate both: * num_entries : the number of entries in the table, constrained by the amount of memory the guest has given it * num_ids : t

Re: [PATCH 11/14] hw/intc/arm_gicv3_its: Make GITS_BASER RAZ/WI for unimplemented registers

2022-01-27 Thread Richard Henderson
On 1/23/22 05:24, Peter Maydell wrote: The ITS has a bank of 8 GITS_BASER registers, which allow the guest to specify the base address of various data tables. Each register has a read-only type field indicating which table it is for and a read-write field where the guest can write in the base ad

Re: [PATCH 10/14] hw/intc/arm_gicv3_its: Provide read accessor for translation_ops

2022-01-27 Thread Richard Henderson
On 1/23/22 05:24, Peter Maydell wrote: The MemoryRegionOps gicv3_its_translation_ops currently provides only a .write_with_attrs function, because the only register in this region is the write-only GITS_TRANSLATER. However, if you don't provide a read function and the guest tries reading from th

Re: [PATCH 08/14] hw/intc/arm_gicv3_redist: Remove unnecessary zero checks

2022-01-27 Thread Richard Henderson
On 1/23/22 05:24, Peter Maydell wrote: The ITS-related parts of the redistributor code make some checks for whether registers like GICR_PROPBASER and GICR_PENDBASER are zero. There is no requirement in the specification for treating zeroes in these address registers specially -- they contain gues

Re: [PATCH 09/14] hw/intc/arm_gicv3: Set GICR_CTLR.CES if LPIs are supported

2022-01-27 Thread Richard Henderson
On 1/23/22 05:24, Peter Maydell wrote: The GICR_CTLR.CES bit is a read-only bit which is set to 1 to indicate that the GICR_CTLR.EnableLPIs bit can be written to 0 to disable LPIs (as opposed to allowing LPIs to be enabled but not subsequently disabled). Our implementation permits this, so advert

Re: [PATCH 06/14] hw/intc/arm_gicv3: Honour GICD_CTLR.EnableGrp1NS for LPIs

2022-01-27 Thread Richard Henderson
On 1/23/22 05:24, Peter Maydell wrote: The GICD_CTLR distributor register has enable bits which control whether the different interrupt groups (Group 0, Non-secure Group 1 and Secure Group 1) are forwarded to the CPU. We get this right for traditional interrupts, but forgot to account for it whe

Re: [PATCH 07/14] hw/intc/arm_gicv3_its: Sort ITS command list into numeric order

2022-01-27 Thread Richard Henderson
On 1/23/22 05:24, Peter Maydell wrote: The list of #defines for the ITS command packet numbers is neither in alphabetical nor numeric order. Sort it into numeric order. Signed-off-by: Peter Maydell --- hw/intc/gicv3_internal.h | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-)

Re: [PATCH 04/14] hw/intc/arm_gicv3_its: Don't clear GITS_CREADR when GITS_CTLR.ENABLED is set

2022-01-27 Thread Richard Henderson
On 1/23/22 05:24, Peter Maydell wrote: The current ITS code clears GITS_CREADR when GITS_CTLR.ENABLED is set. This is not correct -- guest code can validly clear ENABLED and then set it again and expect the ITS to continue processing where it left off. Remove the erroneous assignment. Signed-off

Re: [PATCH 05/14] hw/intc/arm_gicv3_its: Don't clear GITS_CWRITER on writes to GITS_CBASER

2022-01-27 Thread Richard Henderson
On 1/23/22 05:24, Peter Maydell wrote: The ITS specification says that when the guest writes to GITS_CBASER this causes GITS_CREADR to be cleared. However it does not have an equivalent clause for GITS_CWRITER. (This is because GITS_CREADR is read-only, but GITS_CWRITER is writable and the gues

Re: [PATCH 03/14] hw/intc/arm_gicv3: Initialise dma_as in GIC, not ITS

2022-01-27 Thread Richard Henderson
On 1/23/22 05:24, Peter Maydell wrote: In our implementation, all ITSes connected to a GIC share a single AddressSpace, which we keep in the GICv3State::dma_as field and initialized based on the GIC's 'sysmem' property. The right place to set it up by calling address_space_init() is therefore in

Re: [PATCH 02/14] hw/intc/arm_gicv3_its: Add tracepoints

2022-01-27 Thread Richard Henderson
On 1/23/22 05:24, Peter Maydell wrote: The ITS currently has no tracepoints; add a minimal set that allows basic monitoring of guest register accesses and reading of commands from the command queue. Signed-off-by: Peter Maydell --- hw/intc/arm_gicv3_its.c | 11 +++ hw/intc/trace-event

Re: [PATCH 01/14] target/arm: Log CPU index in 'Taking exception' log

2022-01-27 Thread Richard Henderson
On 1/23/22 05:24, Peter Maydell wrote: In an SMP system it can be unclear which CPU is taking an exception; add the CPU index (which is the same value used in the TCG 'Trace %d:' logging) to the "Taking exception" log line to clarify it. Signed-off-by: Peter Maydell --- target/arm/internals.h

Re: [PATCH v2 1/1] virtio: fix the condition for iommu_platform not supported

2022-01-27 Thread Halil Pasic
On Thu, 27 Jan 2022 18:34:23 -0300 Daniel Henrique Barboza wrote: > On 1/27/22 10:28, Halil Pasic wrote: > > ping^2 > > > > Also adding Brijesh and Daniel, as I believe you guys should be > > interested in this, and I'm yet to receive review. > > > > @Brijesh, Daniel: Can you confirm that AMD (

Re: [PATCH] hw/sensor: Add SB-TSI Temperature Sensor Interface

2022-01-27 Thread Corey Minyard
On Thu, Jan 27, 2022 at 03:18:43PM -0800, Patrick Venture wrote: > On Thu, Jan 27, 2022 at 10:20 AM Hao Wu wrote: > > > > > On Thu, Jan 27, 2022 at 6:55 AM Corey Minyard wrote: > > > >> On Wed, Jan 26, 2022 at 04:09:03PM -0800, Hao Wu wrote: > >> > Hi, > >> > > >> > Sorry for the late reply. I'm

Re: [PATCH v2] target/riscv: correct "code should not be reached" for x-rv128

2022-01-27 Thread Alistair Francis
On Tue, Jan 25, 2022 at 6:35 AM Frédéric Pétrot wrote: > > The addition of uxl support in gdbstub adds a few checks on the maximum > register length, but omitted MXL_RV128, an experimental feature. > This patch makes rv128 react as rv64, as previously. > > Signed-off-by: Frédéric Pétrot Reviewed

Re: [PATCH v8 20/23] hw/intc: Add RISC-V AIA IMSIC device emulation

2022-01-27 Thread Alistair Francis
On Thu, Jan 20, 2022 at 1:55 AM Anup Patel wrote: > > From: Anup Patel > > The RISC-V AIA (Advanced Interrupt Architecture) defines a new > interrupt controller for MSIs (message signal interrupts) called > IMSIC (Incoming Message Signal Interrupt Controller). The IMSIC > is per-HART device and a

Re: [PATCH v8 21/23] hw/riscv: virt: Add optional AIA IMSIC support to virt machine

2022-01-27 Thread Alistair Francis
On Thu, Jan 20, 2022 at 2:14 AM Anup Patel wrote: > > From: Anup Patel > > We extend virt machine to emulate both AIA IMSIC and AIA APLIC > devices only when "aia=aplic-imsic" parameter is passed along > with machine name in the QEMU command-line. The AIA IMSIC is > only a per-HART MSI controller

Re: [PATCH v2 13/13] hw/intc/arm_gicv3_its: Range-check ICID before indexing into collection table

2022-01-27 Thread Richard Henderson
On 1/12/22 04:10, Peter Maydell wrote: In process_its_cmd(), we read an ICID out of the interrupt table entry, and then use it as an index into the collection table. Add a check that it is within range for the collection table first. This check is not strictly necessary, because: * we range c

Re: [PATCH v2 12/13] hw/intc/arm_gicv3_its: Check indexes before use, not after

2022-01-27 Thread Richard Henderson
On 1/12/22 04:10, Peter Maydell wrote: In a few places in the ITS command handling functions, we were doing the range-check of an event ID or device ID only after using it as a table index; move the checks to before the uses. This misordering wouldn't have very bad effects because the tables are

Re: [PATCH v2 02/13] hw/intc/arm_gicv3_its: Convert int ID check to num_intids convention

2022-01-27 Thread Richard Henderson
On 1/12/22 04:10, Peter Maydell wrote: The bounds check on the number of interrupt IDs is correct, but doesn't match our convention; change the variable name, initialize it to the 2^n value rather than (2^n)-1, and use >= instead of > in the comparison. Signed-off-by: Peter Maydell Reviewed-by:

Re: [PATCH v2 01/13] hw/intc/arm_gicv3_its: Fix event ID bounds checks

2022-01-27 Thread Richard Henderson
On 1/12/22 04:10, Peter Maydell wrote: In process_its_cmd() and process_mapti() we must check the event ID against a limit defined by the size field in the DTE, which specifies the number of ID bits minus one. Convert this code to our num_foo convention: * change the variable names * use uint

[PATCH v3 04/11] 9p: darwin: Handle struct dirent differences

2022-01-27 Thread Will Cohen
From: Keno Fischer On darwin d_seekoff exists, but is optional and does not seem to be commonly used by file systems. Use `telldir` instead to obtain the seek offset. Signed-off-by: Keno Fischer [Michael Roitzsch: - Rebase for NixOS] Signed-off-by: Michael Roitzsch [Will Cohen: - Adjust to pas

[PATCH v3 03/11] 9p: darwin: Handle struct stat(fs) differences

2022-01-27 Thread Will Cohen
From: Keno Fischer Signed-off-by: Keno Fischer Signed-off-by: Michael Roitzsch [Will Cohen: - Note lack of f_namelen and f_frsize on Darwin] Signed-off-by: Will Cohen --- hw/9pfs/9p-proxy.c | 18 +++--- hw/9pfs/9p-synth.c | 2 ++ hw/9pfs/9p.c | 16 ++-- 3 files

[PATCH v3 08/11] 9p: darwin: Compatibility for f/l*xattr

2022-01-27 Thread Will Cohen
From: Keno Fischer On darwin `fgetxattr` takes two extra optional arguments, and the l* variants are not defined (in favor of an extra flag to the regular variants. Signed-off-by: Keno Fischer [Michael Roitzsch: - Rebase for NixOS] Signed-off-by: Michael Roitzsch Signed-off-by: Will Cohen ---

[PATCH v3 00/11] This is a followup to https://lists.gnu.org/archive/html/qemu-devel/2021-11/msg04325.html,

2022-01-27 Thread Will Cohen
Since v2, the following changes have been made: - Re-add incorrectly omitted previous review header to final patch - Remove redundant utimensat backwards compatibility - Set XATTR_SIZE_MAX to 64k - Integrate proposed statfs.h back into file-op-9p.h - Replace clang references with gcc - Ensure th

[PATCH v3 07/11] 9p: darwin: *xattr_nofollow implementations

2022-01-27 Thread Will Cohen
From: Keno Fischer This implements the darwin equivalent of the functions that were moved to 9p-util(-linux) earlier in this series in the new 9p-util-darwin file. Signed-off-by: Keno Fischer [Michael Roitzsch: - Rebase for NixOS] Signed-off-by: Michael Roitzsch Signed-off-by: Will Cohen ---

[PATCH v3 02/11] 9p: Rename 9p-util -> 9p-util-linux

2022-01-27 Thread Will Cohen
From: Keno Fischer The current file only has the Linux versions of these functions. Rename the file accordingly and update the Makefile to only build it on Linux. A Darwin version of these will follow later in the series. Signed-off-by: Keno Fischer [Michael Roitzsch: - Rebase for NixOS] Signed

[PATCH v3 06/11] 9p: darwin: Compatibility defn for XATTR_SIZE_MAX

2022-01-27 Thread Will Cohen
From: Keno Fischer Signed-off-by: Keno Fischer Signed-off-by: Michael Roitzsch [Will Cohen: - Adjust coding style - Lower XATTR_SIZE_MAX to 64k] Signed-off-by: Will Cohen --- hw/9pfs/9p.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/hw/9pfs/9p.c b/hw/9pfs/9p.c index

[PATCH v3 05/11] 9p: darwin: Ignore O_{NOATIME, DIRECT}

2022-01-27 Thread Will Cohen
From: Keno Fischer Darwin doesn't have either of these flags. Darwin does have F_NOCACHE, which is similar to O_DIRECT, but has different enough semantics that other projects don't generally map them automatically. In any case, we don't support O_DIRECT on Linux at the moment either. Signed-off-

[PATCH v3 11/11] 9p: darwin: adjust assumption on virtio-9p-test

2022-01-27 Thread Will Cohen
Signed-off-by: Fabian Franz Signed-off-by: Will Cohen --- tests/qtest/virtio-9p-test.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/qtest/virtio-9p-test.c b/tests/qtest/virtio-9p-test.c index 41fed41de1..6bcf89f0f8 100644 --- a/tests/qtest/virtio-9p-test.c +++ b/test

[PATCH v3 09/11] 9p: darwin: Implement compatibility for mknodat

2022-01-27 Thread Will Cohen
From: Keno Fischer Darwin does not support mknodat. However, to avoid race conditions with later setting the permissions, we must avoid using mknod on the full path instead. We could try to fchdir, but that would cause problems if multiple threads try to call mknodat at the same time. However, lu

[PATCH v3 01/11] 9p: linux: Fix a couple Linux assumptions

2022-01-27 Thread Will Cohen
From: Keno Fischer - Guard Linux only headers. - Add qemu/statfs.h header to abstract over the which headers are needed for struct statfs - Define `ENOATTR` only if not only defined (it's defined in system headers on Darwin). Signed-off-by: Keno Fischer [Michael Roitzsch: - Rebase for

Re: [PATCH v3 02/10] hw/nvram: Restrict fw_cfg QOM interface to sysemu and tools

2022-01-27 Thread Richard Henderson
On 1/12/22 05:43, Philippe Mathieu-Daudé wrote: From: Philippe Mathieu-Daudé fw_cfg QOM interface is required by system emulation and qemu-storage-daemon. User-mode emulation doesn't need it. Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé --- hw/nvram/meson.bui

[PATCH v3 10/11] 9p: darwin: meson: Allow VirtFS on Darwin

2022-01-27 Thread Will Cohen
From: Keno Fischer Signed-off-by: Keno Fischer [Michael Roitzsch: - Rebase for NixOS] Signed-off-by: Michael Roitzsch [Will Cohen: - Rebase to master] Signed-off-by: Will Cohen Reviewed-by: Paolo Bonzini --- fsdev/meson.build | 1 + meson.build | 12 2 files changed, 9 in

Re: [PATCH v3 10/10] hw/dma: Use dma_addr_t type definition when relevant

2022-01-27 Thread Richard Henderson
On 1/12/22 05:43, Philippe Mathieu-Daudé wrote: From: Philippe Mathieu-Daudé Update the obvious places where dma_addr_t should be used (instead of uint64_t, hwaddr, size_t, int32_t types). This allows to have &dma_addr_t type portable on 32/64-bit hosts. Signed-off-by: Philippe Mathieu-Daudé R

Re: [PATCH v3 09/10] hw/dma: Move ScatterGatherEntry / QEMUSGList declarations around

2022-01-27 Thread Richard Henderson
On 1/12/22 05:43, Philippe Mathieu-Daudé wrote: In the next commit we will use the dma_addr_t type in the QEMUSGList structure. Since currently dma_addr_t is defined after QEMUSGList, move the declarations to have dma_addr_t defined first. This is a pure code-movement patch. Suggested-by: David

Re: [PATCH v3 01/10] stubs: Restrict fw_cfg to system emulation

2022-01-27 Thread Richard Henderson
On 1/12/22 05:43, Philippe Mathieu-Daudé wrote: fw_cfg_arch_key_name() stub is only required for sysemu. Signed-off-by: Philippe Mathieu-Daudé --- stubs/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Richard Henderson r~

Re: [PATCH v14 06/10] ACPI ERST: build the ACPI ERST table

2022-01-27 Thread Michael S. Tsirkin
On Thu, Jan 27, 2022 at 04:02:07PM -0600, Eric DeVolder wrote: > Ani, > Thanks for the RB! Inline responses below. > eric > > On 1/27/22 02:36, Ani Sinha wrote: > > > > > > On Wed, 26 Jan 2022, Eric DeVolder wrote: > > > > > This builds the ACPI ERST table to inform OSPM how to communicate > >

Re: [PATCH] target/arm: Use correct entrypoint for SVC taken from Hyp to Hyp

2022-01-27 Thread Richard Henderson
On 1/18/22 00:19, Peter Maydell wrote: The exception caused by an SVC instruction may be taken to AArch32 Hyp mode for two reasons: * HCR.TGE indicates that exceptions from EL0 should trap to EL2 * we were already in Hyp mode The entrypoint in the vector table to be used differs in these two

[PATCH v3] linux-user: Implement starttime field in self stat emulation

2022-01-27 Thread Cameron Esfahani
Instead of always returning 0, return actual starttime. v3: Fix formatting issues v2: Use clock_gettime() instead of scanning /proc/self/stat Signed-off-by: Cameron Esfahani --- linux-user/main.c| 14 ++ linux-user/qemu.h| 3 +++ linux-user/syscall.c | 3 +++ 3 files chang

Re: [PATCH] target/arm: Use correct entrypoint for SVC taken from Hyp to Hyp

2022-01-27 Thread Edgar E. Iglesias
On Thu, Jan 27, 2022 at 6:14 PM Peter Maydell wrote: > Ping for code review? This is a nice short easy one :-) > Looks good comparing with the Pseudocode. I tried reading the chapters about these exceptions but couldn't find a clear description :-) Reviewed-by: Edgar E. Iglesias > > thanks

Re: [RFC PATCH] docs/devel: mention our .editorconfig

2022-01-27 Thread Richard Henderson
On 1/28/22 02:01, Alex Bennée wrote: Ideally we should keep all our automatic formatting gubins in here. Signed-off-by: Alex Bennée --- docs/devel/style.rst | 4 1 file changed, 4 insertions(+) Reviewed-by: Richard Henderson r~

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