Re: [PATCH] target/riscv: fix inverted checks for ext_zb[abcs]

On Tue, Mar 1, 2022 at 11:28 AM Vineet Gupta wrote: > > Hi Alistair, > > On 2/3/22 16:59, Alistair Francis wrote: > > On Fri, Feb 4, 2022 at 1:42 AM Philipp Tomsich > > wrote: > >> > >> While changing to the use of cfg_ptr, the conditions for REQUIRE_ZB[ABCS] > >> inadvertently became inverted

Re: [PATCH v2 3/3] q35: compat: keep hotplugged PCIe device broken after migration for 6.2 and older machine types

On Tue, 1 Mar 2022 10:20:06 -0500 "Michael S. Tsirkin" wrote: > On Tue, Mar 01, 2022 at 10:12:00AM -0500, Igor Mammedov wrote: > > Q35 switched to ACPI PCI hotplug by default in since 6.1 > > machine type and migration worked as expected (with BARs > > on target being the same as on source) > >

Re: propagating vmgenid outward and upward

On Wed, Mar 02, 2022 at 02:42:37AM -0500, Michael S. Tsirkin wrote: > On Tue, Mar 01, 2022 at 07:37:06PM +0100, Jason A. Donenfeld wrote: > > Hi Michael, > > > > On Tue, Mar 1, 2022 at 6:17 PM Michael S. Tsirkin wrote: > > > Hmm okay, so it's a performance optimization... some batching then? Do

Re: propagating vmgenid outward and upward

On Tue, Mar 01, 2022 at 07:37:06PM +0100, Jason A. Donenfeld wrote: > Hi Michael, > > On Tue, Mar 1, 2022 at 6:17 PM Michael S. Tsirkin wrote: > > Hmm okay, so it's a performance optimization... some batching then? Do > > you really need to worry about every packet? Every 64 packets not > >

Re: [PATCH v6 27/43] hw/cxl/host: Add support for CXL Fixed Memory Windows.

Jonathan Cameron via writes: > From: Jonathan Cameron > > The concept of these is introduced in [1] in terms of the > description the CEDT ACPI table. The principal is more general. > Unlike once traffic hits the CXL root bridges, the host system > memory address routing is implementation

Re: [PATCH 20/20] tests: Add postcopy preempt test

On Tue, Mar 01, 2022 at 05:00:15PM +, Dr. David Alan Gilbert wrote: > > That's tricky, and we could have done something better.. E.g., we could > > pass in the MigrateStart** into test_migrate_start() so it can clear it > > when free, that's not silent use-after-free but crashing, which is

Re: [PATCH v4 2/3] hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table

On Wed, Mar 2, 2022 at 12:50 AM Liav Albani wrote: > > > On 3/1/22 11:52, Ani Sinha wrote: > > > > On Tue, 1 Mar 2022, Igor Mammedov wrote: > > > >> On Mon, 28 Feb 2022 22:17:32 +0200 > >> Liav Albani wrote: > >> > >>> This can allow the guest OS to determine more easily if i8042 controller >

Re: [PATCH v4 2/3] hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table

On Wed, Mar 2, 2022 at 12:41 AM Liav Albani wrote: > > > On 3/1/22 13:19, Michael S. Tsirkin wrote: > > On Tue, Mar 01, 2022 at 09:43:54AM +0100, Igor Mammedov wrote: > >> On Mon, 28 Feb 2022 22:17:32 +0200 > >> Liav Albani wrote: > >> > >>> This can allow the guest OS to determine more easily

Re: [PATCH v4 3/3] tests/acpi: i386: update FACP table differences

On Wed, Mar 2, 2022 at 12:43 AM Liav Albani wrote: > > > On 3/1/22 13:21, Michael S. Tsirkin wrote: > > On Tue, Mar 01, 2022 at 08:29:57AM +0530, Ani Sinha wrote: > >> > >> On Mon, 28 Feb 2022, Liav Albani wrote: > >> > >>> After changing the IAPC boot flags register to indicate support of i8042

Re: [PATCH RESEND 2/2] hw/riscv/sifive_u: Resolve redundant property accessors

On Wed, Mar 2, 2022 at 8:57 AM Bernhard Beschow wrote: > > The QOM API already provides accessors for uint32 values, so reuse them. > > Signed-off-by: Bernhard Beschow > Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Alistair Francis Alistair > --- > hw/riscv/sifive_u.c | 24

[ANNOUNCE] SeaBIOS 1.16.0

The 1.16.0 version of SeaBIOS has now been released. For more information on the release, please see: https://seabios.org/Releases New in this release: * SMBIOS v3.0 support on QEMU * Several bug fixes and code cleanups. For information on obtaining SeaBIOS, please see:

RE: [PATCH 3/3] whpx: Added support for breakpoints and stepping

Hi Alex, Is there anything I could do to get the WHPX debugging support accepted into QEMU? Would the proposed callback AccelOpsClass work for you, or would you prefer another approach? Best, Ivan -Original Message- From: Qemu-devel On Behalf Of Ivan Shcherbakov Sent: Monday,

[PATCH v3 7/9] hw/sensor: add Intersil ISL69260 device model

Signed-off-by: Titus Rwantare Reviewed-by: Hao Wu --- MAINTAINERS | 3 + hw/arm/Kconfig | 1 + hw/sensor/Kconfig| 5 + hw/sensor/isl_pmbus_vr.c | 211 + hw/sensor/meson.build| 1 +

[PATCH v3 5/9] hw/i2c: pmbus: update MAINTAINERS

add self to MAINTAINERS for the PMBus subsystem and related sensors, and set PMBus as maintained. Signed-off-by: Titus Rwantare --- MAINTAINERS | 10 ++ 1 file changed, 10 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index fa8adc2618..3601984b5d 100644 --- a/MAINTAINERS +++

[PATCH v3 0/9] This patch series contains updates to PMBus in QEMU along with some PMBus device models for Renesas regulators. I have also added myself to MAINTAINERS as this code is in use daily, whe

v2: - split PMBus commit with updates into individual fixes - renamed isl_pmbus[.ch] adding _vr for voltage regulators v3: - split uint refactor commit and removed commit renaming files - rename rolled into preceding commits - update commit description for uint refactoring change

[PATCH v3 9/9] hw/sensor: add Renesas raa228000 device

Signed-off-by: Titus Rwantare Reviewed-by: Hao Wu --- hw/sensor/isl_pmbus_vr.c | 50 include/hw/sensor/isl_pmbus_vr.h | 1 + tests/qtest/isl_pmbus_vr-test.c | 78 ++-- 3 files changed, 126 insertions(+), 3 deletions(-) diff --git

[PATCH v3 2/9] hw/i2c: pmbus: guard against out of range accesses

Signed-off-by: Titus Rwantare --- hw/i2c/pmbus_device.c | 41 - 1 file changed, 40 insertions(+), 1 deletion(-) diff --git a/hw/i2c/pmbus_device.c b/hw/i2c/pmbus_device.c index 07a45c99f9..93c746bab3 100644 --- a/hw/i2c/pmbus_device.c +++

[PATCH v3 4/9] hw/i2c: pmbus: refactor uint handling

This change cleans up the inputs to pmbus_receive uint, the length of received data is contained in PMBusDevice state and doesn't need to be passed around. Signed-off-by: Titus Rwantare --- hw/i2c/pmbus_device.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff

[PATCH v3 3/9] hw/i2c: pmbus: add PEC unsupported warning

Signed-off-by: Titus Rwantare --- hw/i2c/pmbus_device.c | 5 + 1 file changed, 5 insertions(+) diff --git a/hw/i2c/pmbus_device.c b/hw/i2c/pmbus_device.c index 93c746bab3..6eeb0731d7 100644 --- a/hw/i2c/pmbus_device.c +++ b/hw/i2c/pmbus_device.c @@ -307,6 +307,11 @@ static uint8_t

[PATCH v3 8/9] hw/sensor: add Renesas raa229004 PMBus device

The Renesas RAA229004 is a PMBus Multiphase Voltage Regulator Signed-off-by: Titus Rwantare Reviewed-by: Hao Wu --- hw/sensor/isl_pmbus_vr.c | 18 ++ include/hw/sensor/isl_pmbus_vr.h | 1 + tests/qtest/isl_pmbus_vr-test.c | 8 3 files changed, 27

[PATCH v3 6/9] hw/i2c: Added linear mode translation for pmbus devices

From: Shengtan Mao Signed-off-by: Shengtan Mao Reviewed-by: Titus Rwantare --- hw/i2c/pmbus_device.c | 18 ++ include/hw/i2c/pmbus_device.h | 20 +++- 2 files changed, 37 insertions(+), 1 deletion(-) diff --git a/hw/i2c/pmbus_device.c

[PATCH v3 1/9] hw/i2c: pmbus: add registers

- add the VOUT_MIN and STATUS_MFR registers Signed-off-by: Titus Rwantare --- hw/i2c/pmbus_device.c | 24 include/hw/i2c/pmbus_device.h | 3 +++ 2 files changed, 27 insertions(+) diff --git a/hw/i2c/pmbus_device.c b/hw/i2c/pmbus_device.c index

Re: [PATCH v2 00/25] migration: Postcopy Preemption

On Tue, Mar 01, 2022 at 06:05:50PM +, Daniel P. Berrangé wrote: > On Tue, Mar 01, 2022 at 06:55:00PM +0800, Peter Xu wrote: > > On Tue, Mar 01, 2022 at 10:27:10AM +, Daniel P. Berrangé wrote: > > So what I'm curious is why TLS is getting quite some attentions in the past > > few years but

Re: [PATCH v2 00/25] migration: Postcopy Preemption

On Tue, Mar 01, 2022 at 04:51:09PM +, Dr. David Alan Gilbert wrote: > Hmm, I think it's worth getting TLS working before putting the full > series in, because it might impact the way you wire the channels up - > it's going to take some care; but lets see which parts we can/should > take. IMHO

Re: [PATCH qemu 0/7] Many improvements to HVF memory-related codes

Sorry, I made a mistake. The last line in the function, hvf_find_free_slot, introduced in this commit "hvf: simplify data structures and codes of memory related functions" should be "return NULL;" static hvf_slot *hvf_find_free_slot(void) { hvf_slot *slot; int x; for (x = 0; x <

Re: [PATCH v7 12/14] target/riscv: rvk: add CSR support for Zkr

在 2022/3/1 下午11:59, Richard Henderson 写道: On 2/28/22 16:27, Weiwei Li wrote: 在 2022/3/1 上午9:44, Weiwei Li 写道: 在 2022/3/1 上午4:11, Richard Henderson 写道: On 2/28/22 04:48, Weiwei Li wrote: +/* Crypto Extension */ +static RISCVException rmw_seed(CPURISCVState *env, int csrno, +   

Re: [PATCH v2 4/9] hw/i2c: pmbus: refactor uint handling and update MAINTAINERS

On Tue, Mar 01, 2022 at 04:23:02PM -0800, Titus Rwantare wrote: > Signed-off-by: Titus Rwantare > --- > MAINTAINERS | 10 ++ > hw/i2c/pmbus_device.c | 18 +- > 2 files changed, 19 insertions(+), 9 deletions(-) This makes sense, but can you split it into two

Re: [PATCH v2 9/9] hw/sensor: rename isl_pmbus to isl_pmbus_vr

The rename is from feedback in v1 by Peter. I did this in a separate patch as it's easier to merge, compared to editing the 4 commits affected by this. Titus On Tue, 1 Mar 2022 at 16:43, Corey Minyard wrote: > > On Tue, Mar 01, 2022 at 04:23:07PM -0800, Titus Rwantare wrote: > > Signed-off-by:

[PATCH v2 9/9] hw/sensor: rename isl_pmbus to isl_pmbus_vr

Signed-off-by: Titus Rwantare --- MAINTAINERS | 6 +- hw/arm/Kconfig| 2 +- hw/sensor/Kconfig | 2 +- hw/sensor/{isl_pmbus.c => isl_pmbus_vr.c} | 77 ++--- hw/sensor/meson.build

Re: [PATCH v2 9/9] hw/sensor: rename isl_pmbus to isl_pmbus_vr

On Tue, Mar 01, 2022 at 04:23:07PM -0800, Titus Rwantare wrote: > Signed-off-by: Titus Rwantare Two things: * Why do you want to rename this? * This patch doesn't really add anything, it just renames things in a previous patch. Can it be folded in to the patch that added these fields?

[PATCH v2 0/9] Fixups for PMBus and new sensors

This patch series contains updates to PMBus in QEMU along with some PMBus device models for Renesas regulators. I have also added myself to MAINTAINERS as this code is in use daily, where I am responsible for it. v2: - split PMBus commit with updates into individual fixes - renamed

[PATCH v2 7/9] hw/sensor: add Renesas raa229004 PMBus device

The Renesas RAA229004 is a PMBus Multiphase Voltage Regulator Signed-off-by: Titus Rwantare Reviewed-by: Hao Wu --- hw/sensor/isl_pmbus.c | 18 ++ include/hw/sensor/isl_pmbus.h | 1 + tests/qtest/isl_pmbus-test.c | 8 3 files changed, 27 insertions(+) diff

[PATCH v2 6/9] hw/sensor: add Intersil ISL69260 device model

Signed-off-by: Titus Rwantare Reviewed-by: Hao Wu --- MAINTAINERS | 3 + hw/arm/Kconfig| 1 + hw/sensor/Kconfig | 5 + hw/sensor/isl_pmbus.c | 210 ++ hw/sensor/meson.build | 1 + include/hw/sensor/isl_pmbus.h

[PATCH v2 8/9] hw/sensor: add Renesas raa228000 device

Signed-off-by: Titus Rwantare Reviewed-by: Hao Wu --- hw/sensor/isl_pmbus.c | 50 ++ include/hw/sensor/isl_pmbus.h | 1 + tests/qtest/isl_pmbus-test.c | 78 +-- 3 files changed, 126 insertions(+), 3 deletions(-) diff --git

[PATCH v2 2/9] hw/i2c: pmbus: guard against out of range accesses

Signed-off-by: Titus Rwantare --- hw/i2c/pmbus_device.c | 41 - 1 file changed, 40 insertions(+), 1 deletion(-) diff --git a/hw/i2c/pmbus_device.c b/hw/i2c/pmbus_device.c index 07a45c99f9..93c746bab3 100644 --- a/hw/i2c/pmbus_device.c +++

[PATCH v2 5/9] hw/i2c: Added linear mode translation for pmbus devices

From: Shengtan Mao Signed-off-by: Shengtan Mao Reviewed-by: Titus Rwantare --- hw/i2c/pmbus_device.c | 18 ++ include/hw/i2c/pmbus_device.h | 20 +++- 2 files changed, 37 insertions(+), 1 deletion(-) diff --git a/hw/i2c/pmbus_device.c

[PATCH v2 4/9] hw/i2c: pmbus: refactor uint handling and update MAINTAINERS

Signed-off-by: Titus Rwantare --- MAINTAINERS | 10 ++ hw/i2c/pmbus_device.c | 18 +- 2 files changed, 19 insertions(+), 9 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index fa8adc2618..3601984b5d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3135,6

[PATCH v2 3/9] hw/i2c: pmbus: add PEC unsupported warning

Signed-off-by: Titus Rwantare --- hw/i2c/pmbus_device.c | 5 + 1 file changed, 5 insertions(+) diff --git a/hw/i2c/pmbus_device.c b/hw/i2c/pmbus_device.c index 93c746bab3..6eeb0731d7 100644 --- a/hw/i2c/pmbus_device.c +++ b/hw/i2c/pmbus_device.c @@ -307,6 +307,11 @@ static uint8_t

[PATCH v2 1/9] hw/i2c: pmbus: add registers

- add the VOUT_MIN and STATUS_MFR registers Signed-off-by: Titus Rwantare --- hw/i2c/pmbus_device.c | 24 include/hw/i2c/pmbus_device.h | 3 +++ 2 files changed, 27 insertions(+) diff --git a/hw/i2c/pmbus_device.c b/hw/i2c/pmbus_device.c index

Re: [PATCH v3 10/15] audio: restore mixing-engine playback buffer size

Reviewed-by: Akihiko Odaki On 2022/03/02 4:13, Volker Rümelin wrote: Commit ff095e5231 "audio: api for mixeng code free backends" introduced another FIFO for the audio subsystem with exactly the same size as the mixing-engine FIFO. Most audio backends use this generic FIFO. The generic FIFO

Re: [PATCH v3 01/15] audio: replace open-coded buffer arithmetic

Reviewed-by: Akihiko Odaki On 2022/03/02 4:12, Volker Rümelin wrote: Replace open-coded buffer arithmetic with the new function audio_ring_posb(). That's the position in backward direction of a given point at a given distance. Signed-off-by: Volker Rümelin --- audio/audio.c | 25

Re: propagating vmgenid outward and upward

On Tue, Mar 1, 2022 at 8:41 PM Greg KH wrote: > > On Tue, Mar 01, 2022 at 07:24:11PM +0100, Jason A. Donenfeld wrote: > > Hi Greg, > > > > On Tue, Mar 1, 2022 at 7:01 PM Greg KH wrote: > > > A notifier block like this makes sense, but why tie onto the PM_ stuff? > > > This isn't power management

[PATCH RESEND 2/2] hw/riscv/sifive_u: Resolve redundant property accessors

The QOM API already provides accessors for uint32 values, so reuse them. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé --- hw/riscv/sifive_u.c | 24 1 file changed, 4 insertions(+), 20 deletions(-) diff --git a/hw/riscv/sifive_u.c

[PATCH RESEND 1/2] hw/vfio/pci-quirks: Resolve redundant property getters

The QOM API already provides getters for uint64 and uint32 values, so reuse them. Signed-off-by: Bernhard Beschow Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daudé --- hw/vfio/pci-quirks.c | 34 +- 1 file changed, 9 insertions(+), 25

[PATCH RESEND 0/2] Resolve some redundant property accessors

No changes. Just also CC'ed to qemu-trivial. The QOM API already provides appropriate accessors, so reuse them. Testing done: :$ make check Ok: 570 Expected Fail: 0 Fail: 0 Unexpected Pass:0 Skipped:178 Timeout:0

Re: [PATCH RESEND] virtio/virtio-balloon: Prefer Object* over void* parameter

Am 1. März 2022 22:23:00 UTC schrieb Bernhard Beschow : >*opaque is an alias to *obj. Using the ladder makes the code consistent with >with other devices, e.g. accel/kvm/kvm-all and accel/tcg/tcg-all. It also >makes the cast more typesafe. > >Signed-off-by: Bernhard Beschow >Reviewed-by: David

Re: [PATCH v4 15/18] target/arm: Advertise all page sizes for -cpu max

On Tue, 1 Mar 2022 at 22:00, Richard Henderson wrote: > > We support 16k pages, but do not advertize that in ID_AA64MMFR0. > > The value 0 in the TGRAN*_2 fields indicates that stage2 lookups defer > to the same support as stage1 lookups. This setting is deprecated, so > indicate support for all

Re: [PATCH 03/17] target/ppc: Move 40x CPUs code to their own file

On Tue, 1 Mar 2022, Fabiano Rosas wrote: Affects the 405 CPU. This moves init_proc, init_excp and register_*sprs functions that are related to the 40x CPUs (currently only 405) into a separate file. Signed-off-by: Fabiano Rosas --- target/ppc/cpu_40x.c | 263

Re: [PATCH v2 00/22] isa: Resolve unneeded IRQ attributes from ISADevice

Am 1. März 2022 12:04:24 UTC schrieb "Philippe Mathieu-Daudé" : >On 27/2/22 23:40, Philippe Mathieu-Daudé wrote: >> On 22/2/22 20:34, Bernhard Beschow wrote: >>> v2: >>> The newly QOM'ified devices now report an error to the user in their >>> realize >>> functions if the configured IRQ number is

[PATCH RESEND] virtio/virtio-balloon: Prefer Object* over void* parameter

*opaque is an alias to *obj. Using the ladder makes the code consistent with with other devices, e.g. accel/kvm/kvm-all and accel/tcg/tcg-all. It also makes the cast more typesafe. Signed-off-by: Bernhard Beschow Reviewed-by: David Hildenbrand --- hw/virtio/virtio-balloon.c | 10 +- 1

[PATCH v3 6/7] isa: Drop unused attributes from ISADevice

Now that the last users of ISADevice::isairq[] have been resolved during the previous commits, it can be removed for good. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé --- hw/isa/isa-bus.c | 13 - include/hw/isa/isa.h | 2 -- 2 files changed, 15

[PATCH v3 4/7] hw/isa/isa-bus: Remove isabus_dev_print()

All isabus_dev_print() did was to print up to two IRQ numbers per device. This is redundant if the IRQ numbers are present as QOM properties (see e.g. the modified tests/qemu-iotests/172.out). Now that the last devices relying on isabus_dev_print() had their IRQ numbers QOM'ified, the

[PATCH v3 7/7] isa: Inline and remove one-line isa_init_irq()

isa_init_irq() has become a trivial one-line wrapper for isa_get_irq(). It can therefore be removed. Signed-off-by: Bernhard Beschow Reviewed-by: Stefan Berger (tpm_tis_isa) Acked-by: Corey Minyard (isa_ipmi_bt, isa_ipmi_kcs) Reviewed-by: Philippe Mathieu-Daudé --- hw/audio/cs4231a.c | 2

[PATCH vRESEND] virtio/virtio-balloon: Prefer Object* over void* parameter

*opaque is an alias to *obj. Using the ladder makes the code consistent with with other devices, e.g. accel/kvm/kvm-all and accel/tcg/tcg-all. It also makes the cast more typesafe. Signed-off-by: Bernhard Beschow Reviewed-by: David Hildenbrand --- hw/virtio/virtio-balloon.c | 10 +- 1

Re: [PATCH v3] tests/tcg/s390x: Cleanup of mie3 tests.

On 3/1/22 11:43, David Miller wrote: Adds clobbers and merges remaining separate asm statements. v2 -> v3: * Removed all direct memory references in mie3-sel.c v1 -> v2: * Corrected side in rebase conflict, removing older code. Signed-off-by: David Miller --- tests/tcg/s390x/mie3-compl.c |

[PATCH v3 0/7] isa: Resolve unneeded IRQ attributes from ISADevice

v3: * Use DEFINE_PROP_UINT8 / uint8_t for new IRQ properties. (Philippe) * Use "%u" format when printing maximum allowed IRQ number in error messages. (Philippe) * Use object_property_get_uint() in pnv.c. (Philippe) * Squash cleanup patches (7-22) into "Inline and remove one-line

[PATCH v3 1/7] hw/rtc/mc146818rtc: QOM'ify IRQ number

Exposing the IRQ number as a QOM property not only allows it to be configurable but also to be displayed in HMP: Before: (qemu) info qtree ... dev: mc146818rtc, id "" gpio-out "" 1 base_year = 0 (0x0) lost_tick_policy = "discard" After:

[PATCH v4 18/18] hw/arm/virt: Disable LPA2 for -machine virt-6.2

There is a Linux kernel bug present until v5.12 that prevents booting with FEAT_LPA2 enabled. As a workaround for TCG, disable this feature for machine versions prior to 7.0. Cc: Daniel P. Berrangé Signed-off-by: Richard Henderson --- include/hw/arm/virt.h | 1 + hw/arm/virt.c | 7

[PATCH v4 17/18] target/arm: Provide cpu property for controling FEAT_LPA2

There is a Linux kernel bug present until v5.12 that prevents booting with FEAT_LPA2 enabled. As a workaround for TCG, allow the feature to be disabled from -cpu max. Since this kernel bug is present in the Fedora 31 image that we test in avocado, disable lpa2 on the command-line.

[PATCH v3 3/7] hw/input/pckbd: QOM'ify IRQ numbers

Exposing the IRQ numbers as QOM properties not only allows them to be configurable but also to be printed by standard QOM mechanisms. This allows isabus_dev_print() to be retired eventually. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé --- hw/input/pckbd.c | 26

Re: [PATCH v4 0/7] malta: Fix PCI IRQ levels to be preserved during migration, cleanup

Am 17. Februar 2022 10:19:17 UTC schrieb Bernhard Beschow : >Tested with [1]: > > qemu-system-mipsel -M malta -kernel vmlinux-3.2.0-4-4kc-malta -hda \ > debian_wheezy_mipsel_standard.qcow2 -append "root=/dev/sda1 console=tty0" > >It was possible to log in as root and `poweroff` the machine. >

[PATCH v3 2/7] hw/rtc/m48t59-isa: QOM'ify IRQ number

Exposing the IRQ number as a QOM property not only allows it to be configurable but also to be printed by standard QOM mechanisms. This allows isabus_dev_print() to be retired eventually. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé --- hw/rtc/m48t59-isa.c | 9 -

[PATCH v4 14/18] target/arm: Validate tlbi TG matches translation granule in use

For FEAT_LPA2, we will need other ARMVAParameters, which themselves depend on the translation granule in use. We might as well validate that the given TG matches; the architecture "does not require that the instruction invalidates any entries" if this is not true. Reviewed-by: Peter Maydell

[PATCH v4 15/18] target/arm: Advertise all page sizes for -cpu max

We support 16k pages, but do not advertize that in ID_AA64MMFR0. The value 0 in the TGRAN*_2 fields indicates that stage2 lookups defer to the same support as stage1 lookups. This setting is deprecated, so indicate support for all stage2 page sizes directly. Signed-off-by: Richard Henderson

[PATCH v3 5/7] hw/ppc/pnv: Determine ns16550's IRQ number from QOM property

Determine the IRQ number in the same way as for pnv_dt_ipmi_bt(). This resolves one usage of ISADevice::isairq[] which allows it to be removed eventually. Signed-off-by: Bernhard Beschow Reviewed-by: Cédric Le Goater Reviewed-by: Philippe Mathieu-Daudé --- hw/ppc/pnv.c | 5 - 1 file

[PATCH v4 08/18] target/arm: Prepare DBGBVR and DBGWVR for FEAT_LVA

The original A.a revision of the AArch64 ARM required that we force-extend the addresses in these registers from 49 bits. This language has been loosened via a combination of IMPLEMENTATION DEFINED and CONSTRAINTED UNPREDICTABLE to allow consideration of the entire aligned address. This means

[PATCH v4 12/18] target/arm: Introduce tlbi_aa64_get_range

Merge tlbi_aa64_range_get_length and tlbi_aa64_range_get_base, returning a structure containing both results. Pass in the ARMMMUIdx, rather than the digested two_ranges boolean. This is in preparation for FEAT_LPA2, where the interpretation of 'value' depends on the effective value of DS for the

[PATCH v4 03/18] target/arm: Fault on invalid TCR_ELx.TxSZ

Without FEAT_LVA, the behaviour of programming an invalid value is IMPLEMENTATION DEFINED. With FEAT_LVA, programming an invalid minimum value requires a Translation fault. It is most self-consistent to choose to generate the fault always. Reviewed-by: Peter Maydell Signed-off-by: Richard

[PATCH v4 09/18] target/arm: Implement FEAT_LVA

This feature is relatively small, as it applies only to 64k pages and thus requires no additional changes to the table descriptor walking algorithm, only a change to the minimum TSZ (which is the inverse of the maximum virtual address space size). Note that this feature widens VBAR_ELx, but we

[PATCH v4 16/18] target/arm: Implement FEAT_LPA2

This feature widens physical addresses (and intermediate physical addresses for 2-stage translation) from 48 to 52 bits, when using 4k or 16k pages. This introduces the DS bit to TCR_ELx, which is RES0 unless the page size is enabled and supports LPA2, resulting in the effective value of DS for a

[PATCH v4 13/18] target/arm: Fix TLBIRange.base for 16k and 64k pages

The shift of the BaseADDR field depends on the translation granule in use. Fixes: 84940ed8255 ("target/arm: Add support for FEAT_TLBIRANGE") Reported-by: Peter Maydell Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/helper.c | 5 +++-- 1 file changed, 3

[PATCH v4 04/18] target/arm: Move arm_pamax out of line

We will shortly share parts of this function with other portions of address translation. Reviewed-by: Peter Maydell Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/arm/internals.h | 19 +-- target/arm/helper.c| 22

[PATCH v4 07/18] target/arm: Honor TCR_ELx.{I}PS

This field controls the output (intermediate) physical address size of the translation process. V8 requires to raise an AddressSize fault if the page tables are programmed incorrectly, such that any intermediate descriptor address, or the final translated address, is out of range. Add a PS field

[PATCH v4 10/18] target/arm: Implement FEAT_LPA

This feature widens physical addresses (and intermediate physical addresses for 2-stage translation) from 48 to 52 bits, when using 64k pages. The only thing left at this point is to handle the extra bits in the TTBR and in the table descriptors. Note that PAR_EL1 and HPFAR_EL2 are nominally

[PATCH v4 11/18] target/arm: Extend arm_fi_to_lfsc to level -1

With FEAT_LPA2, rather than introducing translation level 4, we introduce level -1, below the current level 0. Extend arm_fi_to_lfsc to handle these faults. Assert that this new translation level does not leak into fault types for which it is not defined, which allows some masking of fi->level

[PATCH v4 06/18] target/arm: Use MAKE_64BIT_MASK to compute indexmask

The macro is a bit more readable than the inlined computation. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/arm/helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index

[PATCH v4 00/18] target/arm: Implement LVA, LPA, LPA2 features

Changes for v4: * Add cpu property for lpa2. * Disable that property for -machine virt-6.2 and previous. Changes for v3: * Update emulation.rst. * Split out separate update to ID_AA64MMFR0. * Hack for avocado. r~ Richard Henderson (18): hw/registerfields: Add FIELD_SEX and

[PATCH v4 05/18] target/arm: Pass outputsize down to check_s2_mmu_setup

Pass down the width of the output address from translation. For now this is still just PAMax, but a subsequent patch will compute the correct value from TCR_ELx.{I}PS. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/helper.c | 21 ++--- 1 file

[PATCH v4 02/18] target/arm: Set TCR_EL1.TSZ for user-only

Set this as the kernel would, to 48 bits, to keep the computation of the address space correct for PAuth. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c

Re: [PATCH] 9pfs: move qemu_dirent_dup() from osdep -> 9p-util

On Tue, 1 Mar 2022 at 20:47, Christian Schoenebeck wrote: > > Function qemu_dirent_dup() is currently only used by 9pfs server, so move > it from project global header osdep.h to 9pfs specific header 9p-util.h. > > Link: >

[PATCH v4 01/18] hw/registerfields: Add FIELD_SEX and FIELD_SDP

Add new macros to manipulate signed fields within the register. Reviewed-by: Philippe Mathieu-Daudé Suggested-by: Peter Maydell Signed-off-by: Richard Henderson --- include/hw/registerfields.h | 48 - 1 file changed, 47 insertions(+), 1 deletion(-) diff

[PATCH v3] tests/tcg/s390x: Cleanup of mie3 tests.

Adds clobbers and merges remaining separate asm statements. v2 -> v3: * Removed all direct memory references in mie3-sel.c v1 -> v2: * Corrected side in rebase conflict, removing older code. Signed-off-by: David Miller --- tests/tcg/s390x/mie3-compl.c | 18 -

Re: [PATCH v2] tests/tcg/s390x: Cleanup of mie3 tests.

On 3/1/22 10:22, David Miller wrote: However the constraint must be wrong there. Sorry about split message. On Tue, Mar 1, 2022 at 3:21 PM David Miller > wrote: I used #define Fi3(S, ASM) uint64_t S(uint64_t a, uint64_t b, uint64_t c) \ {

[PATCH 1/3] block/copy-before-write: refactor option parsing

We are going to add one more option of enum type. Let's refactor option parsing so that we can simply work with BlockdevOptionsCbw object. Signed-off-by: Vladimir Sementsov-Ogievskiy --- block/copy-before-write.c | 66 --- 1 file changed, 40 insertions(+), 26

[PATCH 3/3] iotests: add copy-before-write: on-cbw-error tests

Add tests for new option of copy-before-write filter: on-cbw-error. Signed-off-by: Vladimir Sementsov-Ogievskiy --- tests/qemu-iotests/tests/copy-before-write| 128 ++ .../qemu-iotests/tests/copy-before-write.out | 5 + 2 files changed, 133 insertions(+) create mode

[PATCH 0/3] block: copy-before-write: on-cbw-error behavior

Hi all! Here is a new option for copy-before-write filter, to alter its behavior on copy-before-write operation failure. Based-on: <20220228113927.1852146-1-vsement...@virtuozzo.com> ([PATCH v5 00/16] Make image fleecing more usable) Vladimir Sementsov-Ogievskiy (3):

[PATCH 2/3] block/copy-before-write: add on-cbw-error open parameter

Currently, behavior on copy-before-write operation failure is simple: report error to the guest. Let's implement alternative behavior: break the whole copy-before-write process (and corresponding backup job or NBD client) but keep guest working. It's needed if we consider guest stability as more

[PATCH] 9pfs: move qemu_dirent_dup() from osdep -> 9p-util

Function qemu_dirent_dup() is currently only used by 9pfs server, so move it from project global header osdep.h to 9pfs specific header 9p-util.h. Link: https://lore.kernel.org/qemu-devel/CAFEAcA_=haunomkd2wursvaaha5mrk22a1ohklwudjk7v6k...@mail.gmail.com/ Based-on:

Re: [PATCH v2] tests/tcg/s390x: Cleanup of mie3 tests.

However the constraint must be wrong there. Sorry about split message. On Tue, Mar 1, 2022 at 3:21 PM David Miller wrote: > I used > > > #define Fi3(S, ASM) uint64_t S(uint64_t a, uint64_t b, uint64_t c) \ > { \ > uint64_t res = 0; \ > asm volatile ( \ >

Re: [PATCH v2] tests/tcg/s390x: Cleanup of mie3 tests.

I used #define Fi3(S, ASM) uint64_t S(uint64_t a, uint64_t b, uint64_t c) \ { \ uint64_t res = 0; \ asm volatile ( \ "ltgr %[c], %[c]\n" \ ASM \ "stg %[c], %[res] " \ : [res] "=" (res) \ : [a] "r" (a), \ [b] "r"

Re: [PATCH v2] tests/tcg/s390x: Cleanup of mie3 tests.

On 3/1/22 09:59, David Miller wrote: +{ \ +uint64_t res = 0; \ +asm volatile ( \ +"lg %%r0, %[c]\n" \ +"ltgr %%r0, %%r0\n" \ +ASM \ +"stg %%r0, %[res] " \ +: [res] "=m" (res) \ +: [a] "r" (a), \ + [b] "r"

Re: [PATCH v9 00/11] 9p: Add support for darwin

On Tue, Mar 1, 2022 at 2:25 PM Christian Schoenebeck wrote: > On Sonntag, 27. Februar 2022 23:35:11 CET Will Cohen wrote: > > This is a followup to > > https://lists.gnu.org/archive/html/qemu-devel/2022-02/msg04391.html, > adding > > 9p server support for Darwin. > > > > Since v8, the following

Re: [PATCH] tests/tcg/s390x: Cleanup of mie3 tests.

Please disregard, v2 sent. On Tue, Mar 1, 2022 at 2:15 PM David Miller wrote: > Adds clobbers and merges remaining separate asm statements. > > Signed-off-by: David Miller > --- > tests/tcg/s390x/mie3-compl.c | 42 +++- > tests/tcg/s390x/mie3-mvcrl.c | 12

[PATCH v2] tests/tcg/s390x: Cleanup of mie3 tests.

Adds clobbers and merges remaining separate asm statements. v1 -> v2: * Corrected side in rebase conflict, removing older code. Signed-off-by: David Miller --- tests/tcg/s390x/mie3-compl.c | 18 +++- tests/tcg/s390x/mie3-mvcrl.c | 12 +++ tests/tcg/s390x/mie3-sel.c | 41

Re: propagating vmgenid outward and upward

On Tue, Mar 01, 2022 at 07:24:11PM +0100, Jason A. Donenfeld wrote: > Hi Greg, > > On Tue, Mar 1, 2022 at 7:01 PM Greg KH wrote: > > A notifier block like this makes sense, but why tie onto the PM_ stuff? > > This isn't power management issues, it's a system-wide change that I am > > sure others

[PATCH] deprecation: x86 default machine types

From: "Dr. David Alan Gilbert" Declare the intent to require a machine type to be specified on x86 system emulation. Signed-off-by: Dr. David Alan Gilbert --- docs/about/deprecated.rst | 8 1 file changed, 8 insertions(+) diff --git a/docs/about/deprecated.rst

Re: [PATCH v4 2/3] hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table

On 3/1/22 11:52, Ani Sinha wrote: On Tue, 1 Mar 2022, Igor Mammedov wrote: On Mon, 28 Feb 2022 22:17:32 +0200 Liav Albani wrote: This can allow the guest OS to determine more easily if i8042 controller is present in the system or not, so it doesn't need to do probing of the controller,

[PATCH v3 13/15] ossaudio: reduce effective playback buffer size

Return the free buffer size for the mmapped case in function oss_buffer_get_free() to reduce the effective playback buffer size. All intermediate audio playback buffers become temporary buffers. Signed-off-by: Volker Rümelin --- audio/ossaudio.c | 7 --- 1 file changed, 4 insertions(+), 3

Re: [PULL 0/3] tcg patch queue

On Mon, 28 Feb 2022 at 18:09, Richard Henderson wrote: > > The following changes since commit 00483d386901173e84c7965f9f0d678791a75e01: > > Merge remote-tracking branch 'remotes/shorne/tags/or1k-pull-request' into > staging (2022-02-28 11:27:16 +) > > are available in the Git repository

Re: [PATCH v9 00/11] 9p: Add support for darwin

On Sonntag, 27. Februar 2022 23:35:11 CET Will Cohen wrote: > This is a followup to > https://lists.gnu.org/archive/html/qemu-devel/2022-02/msg04391.html, adding > 9p server support for Darwin. > > Since v8, the following changes have been made: > > Patch 4/11 (9p: darwin: Handle struct dirent

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