On Tue, Mar 8, 2022 at 8:32 AM Eugenio Perez Martin wrote:
>
> On Tue, Mar 8, 2022 at 8:11 AM Michael S. Tsirkin wrote:
> >
> > On Mon, Mar 07, 2022 at 04:33:34PM +0100, Eugenio Pérez wrote:
> > > Finally offering the possibility to enable SVQ from the command line.
> > >
> > > Signed-off-by: Eug
On Tue, Mar 08, 2022 at 03:14:35PM +0800, Jason Wang wrote:
> On Tue, Mar 8, 2022 at 3:11 PM Michael S. Tsirkin wrote:
> >
> > On Tue, Mar 08, 2022 at 02:03:32PM +0800, Jason Wang wrote:
> > >
> > > 在 2022/3/7 下午11:33, Eugenio Pérez 写道:
> > > > This series enable shadow virtqueue (SVQ) for vhost-v
On Tue, Mar 8, 2022 at 8:11 AM Michael S. Tsirkin wrote:
>
> On Mon, Mar 07, 2022 at 04:33:34PM +0100, Eugenio Pérez wrote:
> > Finally offering the possibility to enable SVQ from the command line.
> >
> > Signed-off-by: Eugenio Pérez
> > ---
> > qapi/net.json| 8 +++-
> > net/vhost-vdp
Sink the bulk of the interrupt processing to the end
of the file. All of the internal interrupt and
non-interrupt exception code shares EH processing.
Signed-off-by: Richard Henderson
---
target/nios2/helper.c | 100 +++---
1 file changed, 25 insertions(+), 7
On Tue, 8 Mar 2022 01:50:11 -0500
"Michael S. Tsirkin" wrote:
> On Mon, Mar 07, 2022 at 09:41:44AM -0500, Steven Sistare wrote:
> > On 3/4/2022 5:41 AM, Igor Mammedov wrote:
> > > On Thu, 3 Mar 2022 12:21:15 -0500
> > > "Michael S. Tsirkin" wrote:
> > >
> > >> On Wed, Dec 22, 2021 at 11:05:
On Tue, Mar 8, 2022 at 3:28 PM Michael S. Tsirkin wrote:
>
> On Tue, Mar 08, 2022 at 03:14:35PM +0800, Jason Wang wrote:
> > On Tue, Mar 8, 2022 at 3:11 PM Michael S. Tsirkin wrote:
> > >
> > > On Tue, Mar 08, 2022 at 02:03:32PM +0800, Jason Wang wrote:
> > > >
> > > > 在 2022/3/7 下午11:33, Eugenio
Implement these out of line, so that tcg global temps
(aka the architectural registers) are synced back to
storage as required. This makes sure that we get the
proper results when status.PRS == status.CRS.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 2 ++
target/nios2/helpe
Decode 'break 1' during translation, rather than doing
it again during exception processing.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 1 +
target/nios2/helper.c| 15 ++-
target/nios2/translate.c | 17 -
3 files changed, 23 insertions(+), 10
Convert to contiguous allocation, as much as possible so far.
The two timer objects are not exposed for subobject allocation.
Signed-off-by: Richard Henderson
---
hw/nios2/10m50_devboard.c | 29 +++--
1 file changed, 15 insertions(+), 14 deletions(-)
diff --git a/hw/nios
From: Amir Gonnen
Demonstrate how to use nios2 VIC on a machine.
Introduce a new machine property to attach a VIC.
When VIC is present, let the CPU know that it should use the
External Interrupt Interface instead of the Internal Interrupt Interface.
The devices on the machine are attached to the
Constrain all references to cpu_R[] to load_gpr and dest_gpr.
This will be required for supporting shadow register sets.
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 144 +++
1 file changed, 55 insertions(+), 89 deletions(-)
diff --git a/ta
We want to move data from the heap into Nios2MachineState,
which is not possible with DEFINE_MACHINE.
Signed-off-by: Richard Henderson
---
hw/nios2/10m50_devboard.c | 28 +---
1 file changed, 25 insertions(+), 3 deletions(-)
diff --git a/hw/nios2/10m50_devboard.c b/hw/ni
Without EIC, this bit is RES1. So set the bit at reset,
and add it to the readonly fields of CR_STATUS.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 1 +
target/nios2/cpu.c | 5 +++--
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/c
Replace current uses of tcg_const_tl, and remove the frees.
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 36
1 file changed, 8 insertions(+), 28 deletions(-)
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index 38e16df459
From: Amir Gonnen
Implement nios2 Vectored Interrupt Controller (VIC).
VIC is connected to EIC. It needs to update rha, ril, rrs and rnmi
fields on Nios2CPU before raising an IRQ.
For that purpose, VIC has a "cpu" property which should refer to the
nios2 cpu and set by the board that connects VIC
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 8
target/nios2/helper.c| 4 ++--
target/nios2/mmu.c | 16
target/nios2/translate.c | 2 +-
4 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu
This is the cpu side of the operation. Register one irq line,
called EIC. Split out the rather different processing to a
separate function.
Delay initialization of gpio irqs until realize. We need to
provide a window after init in which the board can set eic_present.
Signed-off-by: Richard Hen
Do not actually enable them so far, but add all of the
plumbing to address them. Do not enable them for user-only.
Add an env->crs pointer that handles the indirection to
the current register set. Add a nios2_crs() function to
wrap this for normal uses, which hides the difference
between user-on
These symbols become available to the debugger.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 72 ++
1 file changed, 35 insertions(+), 37 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index 3857848f7c..927c4aaa80 100644
Sink the set of env->exception to the end of nios2_cpu_do_interrupt.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h| 4
target/nios2/helper.c | 24 +++-
2 files changed, 7 insertions(+), 21 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
When CRS = 0, we restore from estatus; otherwise from sstatus.
Do not allow reserved status bits to be set via this restore.
Add the fields defined for EIC to status.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 1 +
target/nios2/cpu.c | 16
target/nios
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 23 +++
target/nios2/mmu.c | 16
2 files changed, 23 insertions(+), 16 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index 84138000fa..024ef3ccc0 100644
--- a/target/nios2/cpu.h
+++
Create an array of masks which detail the writable and readonly
bits for each control register. Apply them when writing to
control registers.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 13 ++
target/nios2/cpu.c | 90 +---
target
Add all fields; retain the helper macros for single bit fields.
So far there are no uses of the multi-bit status fields.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 27 ++-
1 file changed, 18 insertions(+), 9 deletions(-)
diff --git a/target/nios2/cpu.h b/t
The only thing this struct is used for is passing startup values
from elfload.c to the cpu. We do not need all registers to be
represented, we do not need the kernel internal stack slots.
The userland argc, argv, and envp values are passed on
the stack, so only SP and PC need updating.
Signed-of
Copy the existing cpu_index into the space reserved for CR_CPUID.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.c | 4
1 file changed, 4 insertions(+)
diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c
index 189adf111c..fbcb4da737 100644
--- a/target/nios2/cpu.c
+++ b/target/nios
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 28 ++--
target/nios2/helper.c| 7 ++-
target/nios2/mmu.c | 33 +++--
target/nios2/translate.c | 2 +-
4 files changed, 36 insertions(+), 34 deletions(-)
diff --git
We don't need to reference them often, and when we do it
is just as easy to load/store from cpu_env directly.
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 21 -
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/target/nios2/translate.c b/target
This interrupt bit is never set, so testing it in
nios2_cpu_has_work is pointless.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 2 --
target/nios2/cpu.c | 2 +-
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index b418deec4c..f5
Do not print control registers for user-only mode.
Rename reserved control registers to "resN", where
N is the control register index.
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/target/ni
From: Amir Gonnen
Split NUM_CORE_REGS into components that can be used elsewhere.
Signed-off-by: Amir Gonnen
Message-Id: <20220303153906.2024748-3-amir.gon...@neuroblade.ai>
[rth: Split out of a larger patch for shadow register sets.]
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h |
From: Amir Gonnen
The implementation of eret will become much more complex
with the introduction of shadow registers.
Signed-off-by: Amir Gonnen
Message-Id: <20220303153906.2024748-3-amir.gon...@neuroblade.ai>
[rth: Split out of a larger patch for shadow register sets.
Directly exit to th
It is cleaner to have a separate name for this variable.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 10 +++-
linux-user/elfload.c| 2 +-
linux-user/nios2/cpu_loop.c | 17 ++---
linux-user/nios2/signal.c | 6 ++---
target/nios2/cpu.c | 8 +
There's nothing about EH that affects translation,
so there's no need to include it in tb->flags.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index f582e52aa4..2a5e070960 10064
Whether the cpu is in user-mode or not is something that we
know at translation-time. We do not need to generate code
after having raised an exception.
Suggested-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 20 +++-
1 file changed, 15 insert
Place the control registers into their own array, env->ctrl[].
Use an anonymous union and struct to give the entries in the
array distinct names, so that one may write env->foo instead
of env->ctrl[CR_FOO].
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 64 ++--
This function is unused. The real computation of this value
is located in nios2_cpu_exec_interrupt.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index 727d31c427..14ed46959e 100644
--- a/t
From: Amir Gonnen
eret instruction is only allowed in supervisor mode.
Reviewed-by: Peter Maydell
Reviewed-by: Richard Henderson
Signed-off-by: Amir Gonnen
Message-Id: <20220303153906.2024748-2-amir.gon...@neuroblade.ai>
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 2 ++
Hi Amir,
I've done a bunch of cleanup which Peter and I had recommended
during review. The major bits are:
* Note reserved bits of control registers, which may include
the entire control register.
* Complete conversion to registerfields.h.
* Use pointer to shadow register set, akin to Sparc wi
On Tue, Mar 8, 2022 at 3:11 PM Michael S. Tsirkin wrote:
>
> On Tue, Mar 08, 2022 at 02:03:32PM +0800, Jason Wang wrote:
> >
> > 在 2022/3/7 下午11:33, Eugenio Pérez 写道:
> > > This series enable shadow virtqueue (SVQ) for vhost-vdpa devices. This
> > > is intended as a new method of tracking the memo
On Mon, Mar 07, 2022 at 04:33:34PM +0100, Eugenio Pérez wrote:
> Finally offering the possibility to enable SVQ from the command line.
>
> Signed-off-by: Eugenio Pérez
> ---
> qapi/net.json| 8 +++-
> net/vhost-vdpa.c | 48
> 2 files chan
On Tue, Mar 08, 2022 at 02:03:32PM +0800, Jason Wang wrote:
>
> 在 2022/3/7 下午11:33, Eugenio Pérez 写道:
> > This series enable shadow virtqueue (SVQ) for vhost-vdpa devices. This
> > is intended as a new method of tracking the memory the devices touch
> > during a migration process: Instead of relay
On Tue, Mar 8, 2022 at 2:56 PM Michael S. Tsirkin wrote:
>
> On Tue, Mar 08, 2022 at 01:56:42PM +0800, Jason Wang wrote:
> > Commit bedd7e93d0196 ("virtio-net: fix use after unmap/free for sg")
> > tries to fix the use after free of the sg by caching the virtqueue
> > elements in an array and unma
On Tue, Mar 08, 2022 at 01:56:42PM +0800, Jason Wang wrote:
> Commit bedd7e93d0196 ("virtio-net: fix use after unmap/free for sg")
> tries to fix the use after free of the sg by caching the virtqueue
> elements in an array and unmap them at once after receiving the
> packets, But it forgot to unmap
On Mon, Mar 07, 2022 at 09:41:44AM -0500, Steven Sistare wrote:
> On 3/4/2022 5:41 AM, Igor Mammedov wrote:
> > On Thu, 3 Mar 2022 12:21:15 -0500
> > "Michael S. Tsirkin" wrote:
> >
> >> On Wed, Dec 22, 2021 at 11:05:15AM -0800, Steve Sistare wrote:
> >>> Allocate anonymous memory using memfd_cre
On Mon, Mar 7, 2022 at 5:34 PM Cédric Le Goater wrote:
>
> If no id is provided, qdev automatically assigns a unique ename with
> the following pattern ".".
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/ssi/aspeed_smc.c | 2 +-
> 1 file changed, 1 inse
On Tue, Mar 8, 2022 at 2:34 PM laokz wrote:
>
> Some qemu-iotests(040 etc) use PCI disk to do test. Without the
> mapping, RISC-V flavor use spike as default machine which has no
> PCI bus, causing test failure.
>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/894
>
> Signed-off-by: Kai
在 2022/3/7 下午11:33, Eugenio Pérez 写道:
This series enable shadow virtqueue (SVQ) for vhost-vdpa devices. This
is intended as a new method of tracking the memory the devices touch
during a migration process: Instead of relay on vhost device's dirty
logging capability, SVQ intercepts the VQ datapl
Commit bedd7e93d0196 ("virtio-net: fix use after unmap/free for sg")
tries to fix the use after free of the sg by caching the virtqueue
elements in an array and unmap them at once after receiving the
packets, But it forgot to unmap the cached elements on error which
will lead to leaking of mapping
On 3/7/22 18:18, Warner Losh wrote:
I have a question related to the user-mode emulation and atomics. I asked on IRC, but
thinking about it, I think it may be too complex to discuss in that medium...
In FreeBSD we have a system call that uses host atomic operations to interact memory that
user
Some qemu-iotests(040 etc) use PCI disk to do test. Without the
mapping, RISC-V flavor use spike as default machine which has no
PCI bus, causing test failure.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/894
Signed-off-by: Kai Zhang
---
Thanks for the detailed info. Corrected S-o-b t
I have a question related to the user-mode emulation and atomics. I asked
on IRC, but thinking about it, I think it may be too complex to discuss in
that medium...
In FreeBSD we have a system call that uses host atomic operations to
interact memory that userland also interacts with using atomic op
I've reviewed all changes, looks good.
Ran all of my own tests including vstrs, all passed.
Thank you for all reviews and changes here.
- David Miller
On Mon, Mar 7, 2022 at 8:54 PM Richard Henderson <
richard.hender...@linaro.org> wrote:
> Hi David,
>
> I've split up the patches a bit, made s
> -Original Message-
> From: Stefano Garzarella [mailto:sgarz...@redhat.com]
> Sent: Monday, March 7, 2022 8:14 PM
> To: Longpeng (Mike, Cloud Infrastructure Service Product Dept.)
>
> Cc: stefa...@redhat.com; m...@redhat.com; coh...@redhat.com;
> pbonz...@redhat.com; Gonglei (Arei) ; Y
For both ldnt1 and stnt1, the meaning of the Rn and Rm are different
from ld1 and st1: the vector and integer registers are reversed, and
the integer register 31 refers to XZR instead of SP.
Secondly, the 64-bit version of ldnt1 was being interpreted as
32-bit unpacked unscaled offset instead of 6
>>> print(add_visual_margin(msg, width=72, name="Commit Message"))
┏━ Commit Message ━━
┃ add_visual_margin() takes a chunk of text and wraps it in a visual
┃ container that force-wraps to a specified width. An optional title
┃ label may be given,
From: David Miller
* tests/tcg/s390x/vxeh2_vcvt.c : vector convert
* tests/tcg/s390x/vxeh2_vs.c: vector shift
* tests/tcg/s390x/vxeh2_vlstr.c : vector load/store reversed
Signed-off-by: David Miller
Message-Id: <20220307020327.3003-8-dmiller...@gmail.com>
Reviewed-by: Richard Henderson
Si
From: David Miller
This includes VLEBR* and VSTEBR* (single element);
VLBRREP (load single element and replicate); and
VLLEBRZ (load single element and zero).
Signed-off-by: David Miller
Message-Id: <20220307020327.3003-6-dmiller...@gmail.com>
[rth: Split out elements (plural) from element (sca
From: David Miller
Signed-off-by: David Miller
Message-Id: <20220307020327.3003-6-dmiller...@gmail.com>
[rth: Split out elements (plural) from element (scalar)
Use tcg little-endian memory ops, plus hswap and wswap.]
Signed-off-by: Richard Henderson
---
target/s390x/tcg/translate_vx.c.in
From: David Miller
Signed-off-by: David Miller
Message-Id: <20220307020327.3003-5-dmiller...@gmail.com>
[rth: Use new hswap and wswap tcg expanders.]
Signed-off-by: Richard Henderson
---
target/s390x/tcg/translate_vx.c.inc | 84 +
target/s390x/tcg/insn-data.def
From: David Miller
Signed-off-by: David Miller
Message-Id: <20220307020327.3003-3-dmiller...@gmail.com>
[rth: Rewrite helpers; fix validation of m6.]
Signed-off-by: Richard Henderson
---
The substring search was incorrect, in that it didn't properly
restart the search when a match failed. Spl
From: David Miller
Signed-off-by: David Miller
Reviewed-by: Richard Henderson
Message-Id: <20220307020327.3003-2-dmiller...@gmail.com>
Signed-off-by: Richard Henderson
---
target/s390x/helper.h | 4 +++
target/s390x/tcg/vec_fpu_helper.c | 31
target/s390x
qemu_img() returning zero ought to be the rule, not the
exception. Remove all explicit checks against the condition in
preparation for making non-zero returns an Exception.
Signed-off-by: John Snow
---
tests/qemu-iotests/163 | 9 +++--
tests/qemu-iotests/216
re-write qemu_img() as a function that will by default raise a
VerboseProcessException (extended from CalledProcessException) on
non-zero return codes. This will produce a stack trace that will show
the command line arguments and return code from the failed process run.
Users that want something m
From: David Miller
Signed-off-by: David Miller
Message-Id: <20220307020327.3003-7-dmiller...@gmail.com>
Reviewed-by: Richard Henderson
Signed-off-by: Richard Henderson
---
target/s390x/gen-features.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/s390x/gen-features.c b/target/s3
This adds an Exception that extends the Python stdlib
subprocess.CalledProcessError.
The difference is that the str() method of this exception also adds the
stdout/stderr logs. In effect, if this exception goes unhandled, Python
will print the output in a visually distinct wrapper to the terminal
When writing zeroes can fall back to a slow write, permitting an
overly large request can become an amplification denial of service
attack in triggering a large amount of work from a small request. But
the whole point of the no fallback flag is to quickly determine if
writing an entire device to z
From: David Miller
Signed-off-by: David Miller
Message-Id: <20220307020327.3003-4-dmiller...@gmail.com>
[rth: Split out of larger patch.]
Signed-off-by: Richard Henderson
---
target/s390x/tcg/translate_vx.c.inc | 47 ++---
target/s390x/tcg/insn-data.def | 6 +++-
The block layer has supported 64-bit block status from drivers since
commit 86a3d5c688 ("block: Add .bdrv_co_block_status() callback",
v2.12) and friends, with individual driver callbacks responsible for
capping things where necessary. Artificially capping things below 2G
in the qemu-io 'map' comm
Copy-paste error from vector load length -- do not write
zeros back to v1 after storing from v1.
Signed-off-by: Richard Henderson
---
target/s390x/tcg/vec_helper.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/s390x/tcg/vec_helper.c b/target/s390x/tcg/vec_helper.c
index ededf13cf0.
Fortify compare_images() to be more discerning about the status codes it
receives. If qemu_img() returns an exit code that implies it didn't
actually perform the comparison, treat that as an exceptional
circumstance and force the caller to be aware of the peril.
If a negative test is desired (perh
Swap half-words (16-bit) and words (32-bit) within a larger value.
Mirrors functions of the same names within include/qemu/bitops.h.
Signed-off-by: Richard Henderson
---
include/tcg/tcg-op.h | 6 ++
tcg/tcg-op.c | 30 ++
2 files changed, 36 insertions(+)
From: Daniel P. Berrangé
This validates that connections to an NBD server where the certificate
hostname does not match will fail. It further validates that using the
new 'tls-hostname' override option can solve the failure.
Reviewed-by: Eric Blake
Signed-off-by: Daniel P. Berrangé
Message-Id:
Hi David,
I've split up the patches a bit, made some improvements to
the shifts and reversals, and fixed a few bugs.
Please especially review vector string search, as that is
has had major changes.
r~
David Miller (9):
target/s390x: vxeh2: vector convert short/32b
target/s390x: vxeh2: vec
V3:
- Rebase on origin/master
- Expand 3/5 to cover new uses upstream
- Fix reflow nit by eblake on 3/5
V2:
- Rebase on top of kwolf's latest PR.
- Adjust tests/graph-changes-while-io in patch 3/5
- Drop eblake's r-b on 3/5.
This is a series I started in response to Thomas Huth's encounteri
From: David Miller
Prior to vector enhancements 2, the shift count was supposed to be equal
for each byte lest the result be unpredictable, which allowed us to assume
that the shift count was the same, and optimize accordingly.
With vector enhancements 2, the shift count is allowed to be differe
From: Daniel P. Berrangé
This validates that connections to an NBD server running on a UNIX
socket can use TLS with pre-shared keys (PSK).
Reviewed-by: Eric Blake
Signed-off-by: Daniel P. Berrangé
Message-Id: <20220304193610.3293146-13-berra...@redhat.com>
[eblake: squash in rebase fix]
Tested
On Mon, Mar 07, 2022 at 04:42:08PM +0100, Vlastimil Babka wrote:
> On 1/18/22 14:21, Chao Peng wrote:
> > This patch introduces memfile_notifier facility so existing memory file
> > subsystems (e.g. tmpfs/hugetlbfs) can provide memory pages to allow a
> > third kernel component to make use of memor
From: Daniel P. Berrangé
Using standard filters is more future proof than rolling our own.
Reviewed-by: Eric Blake
Signed-off-by: Daniel P. Berrangé
Message-Id: <20220304193610.3293146-10-berra...@redhat.com>
Signed-off-by: Eric Blake
---
tests/qemu-iotests/233 | 29 -
From: Daniel P. Berrangé
The TLS usage for NBD was restricted to IP sockets because validating
x509 certificates requires knowledge of the hostname that the client
is connecting to.
TLS does not have to use x509 certificates though, as PSK (pre-shared
keys) provide an alternative credential opti
Spelling fixes, grammar improvements and consistent spacing, noticed
while preparing other patches in this file.
Signed-off-by: Eric Blake
Message-Id: <20211203231539.3900865-2-ebl...@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy
---
nbd/server.c | 13 ++---
1 file changed, 6 in
From: Daniel P. Berrangé
In
commit a71d597b989fd701b923f09b3c20ac4fcaa55e81
Author: Vladimir Sementsov-Ogievskiy
Date: Thu Jun 10 13:08:00 2021 +0300
block/nbd: reuse nbd_co_do_establish_connection() in nbd_open()
the use of the 'hostname' field from the BDRVNBDState struct was
lo
From: Daniel P. Berrangé
Some tests will want to use 'localhost' instead of '127.0.0.1', and
some will use the image options syntax rather than the classic URI
syntax.
Reviewed-by: Eric Blake
Signed-off-by: Daniel P. Berrangé
Message-Id: <20220304193610.3293146-8-berra...@redhat.com>
Signed-of
From: Daniel P. Berrangé
When using the --list option, qemu-nbd acts as an NBD client rather
than a server. As such when using TLS, it has a need to validate
the server certificate. This adds a --tls-hostname option which can
be used to override the default hostname used for certificate
validatio
From: Daniel P. Berrangé
Introduce a filter for the output of qemu-nbd export list so it can be
reused in multiple tests.
The filter is a bit more permissive that what test 241 currently uses,
as its allows printing of the export count, along with any possible
error messages that might be emitte
From: Daniel P. Berrangé
When connecting to an NBD server with TLS and x509 credentials,
the client must validate the hostname it uses for the connection,
against that published in the server's certificate. If the client
is tunnelling its connection over some other channel, however, the
hostname
From: Daniel P. Berrangé
This validates that connections to an NBD server running on a UNIX
socket can use TLS, and require a TLS hostname override to pass
certificate validation.
Reviewed-by: Eric Blake
Signed-off-by: Daniel P. Berrangé
Message-Id: <20220304193610.3293146-12-berra...@redhat.c
The following changes since commit b49872aa8fc0f3f5a3036cc37aa2cb5c92866f33:
Merge remote-tracking branch
'remotes/hreitz-gitlab/tags/pull-block-2022-03-07' into staging (2022-03-07
17:14:09 +)
are available in the Git repository at:
https://repo.or.cz/qemu/ericb.git tags/pull-nbd-2022
From: Daniel P. Berrangé
Currently the TLS session object assumes that the caller will always
provide a hostname when using x509 creds on a client endpoint. This
relies on the caller to detect and report an error if the user has
configured QEMU with x509 credentials on a UNIX socket. The migratio
From: Daniel P. Berrangé
When developing an I/O test it is typical to add some logic to the
test script, run it to view the output diff, and then apply the
output diff to the reference file. This can be drastically simplified
by letting the test runner update the reference file in place.
By sett
From: Philippe Mathieu-Daudé
The following changes since commit b49872aa8fc0f3f5a3036cc37aa2cb5c92866f33:
Merge remote-tracking branch
'remotes/hreitz-gitlab/tags/pull-block-2022-03-07' into staging (2022-03-07
17:14:09 +)
are available in the Git repository at:
https://github.com/ph
From: Bernhard Beschow
isa_init_irq() has become a trivial one-line wrapper for isa_get_irq().
It can therefore be removed.
Signed-off-by: Bernhard Beschow
Reviewed-by: Stefan Berger (tpm_tis_isa)
Acked-by: Corey Minyard (isa_ipmi_bt, isa_ipmi_kcs)
Reviewed-by: Philippe Mathieu-Daudé
Acked-b
On Mon, Mar 07, 2022 at 05:13:16PM +, Peter Maydell wrote:
> On Mon, 7 Mar 2022 at 17:06, Peter Maydell wrote:
> >
> > On Mon, 7 Mar 2022 at 10:01, Michael S. Tsirkin wrote:
> > >
> > > The following changes since commit
> > > 6629bf78aac7e53f83fd0bcbdbe322e2302dfd1f:
> > >
> > > Merge rem
From: Liav Albani
After changing the IAPC boot flags register to indicate support of i8042
in the machine chipset to help the guest OS to determine its existence
"faster", we need to have the updated FACP ACPI binary images in tree.
The ASL changes introduced are shown by the following diff:
@@
From: Liav Albani
This can allow the guest OS to determine more easily if i8042 controller
is present in the system or not, so it doesn't need to do probing of the
controller, but just initialize it immediately, before enumerating the
ACPI AML namespace.
The 8042 bit in IAPC_BOOT_ARCH was introd
From: Sergio Lopez
Add a section explaining how vhost-user is supported on platforms
other than Linux.
Signed-off-by: Sergio Lopez
Reviewed-by: Stefan Hajnoczi
Message-Id: <20220304100854.14829-5-...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
docs/inte
On Mon, Mar 07, 2022 at 08:08:33AM -0500, Jonah Palmer wrote:
> This series introduces new QMP/HMP commands to dump the status of a
> virtio device at different levels.
Fails to build on the build-system-centos job:
libqemu-ppc64-softmmu.fa.p/hw_virtio_virtio.c.o: In function
`qmp_decode_feature
From: Sergio Lopez
When ioeventfd is emulated using qemu_pipe(), only EventNotifier's wfd
can be used for writing.
Use the recently introduced event_notifier_get_wfd() function to
obtain the fd that our peer must use to signal the vring.
Signed-off-by: Sergio Lopez
Reviewed-by: Stefan Hajnoczi
From: Igor Mammedov
COMPAT_PROP_PCP is 'on' by default and it's used for turning
off PCP capability on PCIe slots for 2.0 machine types using
compat machinery.
Drop not needed compat glue as Q35 supports migration starting
from 2.4 machine types.
Signed-off-by: Igor Mammedov
Message-Id: <202202
From: Patrick Venture
This parameter is to be used in the processor_id entry in the type 4
table.
This parameter is set as optional and if left will use the values from
the CPU model.
This enables hiding the host information from the guest and allowing AMD
VMs to run pretending to be Intel for
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