Re: [PATCH qemu v3 03/14] target/riscv: rvv: Early exit when vstart >= vl

在 2022/3/12 下午2:28, ~eopxd 写道: From: eopXD According to v-spec (section 5.4): When vstart ≥ vl, there are no body elements, and no elements are updated in any destination vector register group, including that no tail elements are updated with agnostic values. Signed-off-by: eop Chen Reviewe

[PATCH v3 0/4] hw/arm/virt: Fix CPU's default NUMA node ID

When the CPU-to-NUMA association isn't provided by user, the default NUMA node ID for the specific CPU is returned from virt_get_default_cpu_node_id(). Unfortunately, the default NUMA node ID breaks socket boundary and leads to the broken CPU topology warning message in Linux guest. This series int

[PATCH v3 1/4] hw/arm/virt: Consider SMP configuration in CPU topology

Currently, the SMP configuration isn't considered when the CPU topology is populated. In this case, it's impossible to provide the default CPU-to-NUMA mapping or association based on the socket ID of the given CPU. This takes account of SMP configuration when the CPU topology is populated. The die

[PATCH v3 4/4] hw/arm/virt: Unify ACPI processor ID in MADT and SRAT table

The value of the following field has been used in ACPI PPTT table to identify the corresponding processor. This takes the same field as the ACPI processor ID in MADT and SRAT tables. ms->possible_cpus->cpus[i].props.thread_id Signed-off-by: Gavin Shan --- hw/arm/virt-acpi-build.c | 12 +++

[PATCH 1/5] ppc/pnv: Fix PSI IRQ definition

On HW, the PSI and FSP interrupt levels are muxed under the same interrupt number. For coding reasons, an extra IRQ number was introduced to index register values in an array. It increased the count of IRQs which do not fit in the PSI IRQ range anymore. The PSI and FSP interrupts should be modeled

[PATCH v3 2/4] hw/arm/virt: Fix CPU's default NUMA node ID

When CPU-to-NUMA association isn't explicitly provided by users, the default on is given by mc->get_default_cpu_node_id(). However, the CPU topology isn't fully considered in the default association and this causes CPU topology broken warnings on booting Linux guest. For example, the following war

[PATCH v3 3/4] hw/acpi/aml-build: Use existing CPU topology to build PPTT table

When the PPTT table is built, the CPU topology is re-calculated, but it's unecessary because the CPU topology has been populated in virt_possible_cpu_arch_ids() on arm/virt machine. This avoids to re-calculate the CPU topology by reusing the existing one in ms->possible_cpus. Currently, the only u

[PATCH 0/5] ppc/pnv: Introduce GPIO lines to drive the PSIHB device

Hello, The PSIHB OCC and LPC interrupts are driven by a complex framework using Object links and class handlers. Simplify the whole with GPIO lines. Thanks, C. Cédric Le Goater (5): ppc/pnv: Fix PSI IRQ definition ppc/pnv: Remove PnvLpcController::psi link ppc/pnv: Remove PnvOCC::psi lin

[PATCH 4/5] ppc/pnv: Remove PnvPsiClas::irq_set

All devices raising PSI interrupts are now converted to use GPIO lines and the pnv_psi_irq_set() routines have become useless. Drop them. Signed-off-by: Cédric Le Goater --- include/hw/ppc/pnv_psi.h | 4 hw/ppc/pnv_psi.c | 23 ++- 2 files changed, 6 insertions(+

Re: [PATCH qemu v3 04/14] target/riscv: rvv: Add tail agnostic for vv instructions

在 2022/3/1 下午5:07, ~eopxd 写道: From: eopXD This is the first commit regarding the tail agnostic behavior. Added option 'rvv_ta_all_1s' to enable the behavior, the option is default to false. Signed-off-by: eop Chen Reviewed-by: Frank Chang --- target/riscv/cpu.c | 1

[PATCH 5/5] ppc/pnv: Remove usless checks in set_irq handlers

Signed-off-by: Cédric Le Goater --- hw/ppc/pnv_psi.c | 10 -- 1 file changed, 10 deletions(-) diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 950ecca40573..98045ed3d249 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -219,11 +219,6 @@ static void pnv_psi_power8_set_irq(voi

[PATCH 3/5] ppc/pnv: Remove PnvOCC::psi link

Use an anonymous output GPIO line to connect the OCC device with the PSIHB device and raise the appropriate PSI IRQ line depending on the processor model. Signed-off-by: Cédric Le Goater --- include/hw/ppc/pnv_occ.h | 7 ++- hw/ppc/pnv.c | 12 ++-- hw/ppc/pnv_occ.c

[RFC PATCH v4] hw/nvme:Adding Support for namespace management

From: Naveen Nagar This patch supports namespace management : create and delete operations This patch has been tested with the following command and size of image file for unallocated namespaces is taken as 0GB. nvme_namespace_create will look into the list of unallocated namespaces and it will i

[PATCH 2/5] ppc/pnv: Remove PnvLpcController::psi link

Create an anonymous output GPIO line to connect the LPC device with the PSIHB device and raise the appropriate PSI IRQ line depending on the processor model. A temporary __pnv_psi_irq_set() routine is introduced to handle the transition. It will be removed when all devices raising PSI interrupts a

Re: Re: [PATCH v3 0/6] Support akcipher for virtio-crypto

On 3/23/22 13:17, Eric Biggers wrote: On Wed, Mar 23, 2022 at 10:49:06AM +0800, zhenwei pi wrote: v2 -> v3: - Introduce akcipher types to qapi - Add test/benchmark suite for akcipher class - Seperate 'virtio_crypto: Support virtio crypto asym operation' into: - crypto: Introduce akcipher cr

Re: [PATCH v2 1/2] ci: Add github workflow for getting cirrus working properly

On 22/03/2022 20.14, Yonggang Luo wrote: Signed-off-by: Yonggang Luo Missing patch description ... why is this needed? I can't see anything related to Cirrus-CI in here? --- .github/workflows/main.yml | 29 + MAINTAINERS| 4 +++- 2 files cha

Re: [PATCH qemu v3 00/14] Add tail agnostic behavior for rvv instructions

在 2022/3/23 上午11:58, ~eopxd 写道: According to v-spec, tail agnostic behavior can be either kept as undisturbed or set elements' bits to all 1s. To distinguish the difference of tail policies, QEMU should be able to simulate the tail agnostic behavior as "set tail elements' bits to all 1s". An op

Re: [PATCH v2 1/2] ci: Add github workflow for getting cirrus working properly

On Wed, Mar 23, 2022 at 3:44 PM Thomas Huth wrote: > > On 22/03/2022 20.14, Yonggang Luo wrote: > > Signed-off-by: Yonggang Luo > > Missing patch description ... why is this needed? I can't see anything > related to Cirrus-CI in here? Here is the place report failure https://github.com/qemu/qemu

Re: [PATCH v1 2/9] aspeed/smc: Add AST1030 support

On 3/22/22 03:51, Jamin Lin wrote: From: Steven Lee AST1030 spi controller's address decoding unit is 1MB that is identical to ast2600, but fmc address decoding unit is 512kb. Introduce seg_to_reg and reg_to_seg handlers for ast1030 fmc controller. In addition, add ast1030 fmc, spi1, and spi2 c

Re: [PATCH v1 6/9] aspeed/scu: Add AST1030 support

On 3/22/22 03:51, Jamin Lin wrote: From: Steven Lee Per ast1030_v07.pdf, AST1030 SOC doesn't have SCU300, the pclk divider selection is defined in SCU310[11:8]. Add a get_apb_freq function and a class init handler for ast1030. Signed-off-by: Troy Lee Signed-off-by: Jamin Lin Signed-off-by: S

[PATCH v3 0/3] Windows cirrus ci improvements

V2-V3 update the commit log update MAINTAINERS's properly fixes old MAINTAINERS's pointed path V2: * cirrus/win32: upgrade mingw base packages * ci: Add empty github workflow for reporting historical cirrus result at github * misc: Fixes MAINTAINERS's path .github/workflows/lockdown.yml Yonggang

[PATCH v3 3/3] misc: Fixes MAINTAINERS's path .github/workflows/lockdown.yml

Signed-off-by: Yonggang Luo --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 01d2ce93bd..0e93d02c7e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3615,7 +3615,7 @@ M: Thomas Huth R: Wainer dos Santos Moschetta R: Beraldo Leal

[PATCH v3 2/3] ci: Add empty github workflow for reporting historical cirrus result at github

Looks like https://github.com/lygstate/qemu/actions does Signed-off-by: Yonggang Luo --- .github/workflows/main.yml | 24 MAINTAINERS| 1 + 2 files changed, 25 insertions(+) create mode 100644 .github/workflows/main.yml diff --git a/.github/workflows/m

[PATCH v3 1/3] cirrus/win32: upgrade mingw base packages

This is used to fixes the cirrus failure at https://github.com/qemu/qemu/runs/5652470682 Signed-off-by: Yonggang Luo --- .cirrus.yml | 2 +- .gitlab-ci.d/windows.yml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.cirrus.yml b/.cirrus.yml index 7552d70974..5

Re: [PATCH] iotests: update test owner contact information

On 22/03/2022 18.42, John Snow wrote: Quite a few of these tests have stale contact information. This patch updates the stale ones that I happen to be aware of at the moment. Signed-off-by: John Snow --- tests/qemu-iotests/025 | 2 +- tests/qemu-iotests/027 | 2 +- tests/qemu-iotests/028 |

Re: Problem to compile on windows 10

On 22/03/2022 23.00, axe.test2 wrote: Hi, i would to compile QEMU with a 3DFX-Patch but i have problems to do it. I tested to compile QEMU alone and i have the same problems. First after compiling it will ask for libzstd.dll, i found the github project and downloaded the dll... but there is a

[PATCH] vdpa: Avoid reset when stop device

From: Michael Qiu Currently, when VM poweroff, it will trigger vdpa device(such as mlx bluefield2 VF) reset twice, this leads to below issue: vhost VQ 2 ring restore failed: -22: Invalid argument (22) This because in vhost_dev_stop(), qemu tries to stop the device, then stop the queue: vhost_vi

[PATCH] build: disable fcf-protection on -march=486 -m16

From: Christian Ehrhardt Some of the roms build with -march=i486 -m16 which is incompatible with -fcf-protection. That in turn is can be set by default, for example in Ubuntu [1]. That causes: cc1: error: ‘-fcf-protection’ is not compatible with this target This won't work on -march=i486 -m16 a

[PATCH] hw/char/serial: Support serial_mm_init() with wakeup event.

Although the "wakeup" parameter is declared in SerialState, but there is no function actually setting it up. Support "wakeup" as parameter in serial_mm_init(). We also add a new parameter "wakeup_reason" to let users specify their own wakeup event id. Signed-off-by: Dylan Jhong --- hw/arm/allwi

Re: [PATCH] vdpa: Avoid reset when stop device

Adding Eugenio, and Ling Shan. On Wed, Mar 23, 2022 at 4:58 PM <08005...@163.com> wrote: > > From: Michael Qiu > > Currently, when VM poweroff, it will trigger vdpa > device(such as mlx bluefield2 VF) reset twice, this leads > to below issue: > > vhost VQ 2 ring restore failed: -22: Invalid argu

Re: [PATCH v2 1/2] ci: Add github workflow for getting cirrus working properly

On Wed, Mar 23, 2022 at 03:14:08AM +0800, Yonggang Luo wrote: > Signed-off-by: Yonggang Luo > --- > .github/workflows/main.yml | 29 + > MAINTAINERS| 4 +++- > 2 files changed, 32 insertions(+), 1 deletion(-) > create mode 100644 .github/workflows/mai

Re: [PATCH v3 2/3] ci: Add empty github workflow for reporting historical cirrus result at github

On Wed, Mar 23, 2022 at 04:07:54PM +0800, Yonggang Luo wrote: > Looks like https://github.com/lygstate/qemu/actions does > > Signed-off-by: Yonggang Luo > --- > .github/workflows/main.yml | 24 > MAINTAINERS| 1 + > 2 files changed, 25 insertions(+) > c

Re: [PATCH] hw/char/serial: Support serial_mm_init() with wakeup event.

On Wed, 23 Mar 2022 at 09:20, Dylan Jhong wrote: > > Although the "wakeup" parameter is declared in SerialState, > but there is no function actually setting it up. > Support "wakeup" as parameter in serial_mm_init(). This patch seems to provide a new argument which every caller passes the same va

Re: [PATCH] build: disable fcf-protection on -march=486 -m16

On 23/03/2022 10.07, christian.ehrha...@canonical.com wrote: From: Christian Ehrhardt Some of the roms build with -march=i486 -m16 which is incompatible with -fcf-protection. That in turn is can be set by default, for example in Ubuntu [1]. That causes: cc1: error: ‘-fcf-protection’ is not co

[RESEND 1/2] qga: Introduce NVMe disk bus type

Assigning a NVMe disk by VFIO or emulating a NVMe controller by QEMU, a NVMe disk get exposed in guest side. Support NVMe disk bus type and implement posix version. Test PCI passthrough case: ~#virsh qemu-agent-command buster '{"execute":"guest-get-disks"}' | jq ... { "name": "/dev/nvm

[RESEND 2/2] qga: Introduce disk smart

After assigning a NVMe/SCSI controller to guest by VFIO, we lose everything on the host side. A guest uses these devices exclusively, we usually don't care the actions on these devices. But there is a low probability that hitting physical hardware warning, we need a chance to get the basic smart lo

[RESEND 0/2] Introduce NVMe type and Smart for qga

Introduce NVMe disk type for qga firstly, then support SMART in the response of command "guest-get-disks". Originally I sent the 2 patch separately, because the second patch is dependent on the first one. So resend them in a patchset. Zhenwei Pi (2): qga: Introduce NVMe disk bus type qga: In

Re: [PATCH v2 0/3] iotests: Check for zstd support

On 02.03.22 13:45, Hanna Reitz wrote: Hi, v1 cover letter: https://lists.nongnu.org/archive/html/qemu-devel/2022-02/msg04592.html We have two tests (as far as I know) that use compression_type=zstd for qcow2 but do not check whether that is actually supported. Thomas reported this for 065, bu

Re: [RESEND 1/2] qga: Introduce NVMe disk bus type

On 23/3/22 11:19, zhenwei pi wrote: Assigning a NVMe disk by VFIO or emulating a NVMe controller by QEMU, a NVMe disk get exposed in guest side. Support NVMe disk bus type and implement posix version. Test PCI passthrough case: ~#virsh qemu-agent-command buster '{"execute":"guest-get-disks"}' |

Re: [PATCH-for-7.0] build: disable fcf-protection on -march=486 -m16

On 23/3/22 10:07, christian.ehrha...@canonical.com wrote: From: Christian Ehrhardt Some of the roms build with -march=i486 -m16 which is incompatible with -fcf-protection. That in turn is can be set by default, for example in Ubuntu [1]. That causes: cc1: error: ‘-fcf-protection’ is not compa

[PATCH v3 0/3] iotests: Check for zstd support

Hi, v1 cover letter: https://lists.nongnu.org/archive/html/qemu-devel/2022-02/msg04592.html v2 cover letter: https://lists.nongnu.org/archive/html/qemu-block/2022-03/msg00041.html Thanks a lot for the review and testing on v2; but I missed that I’d have to send v3 because qemu_img_pipe_and_statu

[PATCH v3 2/3] iotests/065: Check for zstd support

Some test cases run in iotest 065 want to run with zstd compression just for added coverage. Run them with zlib if there is no zstd support compiled in. Reported-by: Thomas Huth Fixes: 12a936171d71f839dc907ff ("iotest 065: explicit compression type") Signed-off-by: Hanna Reitz --- tests/qemu-i

[PATCH v3 1/3] iotests.py: Add supports_qcow2_zstd_compression()

Suggested-by: Vladimir Sementsov-Ogievskiy Signed-off-by: Hanna Reitz --- tests/qemu-iotests/iotests.py | 20 1 file changed, 20 insertions(+) diff --git a/tests/qemu-iotests/iotests.py b/tests/qemu-iotests/iotests.py index fcec3e51e5..fe10a6cf05 100644 --- a/tests/qemu-iot

[PATCH v3 3/3] iotests/303: Check for zstd support

303 runs two test cases, one of which requires zstd support. Unfortunately, given that this is not a unittest-style test, we cannot easily skip that single case, and instead can only skip the whole test. (Alternatively, we could split this test into a zlib and a zstd part, but that seems excessive

Re: [PATCH v3 3/3] misc: Fixes MAINTAINERS's path .github/workflows/lockdown.yml

On 23/3/22 09:07, Yonggang Luo wrote: Signed-off-by: Yonggang Luo --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 01d2ce93bd..0e93d02c7e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3615,7 +3615,7 @@ M: Thomas Huth R: Wa

Re: [PATCH-for-7.0 v3 1/2] qemu-binfmt-conf.sh: allow elf EI_ABIVERSION=1 for mips

On 14/3/22 22:33, Andreas K. Hüttel wrote: With the command line flag -mplt and a recent toolchain, ELF binaries generated by gcc can obtain EI_ABIVERSION=1, see below, which makes, e.g., gcc three-stage bootstrap in a mips-unknown-linux-gnu qemu-user chroot fail since the binfmt-misc magic does

Re: [PATCH v1 1/5] kvm,memory: Optimize dirty page collection for dirty ring

Thank you very much for your review comments. on 3/23/2022 12:59 PM, Hyman Huang wrote: 在 2022/3/23 11:18, wuc...@chinatelecom.cn 写道: From: Chongyun Wu When log_sync_global of dirty ring is called, it will collect dirty pages on all cpus, including all dirty pages on memslot, so when memory

[RFC PATCH v2 0/4] RISC-V Smstateen support

This series adds support for the Smstateen specification which provides a mechanism plug potential covert channels which are opened by extensions that add to processor state that may not get context-switched. Currently access to AIA registers, *envcfg registers and floating point(fcsr) is controlle

[RFC PATCH v2 1/4] target/riscv: Add smstateen support

Smstateen extension specifies a mechanism to close the potential covert channels that could cause security issues. This patch adds the CSRs defined in the specification and the corresponding predicates and read/write functions. Signed-off-by: Mayuresh Chitale --- target/riscv/cpu.c | 2 +

[RFC PATCH v2 2/4] target/riscv: smstateen check for h/senvcfg

Accesses to henvcfg, henvcfgh and senvcfg are allowed only if corresponding bit in mstateen0/hstateen0 is enabled. Otherwise an illegal instruction trap is generated. Signed-off-by: Mayuresh Chitale --- target/riscv/csr.c | 82 ++ 1 file changed, 76 in

[RFC PATCH v2 3/4] target/riscv: smstateen check for fcsr

If smstateen is implemented and sstateen0.fcsr is clear then the floating point operations must return illegal instruction exception. Signed-off-by: Mayuresh Chitale --- target/riscv/csr.c | 24 1 file changed, 24 insertions(+) diff --git a/target/riscv/csr.c b/target/r

[RFC 1/8] blkio: add io_uring block driver using libblkio

libblkio (https://gitlab.com/libblkio/libblkio/) is a library for high-performance disk I/O. It currently supports io_uring with additional drivers planned. One of the reasons for developing libblkio is that other applications besides QEMU can use it. This will be particularly useful for vhost-use

[RFC 3/8] block: pass size to bdrv_unregister_buf()

The only implementor of bdrv_register_buf() is block/nvme.c, where the size is not needed when unregistering a buffer. This is because util/vfio-helpers.c can look up mappings by address. Future block drivers that implement bdrv_register_buf() may not be able to do their job given only the buffer

[RFC PATCH v2 4/4] target/riscv: smstateen check for AIA/IMSIC

If smstateen is implemented then accesses to AIA registers CSRS, IMSIC CSRs and other IMSIC registers is controlled by setting of corresponding bits in mstateen/hstateen registers. Otherwise an illegal instruction trap or virtual instruction trap is generated. Signed-off-by: Mayuresh Chitale ---

[RFC 4/8] block: add BDRV_REQ_REGISTERED_BUF request flag

Block drivers may optimize I/O requests accessing buffers previously registered with bdrv_register_buf(). Checking whether all elements of a request's QEMUIOVector are within previously registered buffers is expensive, so we need a hint from the user to avoid costly checks. Add a BDRV_REQ_REGISTER

[RFC 2/8] numa: call ->ram_block_removed() in ram_block_notifer_remove()

When a RAMBlockNotifier is added, ->ram_block_added() is called with all existing RAMBlocks. There is no equivalent ->ram_block_removed() call when a RAMBlockNotifier is removed. The util/vfio-helpers.c code (the sole user of RAMBlockNotifier) is fine with this asymmetry because it does not rely o

[RFC 0/8] blkio: add libblkio BlockDriver

This patch series adds a QEMU BlockDriver for libblkio (https://gitlab.com/libblkio/libblkio/), a library for high-performance block device I/O. Currently libblkio has basic io_uring support with additional drivers in development. The first patch adds the core BlockDriver and most of the libblkio

Re: [PATCH v1 1/2] s390x/cpu_models: drop "msa5" from the TCG "max" model

On Tue, Mar 22 2022, David Hildenbrand wrote: > We don't include the "msa5" feature in the "qemu" model because it > generates a warning. The PoP states: > > "The message-security-assist extension 5 requires > the secure-hash-algorithm (SHA-512) capabilities of > the message-security-assist exten

[PULL for 7.0 0/8] i386, docs, gitlab fixes

The following changes since commit 15ef89d2a1a7b93845a6b09c2ee8e1979f6eb30b: Update version for v7.0.0-rc1 release (2022-03-22 22:58:44 +) are available in the Git repository at: https://github.com/stsquad/qemu.git tags/pull-fixes-for-7.0-230322-1 for you to fetch changes up to 0f37cf2f

[RFC 7/8] blkio: implement BDRV_REQ_REGISTERED_BUF optimization

Avoid bounce buffers when QEMUIOVector elements are within previously registered bdrv_register_buf() buffers. The idea is that emulated storage controllers will register guest RAM using bdrv_register_buf() and set the BDRV_REQ_REGISTERED_BUF on I/O requests. Therefore no blkio_add_mem_region() cal

[RFC 5/8] block: add BlockRAMRegistrar

Emulated devices and other BlockBackend users wishing to take advantage of blk_register_buf() all have the same repetitive job: register RAMBlocks with the BlockBackend using RAMBlockNotifier. Add a BlockRAMRegistrar API to do this. A later commit will use this from hw/block/virtio-blk.c. Signed-

[PULL 1/8] tests/Makefile.include: Let "make clean" remove the TCG tests, too

From: Thomas Huth "make clean" should clear all binaries that have been built, but so far it left the TCG tests still in place. Let's make sure that they are now removed, too. Signed-off-by: Thomas Huth Reviewed-by: Richard Henderson Message-Id: <20220301085900.1443232-1-th...@redhat.com> Sign

[RFC 6/8] stubs: add memory_region_from_host() and memory_region_get_fd()

The blkio block driver will need to look up the file descriptor for a given pointer. This is possible in softmmu builds where the memory API is available for querying guest RAM. Add stubs so tools like qemu-img that link the block layer still build successfully. In this case there is no guest RAM

[PULL 7/8] docs: remove qemu_logo.pdf

As far as I can tell nothing in the source tree uses this file. The original comment mentions texi2pdf and I think that was all culled when we switched to our rst documentation pipeline. Fixes: 4ac2ee194b ("docs/interop: Convert qemu-qmp-ref to rST") Cc: Marc-André Lureau Signed-off-by: Alex Benn

[PULL 5/8] semihosting: clean up handling of expanded argv

Another cleanup patch tripped over the fact we weren't being careful in our casting. Fix the casts, allow for a non-const and switch from g_realloc to g_renew. The whole semihosting argument handling could do with some tests though. Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé

[RFC 8/8] virtio-blk: use BDRV_REQ_REGISTERED_BUF optimization hint

Register guest RAM using BlockRAMRegistrar and set the BDRV_REQ_REGISTERED_BUF flag so block drivers can optimize memory accesses in I/O requests. This is for vdpa-blk, vhost-user-blk, and other I/O interfaces that rely on DMA mapping/unmapping. Signed-off-by: Stefan Hajnoczi --- include/hw/vir

[PULL 2/8] target/i386: force maximum rounding precision for fildl[l]

The instruction description says "It is loaded without rounding errors." which implies we should have the widest rounding mode possible. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/888 Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Message-Id: <20220315121251.2280317-4-ale

[PULL 4/8] docs/devel: try and impose some organisation

We have a growing set of developer docs but the index is currently in order of when stuff was added. Try and make things a bit easier to find my adding sub indexes and organising into themes. Signed-off-by: Alex Bennée Reviewed-by: Kashyap Chamarthy Message-Id: <20220315121251.2280317-7-alex.ben

[PATCH] KVM: x86: workaround invalid CPUID[0xD, 9] info on some AMD processors

Some AMD processors expose the PKRU extended save state even if they do not have the related PKU feature in CPUID. Worse, when they do they report a size of 64, whereas the expected size of the PKRU extended save state is 8, therefore the esa->size == eax assertion does not hold. The state is alr

Re: [PATCH v1 2/2] s390x/cpu_models: make "max" match the unmodified "qemu" CPU model under TCG

On Tue, Mar 22 2022, David Hildenbrand wrote: > Before we were able to bump up the qemu CPU model to a z13, we included > some experimental features during development in the "max" model only. > Nowadays, the "max" model corresponds exactly to the "qemu" CPU model > of the latest QEMU machine und

Re: [PATCH v3 0/4] Improve integration of iotests in the meson test harness

On 21.03.22 18:26, Thomas Huth wrote: On 21/03/2022 17.14, Hanna Reitz wrote: On 23.02.22 10:38, Thomas Huth wrote: Though "make check-block" is currently already run via the meson test runner, it still looks like an oddball in the output of "make check". It would be nicer if the iotests would

[PATCH-for-7.0 1/2] block: Fix misleading hexadecimal format

From: Philippe Mathieu-Daudé "0x%u" format is very misleading, replace by "0x%x". Found running: $ git grep -E '0x%[0-9]*([lL]*|" ?PRI)[dDuU]' block/ Inspired-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- block/parallels-ext.c | 2 +- 1 file changed, 1 insertion(+), 1 de

[PATCH] github: fix config mistake preventing repo lockdown commenting

The config key names were all wrong, resulting in the repo lockdown throwing warnings: Unexpected input(s) 'pull-comment', 'lock-pull', 'close-pull', valid inputs are ['github-token', 'exclude-issue-created-before', 'exclude-issue-labels', 'issue-labels', 'issue-comment', 'skip-closed-issu

[PULL 3/8] mailmap/gitdm: more fixes for bad tags and authors

I was running some historical tags for the last 10 years and got the following warnings: git log --use-mailmap --numstat --since "June 2010" | ~/src/gitdm.git/gitdm -n -l 5 alar...@ddci.com is an author name, probably not what you want bad utf-8 ('utf-8' codec can't decode byte 0xe4 in posi

Re: [PATCH v3 2/3] ci: Add empty github workflow for reporting historical cirrus result at github

On Wed, Mar 23, 2022 at 5:33 PM Daniel P. Berrangé wrote: > > On Wed, Mar 23, 2022 at 04:07:54PM +0800, Yonggang Luo wrote: > > Looks like https://github.com/lygstate/qemu/actions does > > > > Signed-off-by: Yonggang Luo > > --- > > .github/workflows/main.yml | 24 > > M

[PATCH-for-7.0 2/2] hw: Fix misleading hexadecimal format

From: Philippe Mathieu-Daudé "0x%u" format is very misleading, replace by "0x%x". Found running: $ git grep -E '0x%[0-9]*([lL]*|" ?PRI)[dDuU]' hw/ Inspired-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/sgx.c| 2 +- hw/i386/trace-events | 6 +++--- hw/misc

[PULL 8/8] docs/tcg-plugins: document QEMU_PLUGIN behaviour

From: Christoph Muellner QEMU plugins can be loaded via command line arguments or via the QEMU_PLUGIN environment variable. Currently, only the first method is documented. Let's document QEMU_PLUGIN. As drive-by cleanup, this patch fixes the path to the plugins in the same section of the documen

Re: [PATCH v3 2/3] iotests/065: Check for zstd support

23.03.2022 13:55, Hanna Reitz wrote: Some test cases run in iotest 065 want to run with zstd compression just for added coverage. Run them with zlib if there is no zstd support compiled in. Reported-by: Thomas Huth Fixes: 12a936171d71f839dc907ff ("iotest 065: explicit compression type") Signed-

Re: [PATCH v3 1/3] iotests.py: Add supports_qcow2_zstd_compression()

23.03.2022 13:55, Hanna Reitz wrote: Suggested-by: Vladimir Sementsov-Ogievskiy Signed-off-by: Hanna Reitz --- tests/qemu-iotests/iotests.py | 20 1 file changed, 20 insertions(+) diff --git a/tests/qemu-iotests/iotests.py b/tests/qemu-iotests/iotests.py index fcec3e51e

Re: Re: [RESEND 1/2] qga: Introduce NVMe disk bus type

On 3/23/22 18:53, Philippe Mathieu-Daudé wrote: On 23/3/22 11:19, zhenwei pi wrote: Assigning a NVMe disk by VFIO or emulating a NVMe controller by QEMU, a NVMe disk get exposed in guest side. Support NVMe disk bus type and implement posix version. Test PCI passthrough case: ~#virsh qemu-age

[PULL 6/8] gitlab: include new aarch32 job in custom-runners

Without linking it in it won't be presented on the UI. Also while doing that fix the misnamed job from 20.40 to 20.04. Fixes: cc44a16002 ("gitlab: add a new aarch32 custom runner definition") Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20220315121954.2283887-1-ale

Re: [PATCH-for-7.0 1/2] block: Fix misleading hexadecimal format

On 23.03.22 12:47, Philippe Mathieu-Daudé wrote: From: Philippe Mathieu-Daudé "0x%u" format is very misleading, replace by "0x%x". Found running: $ git grep -E '0x%[0-9]*([lL]*|" ?PRI)[dDuU]' block/ Inspired-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- block/paralle

Re: [PATCH-for-7.0 1/2] block: Fix misleading hexadecimal format

On Wed, Mar 23, 2022 at 12:47:17PM +0100, Philippe Mathieu-Daudé wrote: > From: Philippe Mathieu-Daudé > > "0x%u" format is very misleading, replace by "0x%x". > > Found running: > > $ git grep -E '0x%[0-9]*([lL]*|" ?PRI)[dDuU]' block/ > > Inspired-by: Richard Henderson > Signed-off-by: Phi

[PATCH-for-7.0 0/2] misc: Fix misleading hexadecimal format

From: Philippe Mathieu-Daudé Fix 0x%d misleading format reported here: https://lore.kernel.org/qemu-devel/dab530d9-53d2-3d7d-c9ac-44906ba9b...@linaro.org/ Philippe Mathieu-Daudé (2): block: Fix misleading hexadecimal format hw: Fix misleading hexadecimal format block/parallels-ext.c | 2 +-

Re: [PATCH v1 1/8] migration: Implemented new parameter stream_content

23.03.2022 13:53, Nikita Lapshin wrote: From: Nikita Lapshin You'd better change author of commit, to keep signed-off-by email and author email to be the same thing. This new optional parameter contains inormation about migration stream parts to be sent (such as RAM, block, bitmap). This l

Re: [PATCH] iotests: update test owner contact information

On 23.03.22 09:39, Thomas Huth wrote: On 22/03/2022 18.42, John Snow wrote: Quite a few of these tests have stale contact information. This patch updates the stale ones that I happen to be aware of at the moment. Signed-off-by: John Snow ---   tests/qemu-iotests/025 | 2 +-   tests/qemu-iotests

Re: [PATCH-for-7.0 2/2] hw: Fix misleading hexadecimal format

On Wed, Mar 23, 2022 at 12:47:18PM +0100, Philippe Mathieu-Daudé wrote: > From: Philippe Mathieu-Daudé > > "0x%u" format is very misleading, replace by "0x%x". > > Found running: > > $ git grep -E '0x%[0-9]*([lL]*|" ?PRI)[dDuU]' hw/ > > Inspired-by: Richard Henderson > Signed-off-by: Philip

[PATCH] configure: remove dead int128 test

Signed-off-by: Paolo Bonzini --- configure | 18 -- 1 file changed, 18 deletions(-) diff --git a/configure b/configure index 6d9cb23ac5..7c08c18358 100755 --- a/configure +++ b/configure @@ -2463,24 +2463,6 @@ else # "$safe_stack" = "" fi fi -#

Re: [PATCH v3 0/6] Support akcipher for virtio-crypto

Cc'ing Daniel & Laurent. On 23/3/22 03:49, zhenwei pi wrote: v2 -> v3: - Introduce akcipher types to qapi - Add test/benchmark suite for akcipher class - Seperate 'virtio_crypto: Support virtio crypto asym operation' into: - crypto: Introduce akcipher crypto class - virtio-crypto: Introduc

Re: [PATCH v3 0/6] Support akcipher for virtio-crypto

On Wed, Mar 23, 2022 at 10:49:06AM +0800, zhenwei pi wrote: > v2 -> v3: > - Introduce akcipher types to qapi > - Add test/benchmark suite for akcipher class > - Seperate 'virtio_crypto: Support virtio crypto asym operation' into: > - crypto: Introduce akcipher crypto class > - virtio-crypto: In

Re: [PATCH] KVM: x86: workaround invalid CPUID[0xD,9] info on some AMD processors

On Wed, Mar 23, 2022 at 12:43:15PM +0100, Paolo Bonzini wrote: > Some AMD processors expose the PKRU extended save state even if they do not > have > the related PKU feature in CPUID. Worse, when they do they report a size of > 64, whereas the expected size of the PKRU extended save state is 8, t

Re: [PATCH v1 2/8] migration: should_skip() implemented

23.03.2022 13:53, Nikita Lapshin wrote: From: Nikita Lapshin For next changes it is convenient to make all decisions about sections skipping in one function. Signed-off-by: Nikita Lapshin --- migration/savevm.c | 54 -- 1 file changed, 28 inserti

Re: [PATCH v1 5/8] migration: Add block part of migration stream

23.03.2022 13:53, Nikita Lapshin wrote: From: Nikita Lapshin This enable and disable block in migration stream. Signed-off-by: Nikita Lapshin --- migration/migration.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/migration/migration.c b/migration/migration.c in

Re: [PATCH v1 3/8] migration: Add vmstate part of migration stream

23.03.2022 15:40, Vladimir Sementsov-Ogievskiy wrote: 23.03.2022 13:53, Nikita Lapshin wrote: From: Nikita Lapshin Now we can disable and enable vmstate part by stream_content parameter. Signed-off-by: Nikita Lapshin ---   migration/migration.c | 10 --   migration/savevm.c    | 13 ++

Re: [RFC PATCH v2 2/4] target/riscv: smstateen check for h/senvcfg

在 2022/3/23 下午7:13, Mayuresh Chitale 写道: Accesses to henvcfg, henvcfgh and senvcfg are allowed only if corresponding bit in mstateen0/hstateen0 is enabled. Otherwise an illegal instruction trap is generated. Signed-off-by: Mayuresh Chitale --- target/riscv/csr.c | 82 +++

Re: [PATCH v1 4/8] migration: Add dirty-bitmaps part of migration stream

23.03.2022 13:53, Nikita Lapshin wrote: From: Nikita Lapshin This enable and disable dirty-bitmaps in migration stream. Signed-off-by: Nikita Lapshin --- migration/migration.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/migration/migration.c b/migration/migrat

Re: [PATCH v1 3/8] migration: Add vmstate part of migration stream

23.03.2022 13:53, Nikita Lapshin wrote: From: Nikita Lapshin Now we can disable and enable vmstate part by stream_content parameter. Signed-off-by: Nikita Lapshin --- migration/migration.c | 10 -- migration/savevm.c| 13 + 2 files changed, 21 insertions(+), 2 dele

Re: [RFC PATCH v2 1/4] target/riscv: Add smstateen support

在 2022/3/23 下午7:13, Mayuresh Chitale 写道: Smstateen extension specifies a mechanism to close the potential covert channels that could cause security issues. This patch adds the CSRs defined in the specification and the corresponding predicates and read/write functions. Signed-off-by: Mayuresh

Re: [RFC PATCH v2 4/4] target/riscv: smstateen check for AIA/IMSIC

在 2022/3/23 下午7:13, Mayuresh Chitale 写道: If smstateen is implemented then accesses to AIA registers CSRS, IMSIC CSRs and other IMSIC registers is controlled by setting of corresponding bits in mstateen/hstateen registers. Otherwise an illegal instruction trap or virtual instruction trap is gene

Re: [PATCH] configure: remove dead int128 test

On 23/03/2022 12.50, Paolo Bonzini wrote: Signed-off-by: Paolo Bonzini --- configure | 18 -- 1 file changed, 18 deletions(-) diff --git a/configure b/configure index 6d9cb23ac5..7c08c18358 100755 --- a/configure +++ b/configure @@ -2463,24 +2463,6 @@ else # "$safe_stack" = "

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