On Fri, May 20, 2022, at 11:31 AM, Sean Christopherson wrote:
> But a dedicated KVM ioctl() to add/remove shared ranges would be easy
> to implement
> and wouldn't necessarily even need to interact with the memslots. It
> could be a
> consumer of memslots, e.g. if we wanted to disallow regis
On 5/18/22 02:13, Michael Tokarev wrote:
Hi!
Here's an interesting bug. Interesting because qemu-user does not run under
qemu-system.
Running 7.0.0 qemu-aarch64-static under 7.0.0 qemu-system-x86_64 -enable-kvm
with
default cpu type, getting:
What is the test case?
I thought I'd be able t
On 5/13/22 03:00, Florian Weimer wrote:
What's QEMU's approach to emulating CPU instructions that atomatically
operate on values larger than what is supported by the host CPU?
I assume that for full system emulation, this is not a problem, but
qemu-user will not achieve atomic behavior on shared
Hello, I believe I have solved the underlying issue with the attached
patch. Verified against the behavior of an actual i440FX IDE controller.
See https://lists.nongnu.org/archive/html/qemu-
devel/2022-05/msg04229.html .
** Patch added:
"0001-ide_ioport_read-Return-lower-octet-of-data-register-.
bdrv_co_drain() has not been used since commit 9a0cec664eef ("mirror:
use bdrv_drained_begin/bdrv_drained_end") in 2016. Remove it so there
are fewer drain scenarios to worry about.
Use bdrv_drained_begin()/bdrv_drained_end() instead. They are "mixed"
functions that can be called from coroutine co
On 20/05/2022 19:00, Bernhard Beschow wrote:
v2:
* Omit removal of isa_connect_gpio_out() (Mark)
v1:
This patch series contains random cleanups that I made while studying the code.
Bernhard Beschow (10):
hw: Reuse TYPE_I8042 define
hw/audio/cs4231a: Const'ify global tables
hw/i386/pc:
On 20/05/2022 19:01, Bernhard Beschow wrote:
etsec_create() wraps qdev API which is outdated. It is also unused,
so remove it.
Signed-off-by: Bernhard Beschow
Reviewed-by: Philippe Mathieu-Daudé
---
hw/net/fsl_etsec/etsec.c | 23 ---
hw/net/fsl_etsec/etsec.h | 7 --
On 20/05/2022 19:01, Bernhard Beschow wrote:
TYPE_I8042 is exported, so reuse it for consistency.
Signed-off-by: Bernhard Beschow
Reviewed-by: Philippe Mathieu-Daudé
---
hw/i386/pc.c | 4 ++--
hw/sparc64/sun4u.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/
On 20/05/2022 18:45, Bernhard Beschow wrote:
Exposing the io_base offset as a QOM property not only allows it to be
configurable but also to be displayed in HMP:
Before:
(qemu) info qtree
...
dev: mc146818rtc, id ""
gpio-out "" 1
base_year = 0 (0x0)
On 20/05/2022 18:45, Bernhard Beschow wrote:
Since commit 3b004a16540aa41f2aa6a1ceb0bf306716766914 'hw/rtc/
mc146818rtc: QOM'ify IRQ number' mc146818rtc's IRQ number is
configurable. Fix microvm-dt to respect its value.
Signed-off-by: Bernhard Beschow
---
hw/i386/microvm-dt.c | 2 +-
1 file
Queued, thanks.
Paolo
On 4/29/22 16:40, Jonathan Cameron via wrote:
From: Jonathan Cameron
There are going to be some potential overheads to CXL enablement,
for example the host bridge region reserved in memory maps.
Add a machine level control so that CXL is disabled by default.
Signed-off-by: Jonathan Cameron
Re
On 4/29/22 16:40, Jonathan Cameron via wrote:
From: Jonathan Cameron
The concept of these is introduced in [1] in terms of the
description the CEDT ACPI table. The principal is more general.
Unlike once traffic hits the CXL root bridges, the host system
memory address routing is implementation
On Fri, May 20, 2022 at 8:33 PM Maciej S. Szmigiero
wrote:
>
> From: "Maciej S. Szmigiero"
>
> Since KVM commit 5f76f6f5ff96 ("KVM: nVMX: Do not expose MPX VMX controls
> when guest MPX disabled")
> it is not possible to disable MPX on a "-cpu host" just by adding "-mpx"
> there if the host CPU
On 13/05/2022 18:54, Bernhard Beschow wrote:
During the previous changesets the create() functions became trivial
wrappers around more generic functions. Modernize the code.
Signed-off-by: Bernhard Beschow
---
hw/i386/pc_piix.c | 6 +-
hw/isa/piix3.c| 16 ---
On 13/05/2022 18:54, Bernhard Beschow wrote:
The piix3 and piix4 southbridge devices still rely on create() functions which
are deprecated. This series resolves these functions piece by piece to
modernize the code.
Both devices are modified in lockstep where possible to provide more context.
T
On 13/05/2022 18:54, Bernhard Beschow wrote:
Initialize the SM bus just like is done for piix3 which modernizes the
code.
Signed-off-by: Bernhard Beschow
---
hw/isa/piix4.c| 15 +++
hw/mips/malta.c | 7 ++-
include/hw/southbridge/piix.h | 2 +
On 13/05/2022 18:54, Bernhard Beschow wrote:
Modernizes the code and even saves a few lines.
Signed-off-by: Bernhard Beschow
---
hw/i386/pc_piix.c | 3 ++-
hw/isa/piix3.c| 3 +--
hw/isa/piix4.c| 6 +-
hw/mips/malta.c | 3 ++-
On 13/05/2022 18:54, Bernhard Beschow wrote:
PCI interrupt wiring and device creation (piix4 only) were performed
in create() functions which are obsolete. Move these tasks into QOM
functions to modernize the code.
In order to avoid duplicate checking for xen_enabled() the piix3 realize
methods
On 13/05/2022 18:54, Bernhard Beschow wrote:
The pci_map_irq_fn's were implemented below type_init() which made them
inaccessible to QOM functions. So move them up.
Signed-off-by: Bernhard Beschow
---
hw/isa/piix3.c | 22 +++---
hw/isa/piix4.c | 50 +-
On 13/05/2022 18:54, Bernhard Beschow wrote:
TYPE_PIIX3_PCI_DEVICE resides there as well.
Signed-off-by: Bernhard Beschow
---
include/hw/isa/isa.h | 2 --
include/hw/southbridge/piix.h | 2 ++
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/hw/isa/isa.h b/in
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