On Sat, Jun 11, 2022 at 11:36:58AM +0800, zhenwei pi wrote:
> There are two parts in this patch:
> 1, support akcipher service by cryptodev-builtin driver
> 2, virtio-crypto driver supports akcipher service
>
> In principle, we should separate this into two patches, to avoid
> compiling error,
There are two parts in this patch:
1, support akcipher service by cryptodev-builtin driver
2, virtio-crypto driver supports akcipher service
In principle, we should separate this into two patches, to avoid
compiling error, merge them into one.
Then virtio-crypto gets request from guest side, and
v8 - v9:
- Fix compiling error reported by clang-13/14:
opt->hash_alg = cryptodev_builtin_get_rsa_hash_algo(); this leads
implicit convertion from 'int' to 'uint32'. 'if (opt->hash_alg < 0)'
is always false. Thanks to Philippe Mathieu-Daudé.
v7 - v8:
- The changes of QEMU crypto has been
On 2022/6/11 上午6:45, Richard Henderson wrote:
On 6/9/22 23:53, gaosong wrote:
Hi Richard,
On 2022/6/10 上午2:42, Richard Henderson wrote:
void helper_asrtle_d(CPULoongArchState *env, target_ulong rj,
target_ulong rk)
{
if (rj > rk) {
+#ifdef CONFIG_USER_ONLY
+
On 6/11/22 02:05, Richard Henderson wrote:
On 6/10/22 08:55, Philippe Mathieu-Daudé wrote:
On 10/6/22 09:59, Michael S. Tsirkin wrote:
From: zhenwei pi
+static int cryptodev_builtin_set_rsa_options(
+ int virtio_padding_algo,
+ int virtio_hash_algo,
+
Thanks!
maybe QOP stands for QEMU OPs? that's maybe.
On Fri, Jun 10, 2022 at 6:31 PM Paolo Bonzini wrote:
> On 6/10/22 04:01, Liu Jaloo wrote:
> > Dear Paul Brook:
> > in qemu/tcg/README:
> > "
> > ...
> > QOP code generator written by Paul Brook.
> > ...
> > "
> >
> > Is there some text about
On Fri, Jun 10, 2022 at 11:05:13AM -0700, Richard Henderson wrote:
> On 6/10/22 08:55, Philippe Mathieu-Daudé wrote:
> > On 10/6/22 09:59, Michael S. Tsirkin wrote:
> > > From: zhenwei pi
> > > +static int cryptodev_builtin_set_rsa_options(
> > > + int virtio_padding_algo,
> >
On Fri, Jun 10, 2022 at 05:55:16PM +0200, Philippe Mathieu-Daudé wrote:
> On 10/6/22 09:59, Michael S. Tsirkin wrote:
> > From: zhenwei pi
> >
> > There are two parts in this patch:
> > 1, support akcipher service by cryptodev-builtin driver
> > 2, virtio-crypto driver supports akcipher service
Hi,
on today's upstream of b3cd3b5a66f0dddfe3d5ba2bef13cd4f5b89cde9, I am
seeing failures with the Haiku VM building test:
FAILED: libqemuutil.a.p/util_cutils.c.o
cc -m64 -mcx16 -Ilibqemuutil.a.p -I. -I../src -Iqapi -Itrace -Iui
-Iui/shader -I/packages/glib2-2.68.4-2/.self/develop/headers
This test doesn't appear to work for me:
def build_image(self, img):
cimg =
self._download_with_cache("https://cloud.centos.org/centos/8/x86_64/images/CentOS-8-GenericCloud-8.3.2011-20201204.2.x86_64.qcow2;)
img_tmp = img + ".tmp"
subprocess.check_call(["ln", "-f", cimg, img_tmp])
On 6/10/22 09:07, Peter Maydell wrote:
Just flushing my target-arm queue since I won't be working next week :-)
-- PMM
The following changes since commit b3cd3b5a66f0dddfe3d5ba2bef13cd4f5b89cde9:
Merge tag 'pull-riscv-to-apply-20220610' of github.com:alistair23/qemu into
staging (2022-06
On 6/9/22 23:53, gaosong wrote:
Hi Richard,
On 2022/6/10 上午2:42, Richard Henderson wrote:
void helper_asrtle_d(CPULoongArchState *env, target_ulong rj, target_ulong rk)
{
if (rj > rk) {
+#ifdef CONFIG_USER_ONLY
+ cpu_loop_exit_sigsegv(env_cpu(env), GETPC(),
+
When iotests are invoked manually from
e.g. $build/tests/qemu-iotests/check, it is not necessarily guaranteed
that we'll have run 'check-venv' yet.
With this patch, teach testenv.py how to create its own environment.
Note: this self-bootstrapping is fairly rudimentary and will miss
certain
This patch adds the 'check-venv' target as a requisite of all meson
driven check-* targets. As of this commit, it will only install the
"qemu" namespace package from the source tree, and nothing else.
In the future, the "qemu" namespace package in qemu.git will begin to
require an external
Ubuntu needs "python3-venv" in order to create virtual environments, and
NetBSD needs "py37-pip" in order to do the same.
Signed-off-by: John Snow
---
tests/vm/netbsd | 1 +
tests/vm/ubuntu.i386 | 9 ++---
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/tests/vm/netbsd
The version of pip ("20.0.2") that ships with Ubuntu 20.04 has a bug
where it will try to attempt building a wheel even if the "wheel" python
package that enables it to do so is not installed. Even though pip
continues gracefully from source, The result is a lot of irrelevant
failure output.
Essentially, the changes to testenv.py here mimic the changes that occur when
you "source venv/bin/activate.fish" or similar.
(1) update iotest's internal notion of which python binary to use,
(2) export the VIRTUAL_ENV variable,
(3) front-load the venv/bin directory to PATH.
If the venv
This patch uses a dummy package and setup.cfg/setup.py files to manage
optional dependency groups for the test venv specification. Now, there's
a core set of dependencies which for now includes just "qemu" (but soon,
qemu.qmp) and a separate, optional 'avocado' group that includes
This splits the venv creation logic out of the Makefile and into a
Python script.
One reason for doing this is to be able to call the venv bootstrapper
from places outside of the Makefile, e.g. configure and iotests. Another
reason is to be able to add "offline" logic to modify the behavior of
Hi, here's another RFC for bringing external Python dependencies to the
QEMU test suite.
This patchset is not without some problems that need to be solved, but
I've been sitting on these long enough and they need to see the light of
day.
Problems I am aware of, and there's a few:
- Ubuntu 18.04
On 10/06/2022 22.41, John Snow wrote:
Hi Alex:
The Ubuntu 18.04 image is by now quite old and we could move our
support forward to Ubuntu 20.04. I have an interest in doing so in
order to avoid a version of pip that is old enough as to cause
problems for some Python work I am attempting to do
In xen_pt_config_reg_init(), there is an error in the merging of the
emulated data with the host value. With the current Qemu, instead of
merging the emulated bits with the host bits as defined by emu_mask,
the inverse of the emulated bits is merged with the host bits. In some
cases, depending on
Currently we are creating a register group for the Intel IGD OpRegion
for every device we pass through, but the XEN_PCI_INTEL_OPREGION
register group is only valid for an Intel IGD. Add a check to make
sure the device is an Intel IGD and a check that the administrator has
enabled gfx_passthru in
Hi Connie,
On 5/12/22 15:11, Cornelia Huck wrote:
> We need to disable migration, as we do not yet have a way to migrate
> the tags as well.
This patch does much more than adding a migration blocker ;-) you may
describe the new cpu option and how it works.
>
> Signed-off-by: Cornelia Huck
> ---
Hi Alex:
The Ubuntu 18.04 image is by now quite old and we could move our
support forward to Ubuntu 20.04. I have an interest in doing so in
order to avoid a version of pip that is old enough as to cause
problems for some Python work I am attempting to do in order to split
the QMP library fully
Hi Connie,
On 5/12/22 15:11, Cornelia Huck wrote:
> This series enables MTE for kvm guests, if the kernel supports it.
> Lightly tested while running under the simulator (the arm64/mte/
> kselftests pass... if you wait patiently :)
>
> A new cpu property "mte" (defaulting to on if possible) is
at:
git://git.kraxel.org/qemu tags/kraxel-20220610-pull-request
for you to fetch changes up to 02319a4d67d3f19039127b8dc9ca9478b6d6ccd8:
virtio-gpu: Respect UI refresh rate for EDID (2022-06-10 11:11:44 +0200)
usb: add CanoKey
Forward remote device's interrupts to the guest
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
---
include/hw/pci/msi.h | 1 +
include/hw/pci/msix.h | 1 +
include/hw/pci/pci.h | 13 +++
Determine the BARs used by the PCI device and register handlers to
manage the access to the same.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
include/exec/memory.h | 3 +
hw/remote/vfio-user-obj.c
Define and register callbacks to manage the RAM regions used for
device DMA
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
hw/remote/machine.c | 5
hw/remote/vfio-user-obj.c | 55
Allow hotplugging of PCI(e) devices to remote machine
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
hw/remote/machine.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/hw/remote/machine.c
Setup a handler to run vfio-user context. The context is driven by
messages to the file descriptor associated with it - get the fd for
the context and hook up the handler with it
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan
add the libvfio-user library as a submodule. build it as a meson
subproject.
libvfio-user is distributed with BSD 3-Clause license and
json-c with MIT (Expat) license
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
Assign separate address space for each device in the remote processes.
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
include/hw/remote/iommu.h | 40
hw/remote/iommu.c | 131
Adds handler to reset a remote device
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
hw/remote/vfio-user-obj.c | 20
1 file changed, 20 insertions(+)
diff --git a/hw/remote/vfio-user-obj.c
Define vfio-user object which is remote process server for QEMU. Setup
object initialization functions and properties necessary to instantiate
the object
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
Find the PCI device with specified id. Initialize the device context
with the QEMU PCI device
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
hw/remote/vfio-user-obj.c | 67 +++
Add vfio-user to x-remote machine. It is a boolean, which indicates if
the machine supports vfio-user protocol. The machine configures the bus
differently vfio-user and multiprocess protocols, so this property
informs it on how to configure the bus.
This property should be short lived. Once
Define and register handlers for PCI config space accesses
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
hw/remote/vfio-user-obj.c | 51 +++
hw/remote/trace-events| 2 ++
create a context with the vfio-user library to run a PCI device
Signed-off-by: Elena Ufimtseva
Signed-off-by: John G Johnson
Signed-off-by: Jagannathan Raman
Reviewed-by: Stefan Hajnoczi
---
hw/remote/vfio-user-obj.c | 82 +++
1 file changed, 82
Add blocker to prevent hot-unplug of devices
TYPE_VFIO_USER_SERVER, which is introduced shortly, attaches itself to a
PCIDevice on which it depends. If the attached PCIDevice gets removed
while the server in use, it could cause it crash. To prevent this,
TYPE_VFIO_USER_SERVER adds an unplug
Hi,
This is v11 of the server side changes to enable vfio-user in QEMU.
Thank you for reviewing and sharing your feedback for the previous
revision. We have addressed your comments in this revision.
We made the following changes in this series:
[PATCH v11 13/14] vfio-user: handle device
On Fri, Jun 10, 2022, Andy Lutomirski wrote:
> On Mon, Apr 25, 2022 at 1:31 PM Sean Christopherson wrote:
> >
> > On Mon, Apr 25, 2022, Andy Lutomirski wrote:
> > >
> > >
> > > On Mon, Apr 25, 2022, at 6:40 AM, Chao Peng wrote:
> > > > On Sun, Apr 24, 2022 at 09:59:37AM -0700, Andy Lutomirski
On Mon, Apr 25, 2022 at 1:31 PM Sean Christopherson wrote:
>
> On Mon, Apr 25, 2022, Andy Lutomirski wrote:
> >
> >
> > On Mon, Apr 25, 2022, at 6:40 AM, Chao Peng wrote:
> > > On Sun, Apr 24, 2022 at 09:59:37AM -0700, Andy Lutomirski wrote:
> > >>
> >
> > >>
> > >> 2. Bind the memfile to a VM
From: Matheus Ferst
Implements the Convert Declets To Binary Coded Decimal instruction.
Since libdecnumber doesn't expose the methods for direct conversion
(decDigitsFromDPD, DPD2BCD, etc), a positive decimal32 with zero
exponent is used as an intermediate value to convert the declets.
From: Matheus Ferst
Implements the Convert Binary Coded Decimal To Declets instruction.
Since libdecnumber doesn't expose the methods for direct conversion
(decDigitsToDPD, BCD2DPD, etc.), the BCD values are converted to
decimal32 format, from which the declets are extracted.
Where the behavior
Signed-off-by: Víctor Colombo
---
target/ppc/insn32.decode | 5
target/ppc/translate/fp-impl.c.inc | 41 ++
2 files changed, 46 insertions(+)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 8954a13d6b..da507758b8 100644
---
Signed-off-by: Víctor Colombo
---
target/ppc/insn32.decode | 1 +
target/ppc/translate/fp-impl.c.inc | 38 +-
target/ppc/translate/fp-ops.c.inc | 2 --
3 files changed, 17 insertions(+), 24 deletions(-)
diff --git a/target/ppc/insn32.decode
Signed-off-by: Víctor Colombo
---
target/ppc/insn32.decode | 8 +++
target/ppc/internal.h | 3 --
target/ppc/translate/fp-impl.c.inc | 83 +++---
target/ppc/translate/fp-ops.c.inc | 4 --
4 files changed, 50 insertions(+), 48 deletions(-)
diff
Signed-off-by: Víctor Colombo
---
target/ppc/insn32.decode | 4
target/ppc/translate/fp-impl.c.inc | 35 +++---
target/ppc/translate/fp-ops.c.inc | 1 -
3 files changed, 21 insertions(+), 19 deletions(-)
diff --git a/target/ppc/insn32.decode
Add mffsce test to check both the return value and the new fpscr
stored in the cpu.
Signed-off-by: Víctor Colombo
---
tests/tcg/ppc64/Makefile.target | 1 +
tests/tcg/ppc64le/Makefile.target | 1 +
tests/tcg/ppc64le/mffsce.c| 37 +++
3 files changed, 39
Some lines in insn32.decode have inconsistent alignment when compared
to others.
Fix this by changing the alignment of some lines, making it more
consistent throughout the file.
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
target/ppc/insn32.decode | 24
From: Matheus Ferst
Implements the following Power ISA v2.06 instruction:
addg6s: Add and Generate Sixes
Signed-off-by: Matheus Ferst
Signed-off-by: Víctor Colombo
---
target/ppc/insn32.decode | 4 +++
target/ppc/translate/fixedpoint-impl.c.inc | 37 ++
Signed-off-by: Víctor Colombo
---
target/ppc/insn32.decode | 4 +++
target/ppc/translate/fp-impl.c.inc | 46 +++---
target/ppc/translate/fp-ops.c.inc | 2 --
3 files changed, 20 insertions(+), 32 deletions(-)
diff --git a/target/ppc/insn32.decode
From: Matheus Ferst
Adds an insns_flags2 for the BCD assist instructions introduced in
Power ISA 2.06. These instructions are not listed in the manuals for
e5500[1] and e6500[2], so the flag is only added for POWER7/8/9/10
models.
[1]
Hello everyone,
Set of patches containing implementations for some instructions that
were missing before. Also, moves some related instructions to
decodetree. Add mffsce test.
Rebase and resend. Patch 8 was conflicting with master.
v2:
- Added R-b on patches 1, 8, 10, and 11. Dropped the R-b on
On 6/10/22 09:55, Víctor Colombo wrote:
Commit 57c108b8646 introduced gen_set_gpri(), which already contains
a check for if the destination register is 'zero'. The check in auipc
and lui are then redundant. This patch removes those checks.
Signed-off-by: Víctor Colombo
---
On 6/10/22 08:55, Philippe Mathieu-Daudé wrote:
On 10/6/22 09:59, Michael S. Tsirkin wrote:
From: zhenwei pi
+static int cryptodev_builtin_set_rsa_options(
+ int virtio_padding_algo,
+ int virtio_hash_algo,
+ QCryptoAkCipherOptionsRSA
On Fri, Jun 10, 2022 at 5:20 PM dramforever wrote:
>
> >
> >> In addition, the various V-extension vector load/store instructions do not
> >> have
> >> defined transformations, so they should show up in [m|h]tinst as all zeros.
> > Okay, I will update.
> Just a clarification/suggestion: It might
Commit 57c108b8646 introduced gen_set_gpri(), which already contains
a check for if the destination register is 'zero'. The check in auipc
and lui are then redundant. This patch removes those checks.
Signed-off-by: Víctor Colombo
---
target/riscv/insn_trans/trans_rvi.c.inc | 8 ++--
1 file
In two places in gdbstub.c we look at gdbserver_state.init to decide
whether we're going to do a semihosting syscall via the gdb remote
protocol:
* when setting up, if the user didn't explicitly select either
native semihosting or gdb semihosting, we autoselect, with the
intended behaviour
From: Richard Henderson
This function is no longer used outside debug_helper.c.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-23-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/cpu.h | 21
Currently we mishandle the --semihosting-config option if the
user specifies it on the command line more than once. For
example with:
--semihosting-config target=gdb --semihosting-config arg=foo,arg=bar
the function qemu_semihosting_config_options() is called twice, once
for each argument. But
From: Richard Henderson
Because reset always initializes the AA64 version, SCR_EL3,
test the mode of EL3 instead of the type of the cpreg.
Signed-off-by: Richard Henderson
Message-id: 20220609214657.1217913-2-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-8-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/debug_helper.c | 31 +++
target/arm/op_helper.c| 29
From: Richard Henderson
Create a new wrapper function that passes the default
exception target to gen_exception_el.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-18-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
From: Richard Henderson
We no longer need this value during translation,
as it is now handled within the helpers.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-15-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/cpu.h
From: Richard Henderson
Create a function below gen_exception_insn that takes
the target_el as a TCGv_i32, replacing gen_exception_el.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-11-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
From: Richard Henderson
This function now now only used in debug_helper.c, so there is
no reason to have a declaration in a header.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-9-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
From: Hao Wu
Creating 1GB image for a simple qtest is unnecessary
and could lead to failures. We reduce the image size
to 1MB to reduce the test overhead.
Signed-off-by: Hao Wu
Message-id: 20220609214125.4192212-1-wuhao...@google.com
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
On Mon, May 30, 2022, Chao Peng wrote:
> On Mon, May 23, 2022 at 03:22:32PM +, Sean Christopherson wrote:
> > Actually, if the semantics are that userspace declares memory as private,
> > then we
> > can reuse KVM_MEMORY_ENCRYPT_REG_REGION and
> > KVM_MEMORY_ENCRYPT_UNREG_REGION. It'd
> >
From: Richard Henderson
Move arm_generate_debug_exceptions and its two subroutines,
{aa32,aa64}_generate_debug_exceptions into debug_helper.c,
and the one interface declaration to internals.h.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id:
From: Richard Henderson
With the helper we can use exception_target_el at runtime,
instead of default_exception_el at translate time.
While we're at it, remove the DisasContext parameter from
gen_exception, as it is no longer used.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
From: Richard Henderson
We were using arm_is_secure and is_a64, which are
tests against the current EL, as opposed to
arm_el_is_aa64 and arm_is_secure_below_el3, which
can be applied to a different EL than current.
Consolidate the two tests.
Reviewed-by: Peter Maydell
Signed-off-by: Richard
From: Richard Henderson
Use the accessor rather than the raw structure member.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-7-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/debug_helper.c | 2 +-
1 file changed, 1
From: Richard Henderson
Split out a common helper function for gen_exception_el
and gen_exception_insn_el_v.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-19-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/translate.c
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-2-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/helper.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
From: Richard Henderson
This function is no longer used. At the same time, remove
DisasContext.secure_routed_to_el3, as it in turn becomes unused.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-21-richard.hender...@linaro.org
Signed-off-by:
From: Richard Henderson
Since DDI0487F.a, the RW bit is RAO/WI. When specifically
targeting such a cpu, e.g. cortex-a76, it is legitimate to
ignore the bit within the secure monitor.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1062
Signed-off-by: Richard Henderson
Message-id:
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-17-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/translate.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git
Just flushing my target-arm queue since I won't be working next week :-)
-- PMM
The following changes since commit b3cd3b5a66f0dddfe3d5ba2bef13cd4f5b89cde9:
Merge tag 'pull-riscv-to-apply-20220610' of github.com:alistair23/qemu into
staging (2022-06-09 22:08:27 -0700)
are available
From: Richard Henderson
Move the computation from gen_swstep_exception into a helper.
This fixes a bug when:
- MDSCR_EL1.KDE == 1 to enable debug exceptions within EL_D itself
- we singlestep an ERET from EL_D to some lower EL
Previously we were computing 'same el' based on the EL which
From: Richard Henderson
Handle the debug vs current el exception test in one place.
Leave EXCP_BKPT alone, since that treats debug < current differently.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-22-richard.hender...@linaro.org
From: Richard Henderson
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-12-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/translate.h| 4 ++--
target/arm/translate-a64.c| 36
From: Richard Henderson
Move the function to debug_helper.c, and the
declaration to internals.h.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-5-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/cpu.h | 10
From: Richard Henderson
This function is not required by any other translation file.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-16-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/translate.h | 8
From: Richard Henderson
Create a new wrapper function that passes the default
exception target to gen_exception_insn_el.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-13-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
From: Richard Henderson
Move the function to op_helper.c, near raise_exception.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-4-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
target/arm/internals.h | 16 +---
From: Richard Henderson
Rename to helper_exception_with_syndrome_el, to emphasize
that the target el is a parameter.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-10-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
From: Richard Henderson
With ARMv8, this field is always RES0.
With ARMv7, targeting EL2 and TA=0, it is always 0xA.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
Message-id: 20220609202901.1177572-3-richard.hender...@linaro.org
Signed-off-by: Peter Maydell
---
On Fri, 10 Jun 2022 at 16:40, Alex Bennée wrote:
>
> We generate the XML for each vCPU we create which for heavily threaded
> linux-user runs can add up to a lot of memory. Unfortunately we can't
> only do it once as we may have vCPUs with different capabilities in
> different cores but we can at
On 10/6/22 09:59, Michael S. Tsirkin wrote:
From: zhenwei pi
There are two parts in this patch:
1, support akcipher service by cryptodev-builtin driver
2, virtio-crypto driver supports akcipher service
In principle, we should separate this into two patches, to avoid
compiling error, merge
On 10/06/2022 16:35, Philippe Mathieu-Daudé wrote:
On 7/6/22 17:54, Mark Cave-Ayland wrote:
On 22/05/2022 19:17, Mark Cave-Ayland wrote:
This series came about when looking at improving the LASI PS2 device for
the HPPA machine: there were improvements that I was keen to make, but
was
We generate the XML for each vCPU we create which for heavily threaded
linux-user runs can add up to a lot of memory. Unfortunately we can't
only do it once as we may have vCPUs with different capabilities in
different cores but we can at least free duplicate definitions if we
find them.
On 7/6/22 17:54, Mark Cave-Ayland wrote:
On 22/05/2022 19:17, Mark Cave-Ayland wrote:
This series came about when looking at improving the LASI PS2 device for
the HPPA machine: there were improvements that I was keen to make, but
was restricted because the PS2 device(s) weren't QOMified.
On 8/6/22 07:19, Richard Henderson wrote:
Inline these macros into the only two callers.
Signed-off-by: Richard Henderson
---
target/mips/tcg/sysemu/mips-semi.c | 27 +--
1 file changed, 9 insertions(+), 18 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 8/6/22 07:19, Richard Henderson wrote:
Always log the assert locally. Do not report_fault, but
instead include the fact of the fault in the assertion.
Don't bother freeing allocated strings before the abort().
Signed-off-by: Richard Henderson
---
target/mips/tcg/sysemu/mips-semi.c | 39
On 8/6/22 07:19, Richard Henderson wrote:
The function is no longer used.
Signed-off-by: Richard Henderson
---
include/semihosting/console.h | 13 -
semihosting/console.c | 9 -
2 files changed, 22 deletions(-)
diff --git a/include/semihosting/console.h
On 8/6/22 07:19, Richard Henderson wrote:
Within do_interrupt, we hold the iothread lock, which
is required for Chardev access for the console, and for
the round trip for use_gdb_syscalls().
Signed-off-by: Richard Henderson
---
target/mips/cpu.h | 3 ++-
On 8/6/22 07:19, Richard Henderson wrote:
From the Unified Hosting Interface, MD01069 Reference Manual,
version 1.1.6, 06 July 2015.
Signed-off-by: Richard Henderson
---
target/mips/tcg/sysemu/mips-semi.c | 40 ++
1 file changed, 40 insertions(+)
Reviewed-by:
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