On 6/16/22 05:16, Song Gao wrote:
Some functions and member of the structure are different with softmmu-mode
So we need adjust them to support user-mode.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
---
target/loongarch/cpu.c| 21 ++-
target/loongarch/c
On 6/16/22 05:16, Song Gao wrote:
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
---
target/loongarch/cpu.c | 1 -
1 file changed, 1 deletion(-)
Reviewed-by: Richard Henderson
r~
On 6/16/22 05:16, Song Gao wrote:
Raising EXCCODE_BCE instead of EXCCODE_ADEM for helper_asrtle_d/asrtgt_d.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
---
target/loongarch/cpu.c | 2 ++
target/loongarch/op_helper.c | 4 ++--
2 files changed, 4 insertions(+), 2 deletions(-)
On 6/16/22 05:16, Song Gao wrote:
loongarch_cpu_do_interrupt() should update CSR_BADV for some EXCCODE.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
---
target/loongarch/cpu.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson
r~
On 6/16/22 05:16, Song Gao wrote:
We can use CSR_BADV to replace badaddr.
Signed-off-by: Song Gao
Signed-off-by: Xiaojuan Yang
---
Reviewed-by: Richard Henderson
r~
target/loongarch/cpu.h | 2 --
target/loongarch/gdbstub.c | 2 +-
2 files changed, 1 insertion(+), 3 deletions(-)
On 6/16/22 05:16, Song Gao wrote:
+static void copy_fpu_to_sigcontext(CPULoongArchState *env,
+ struct extctx_layout *extctx)
+{
+int i;
+struct target_sctx_info *info = (struct target_sctx_info
*)extctx->fpu.addr;
+struct target_fpu_context *fpu_ctx
Signed-off-by: Iris Chen
---
tests/qtest/aspeed_smc-test.c | 74 +--
1 file changed, 63 insertions(+), 11 deletions(-)
diff --git a/tests/qtest/aspeed_smc-test.c b/tests/qtest/aspeed_smc-test.c
index ec233315e6..b1e682db65 100644
--- a/tests/qtest/aspeed_smc-test.
Hey everyone,
I discovered that some of the tests in tests/qtest/aspeed_smc-test.c were
failing when run in isolation due to dependencies between the tests. For
example, one test would test the reading of a block of memory written
in the test before it.
I think it would make sense to add flash_re
On Fri, Jun 17, 2022 at 03:02:45PM -0700, Iris Chen wrote:
> Signed-off-by: Iris Chen
> ---
> Thanks everyone for your comments. This is a v3 patch that addresses all
> suggestions (moving write_enable to decode_new_cmd).
> I am waiting on some feedback from Dan's (dz4l...@gmail.com) patch
> reg
---
Fixing suggestions to move testing related code to a different commit.
tests/qtest/aspeed_smc-test.c | 62 +++
1 file changed, 62 insertions(+)
diff --git a/tests/qtest/aspeed_smc-test.c b/tests/qtest/aspeed_smc-test.c
index ec233315e6..7786addfb8 100644
--- a
Signed-off-by: Iris Chen
---
Thanks everyone for your comments. This is a v3 patch that addresses all
suggestions (moving write_enable to decode_new_cmd).
I am waiting on some feedback from Dan's (dz4l...@gmail.com) patch
regarding adding a STATE_STANDBY state.
Currently, all tests are passing
On Mon, 13 Jun 2022 14:21:26 +0300
Avihai Horon wrote:
> On 6/8/2022 12:32 AM, Alex Williamson wrote:
> > External email: Use caution opening links or attachments
> >
> >
> > On Tue, 7 Jun 2022 20:44:23 +0300
> > Avihai Horon wrote:
> >
> >> On 5/30/2022 8:07 PM, Avihai Horon wrote:
> >>> He
On Thu, May 19, 2022, Chao Peng wrote:
> @@ -4028,8 +4081,11 @@ static bool is_page_fault_stale(struct kvm_vcpu *vcpu,
> if (!sp && kvm_test_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS, vcpu))
> return true;
>
> - return fault->slot &&
> -mmu_notifier_retry_hva(vcp
On 6/17/22 9:07 AM, Anthony PERARD wrote:
On Fri, Jun 10, 2022 at 12:23:35PM -0400, Chuck Zmudzinski wrote:
Currently we are creating a register group for the Intel IGD OpRegion
for every device we pass through, but the XEN_PCI_INTEL_OPREGION
register group is only valid for an Intel IGD. Add a
On Fri, Jun 17, 2022, Sean Christopherson wrote:
> > @@ -110,6 +133,7 @@ struct kvm_userspace_memory_region {
> > */
> > #define KVM_MEM_LOG_DIRTY_PAGES(1UL << 0)
> > #define KVM_MEM_READONLY (1UL << 1)
> > +#define KVM_MEM_PRIVATE(1UL << 2)
>
> Hmm, KVM_MEM_PRIVATE is techni
On 6/14/22 09:10, Cédric Le Goater wrote:
On 6/13/22 17:44, Daniel Henrique Barboza wrote:
It is not advisable to execute an object_dynamic_cast() to poke into
bus->qbus.parent and follow it up with a C cast into the PnvPHB type we
think we got.
A better way is to access the PnvPHB object vi
On Thu, May 19, 2022, Chao Peng wrote:
> @@ -653,12 +662,12 @@ struct kvm_irq_routing_table {
> };
> #endif
>
> -#ifndef KVM_PRIVATE_MEM_SLOTS
> -#define KVM_PRIVATE_MEM_SLOTS 0
> +#ifndef KVM_INTERNAL_MEM_SLOTS
> +#define KVM_INTERNAL_MEM_SLOTS 0
> #endif
This rename belongs in a separate pa
On Thu, Jun 16, 2022 at 08:34:06PM +0800, Jinhao Fan wrote:
> This patch adds shadow doorbell buffer support in NVMe 1.3 to QEMU
> NVMe. The Doorbell Buffer Config admin command is implemented for the
> guest to enable shadow doobell buffer. When this feature is enabled, each
> SQ/CQ is associated
On 6/14/22 06:10, Frederic Barrat wrote:
On 13/06/2022 17:44, Daniel Henrique Barboza wrote:
It is not advisable to execute an object_dynamic_cast() to poke into
bus->qbus.parent and follow it up with a C cast into the PnvPHB type we
think we got.
A better way is to access the PnvPHB objec
I think the option should be boolean since it doesn't look like we're
going to need to tune the number very much.
It all boils down to "does the OS affirmatively support unaccepted
memory?" as in, we have no way to negotiate it, but force unaccepted
memory on.
Ovmf can interpret the existence of an
Queued in gitlab.com/danielhb/qemu/tree/ppc-next after adding
Cedric's R-b from v1.
Thanks,
Daniel
On 6/17/22 06:52, Frederic Barrat wrote:
The 'resume_as_sreset' attribute of a cpu is set when a thread is
entering a stop state on ppc books. It causes the thread to be
re-routed to vector 0x1
Currently we are creating a register group for the Intel IGD OpRegion
for every device we pass through, but the XEN_PCI_INTEL_OPREGION
register group is only valid for an Intel IGD. Add a check to make
sure the device is an Intel IGD and a check that the administrator has
enabled gfx_passthru in th
oops, Phil's redhat email bounced!
On Fri, Jun 17, 2022 at 10:41 PM Ani Sinha wrote:
>
> Hi :
> I am trying to write a new ACPI/smbios test framework that uses bios
> bits (https://biosbits.org/ ).
> This test will effectively:
> (a) use a pre-built bits software zip file kept somewhere (where to
Hi :
I am trying to write a new ACPI/smbios test framework that uses bios
bits (https://biosbits.org/ ).
This test will effectively:
(a) use a pre-built bits software zip file kept somewhere (where to
keep is TBD).
(b) unzip it.
(c) add a python based acpi and smbios test script to the unzipped
bit
On 6/17/22 03:07, Alexey Kardashevskiy wrote:
This implements H_WATCHDOG. More detailed comments are in the patches.
This is based on sha1
96c343cc774b Joel Stanley "linux-user: Add PowerPC ISA 3.1 and MMA to hwcap".
Please comment. Thanks.
This version worked with the kernel side patches
On 6/17/22 03:07, Alexey Kardashevskiy wrote:
It keeps repeating, move it to the header. This uses __builtin_ctzl() to
allow using the macros in #define.
Signed-off-by: Alexey Kardashevskiy
---
Reviewed-by: Daniel Henrique Barboza
include/hw/pci-host/pnv_phb3_regs.h | 16
On 6/17/22 03:07, Alexey Kardashevskiy wrote:
The new PAPR 2.12 defines a watchdog facility managed via the new
H_WATCHDOG hypercall.
This adds H_WATCHDOG support which a proposed driver for pseries uses:
https://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=303120
This was tested b
On 6/17/22 13:18, Joao Martins wrote:
> On 6/16/22 15:23, Igor Mammedov wrote:
>> On Fri, 20 May 2022 11:45:31 +0100
>> Joao Martins wrote:
>>> +}
>>> +
>>> +if (pcmc->has_reserved_memory &&
>>> + (machine->ram_size < machine->maxram_size)) {
>>> +device_mem_size = machine->m
On Thu, Jun 16, 2022 at 10:27 AM John Snow wrote:
>
> This patch series attempts to improve the reliability of several of the
> VM test targets. In particular, both CentOS 8 tests are non-functional
> because CentOS 8 was EOL at the beginning of this calendar year, with
> repositories and mirrors
Hello
Could somebody please apply (or reject) this commit?
Thanks
Brice
Le 06/04/2022 à 14:29, Brice Goglin a écrit :
From: Brice Goglin
The "Memory Proximity Domain Attributes" structure of the ACPI HMAT
has a "Processor Proximity Domain Valid" flag that is currently
always set because Qem
Hi,
On Fri, Jun 17, 2022 at 03:41:10PM +0100, Daniel P. Berrangé wrote:
> On Fri, Jun 17, 2022 at 02:19:27PM +0200, Victor Toso wrote:
> > This patch handles QAPI struct types and generates the equivalent
> > types in Go.
> >
> > At the time of this writing, it generates 388 structures.
> >
> >
Frederic Barrat writes:
> The 'resume_as_sreset' attribute of a cpu is set when a thread is
> entering a stop state on ppc books. It causes the thread to be
> re-routed to vector 0x100 when woken up by an exception. So it must be
> cleared on reset or a thread might be re-routed unexpectedly afte
This version of run_on_cpu() allows to take an Error** to detect errors.
Signed-off-by: Peter Xu
---
cpus-common.c | 27 +++
include/hw/core/cpu.h | 26 ++
softmmu/cpus.c| 6 ++
3 files changed, 59 insertions(+)
diff --git a/c
rfc->v1:
- Rebase to master, drop RFC tag.
This series teaches QEMU to detect errors when e.g. putting registers from
QEMU to KVM, and fail migrations properly.
For the rational of this series and why it was posted, please refer to the
bug report here:
https://lore.kernel.org/all/YppVupW+IWsm7Os
Allow cpu_synchronize_all_post_init() to fail with an errp when it's set.
Modify both precopy and postcopy to try to detect such error.
Signed-off-by: Peter Xu
---
hw/core/machine.c | 2 +-
include/sysemu/cpus.h | 2 +-
migration/savevm.c| 20 +---
softmmu/cpus.c
It allows accel->synchronize_post_init() hook to return an error upwards.
Add a new cpu_synchronize_post_init_full() for it, then let the existing
cpu_synchronize_post_init() to call it with errp==NULL.
Signed-off-by: Peter Xu
---
accel/hvf/hvf-accel-ops.c | 2 +-
accel/kvm/kvm-all.c
run_on_cpu API does not yet support any way to pass over an error message
to above. Add a new run_on_cpu_func2 hook to grant possibility of that.
Note that this only changes the cpus-common core, no API is yet introduced
for v2 of the run_on_cpu_func function.
Signed-off-by: Peter Xu
---
cpus-
Leverage the new mechanism to pass over errors to upper stack for
kvm_arch_put_registers() when called for the post_init() accel hook.
Signed-off-by: Peter Xu
---
accel/kvm/kvm-all.c | 13 ++---
accel/kvm/kvm-cpus.h | 2 +-
softmmu/cpus.c | 5 -
3 files changed, 15 insertion
On Fri, Jun 17, 2022 at 02:19:27PM +0200, Victor Toso wrote:
> This patch handles QAPI struct types and generates the equivalent
> types in Go.
>
> At the time of this writing, it generates 388 structures.
>
> The highlights of this implementation are:
>
> 1. Generating an Go struct that require
On 220617 1217, Thomas Huth wrote:
> On 16/06/2022 21.03, Alexander Bulekov wrote:
> > On 220616 0930, Patrick Venture wrote:
> > > On Thu, Jun 16, 2022 at 6:31 AM Alexander Bulekov wrote:
> > >
> > > > Is this an --enable-sanitizers build? The virtual-device fuzzer catches
> > > >
> > >
> > >
On Fri, Jun 17, 2022 at 10:04:14AM -0400, John Snow wrote:
> On Fri, Jun 17, 2022, 5:49 AM Daniel P. Berrangé
> wrote:
>
> > On Thu, Jun 16, 2022 at 06:35:44PM +0400, Marc-André Lureau wrote:
> > > Hi
> > >
> > > On Thu, Jun 16, 2022 at 6:27 PM John Snow wrote:
> > >
> > > > In some container en
On Wed, Jun 15, 2022, 11:27 AM Steve Sistare
wrote:
> Provide full_args() to return all command-line arguments used to start a
> vm, some of which are not otherwise visible to QEMUMachine clients. This
> is needed by the cpr test, which must start a vm, then pass all qemu
> command-line argument
On Fri, Jun 17, 2022, 5:49 AM Daniel P. Berrangé
wrote:
> On Thu, Jun 16, 2022 at 06:35:44PM +0400, Marc-André Lureau wrote:
> > Hi
> >
> > On Thu, Jun 16, 2022 at 6:27 PM John Snow wrote:
> >
> > > In some container environments, there may be references to block
> devices
> > > witnessable from
Fixes the following Sphinx warning (treated as error) starting
with 5.0 release:
Warning, treated as error:
Invalid configuration value found: 'language = None'. Update your configuration
to a valid langauge code. Falling back to 'en' (English).
Signed-off-by: Martin Liska
---
docs/conf.py | 2
On Mon, Jun 13, 2022 at 04:45:30PM +0800, Lei He wrote:
> Implement ECDSA algorithm by gcrypt
>
> Signed-off-by: lei he
> ---
> crypto/akcipher-gcrypt.c.inc | 400
> +++
> 1 file changed, 400 insertions(+)
Reviewed-by: Daniel P. Berrangé
With regards,
On Mon, Jun 13, 2022 at 04:45:31PM +0800, Lei He wrote:
> 1. add test suite for ecdsa algorithm.
> 2. use qcrypto_akcihper_max_xxx_len to help create buffers in
> test code.
>
> Signed-off-by: lei he
> ---
> tests/unit/test-crypto-akcipher.c | 227
> +++---
> 1 f
On 6/16/22 15:27, Igor Mammedov wrote:
> On Fri, 20 May 2022 11:45:32 +0100
> Joao Martins wrote:
>
>> The added enforcing is only relevant in the case of AMD where the
>> range right before the 1TB is restricted and cannot be DMA mapped
>> by the kernel consequently leading to IOMMU INVALID_DEVI
On 6/17/22 13:32, Igor Mammedov wrote:
> On Fri, 17 Jun 2022 13:18:38 +0100
> Joao Martins wrote:
>> On 6/16/22 15:23, Igor Mammedov wrote:
>>> On Fri, 20 May 2022 11:45:31 +0100
>>> Joao Martins wrote:
+hwaddr above_4g_mem_start,
+
On Fri, Jun 10, 2022 at 12:23:35PM -0400, Chuck Zmudzinski wrote:
> Currently we are creating a register group for the Intel IGD OpRegion
> for every device we pass through, but the XEN_PCI_INTEL_OPREGION
> register group is only valid for an Intel IGD. Add a check to make
> sure the device is an I
> On Jun 17, 2022, at 8:56 PM, Klaus Jensen wrote:
>
> On Jun 17 20:47, Jinhao Fan wrote:
>>
>>
>>> On Jun 17, 2022, at 7:54 PM, Klaus Jensen wrote:
>>>
>>> LGTM,
>>>
>>> Reviewed-by: Klaus Jensen
>>>
>>
>> Great!
>>
>> I have two questions:
>>
>> How many “Reviewed-by”’s do I need to g
On Jun 17 20:47, Jinhao Fan wrote:
>
>
> > On Jun 17, 2022, at 7:54 PM, Klaus Jensen wrote:
> >
> > LGTM,
> >
> > Reviewed-by: Klaus Jensen
> >
>
> Great!
>
> I have two questions:
>
> How many “Reviewed-by”’s do I need to get my patch applied?
>
That depends ;) The maintainers decide t
> On Jun 17, 2022, at 7:54 PM, Klaus Jensen wrote:
>
> On Jun 16 20:34, Jinhao Fan wrote:
>> This patch adds shadow doorbell buffer support in NVMe 1.3 to QEMU
>> NVMe. The Doorbell Buffer Config admin command is implemented for the
>> guest to enable shadow doobell buffer. When this feature i
On Fri, 17 Jun 2022 14:31:51 +0200
David Hildenbrand wrote:
> Xiao Guangrong doesn't have enough time to actively review or contribute
> to our NVDIMM implementation. Let's dissolve the "NVDIMM" section, moving
> relevant ACPI parts to "ACPI/SMBIOS" and moving memory device stuff into a
> new "Me
On Sat, Jun 11, 2022 at 12:43:29PM -0400, Chuck Zmudzinski wrote:
> In xen_pt_config_reg_init(), there is an error in the merging of the
> emulated data with the host value. With the current Qemu, instead of
> merging the emulated bits with the host bits as defined by emu_mask,
> the emulated bits
On Fri, 17 Jun 2022 14:31:51 +0200
David Hildenbrand wrote:
> Xiao Guangrong doesn't have enough time to actively review or contribute
> to our NVDIMM implementation. Let's dissolve the "NVDIMM" section, moving
> relevant ACPI parts to "ACPI/SMBIOS" and moving memory device stuff into a
> new "Me
Hi
On Fri, Jun 17, 2022 at 1:56 PM Gerd Hoffmann wrote:
>
> Hi,
>
> > > Can you try ditch the QEMU_ALLOCATED_FLAG check added by the commit?
> >
> > Commit cb8962c146 drops the QEMU_ALLOCATED_FLAG check: if I add it back in
> > with the following diff on top then everything works again:
>
> Ah,
This patch adds a struct type in Go that will handle return values for
QAPI's command types.
The return value of a Command is, encouraged to be, QAPI's complex
types or an Array of those.
Every Command has a underlying CommandResult. The EmptyCommandReturn
is for those that don't expect any data
This patch handles QAPI command types and generates data structures in
Go that decodes from QMP JSON Object to Go data structure and vice
versa.
Simlar to Event, this patch adds a Command interface and two helper
functions MarshalCommand and UnmarshalCommand.
At the time of this writing, it gener
Xiao Guangrong doesn't have enough time to actively review or contribute
to our NVDIMM implementation. Let's dissolve the "NVDIMM" section, moving
relevant ACPI parts to "ACPI/SMBIOS" and moving memory device stuff into a
new "Memory devices" section. Make that new section cover other memory
device
On Fri, 17 Jun 2022 13:18:38 +0100
Joao Martins wrote:
> On 6/16/22 15:23, Igor Mammedov wrote:
> > On Fri, 20 May 2022 11:45:31 +0100
> > Joao Martins wrote:
> >
> >> It is assumed that the whole GPA space is available to be DMA
> >> addressable, within a given address space limit, expect fo
This patch handles QAPI struct types and generates the equivalent
types in Go.
At the time of this writing, it generates 388 structures.
The highlights of this implementation are:
1. Generating an Go struct that requires a @base type, the @base type
fields are copied over to the Go struct. Th
Signed-off-by: Victor Toso
---
scripts/qapi/golang.py | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/scripts/qapi/golang.py b/scripts/qapi/golang.py
index ab91cf124f..f37014f52b 100644
--- a/scripts/qapi/golang.py
+++ b/scripts/qapi/golang.py
@@ -410,7 +410,12 @@ def vi
This patch handles QAPI enum types and generates its equivalent in Go.
Basically, Enums are being handled as strings in Golang.
1. For each QAPI enum, we will define a string type in Go to be the
assigned type of this specific enum.
2. Naming: CamelCase will be used in any identifier that we
This patch handles QAPI union types and generates the equivalent data
structures and methods in Go to handle it.
At the moment of this writing, it generates 38 structures.
The QAPI union type has two types of fields: The @base and the
@variants members. The @base fields can be considered common m
This patch handles QAPI alternate types and generates data structures
in Go that handles it.
At this moment, there are 5 alternates in qemu/qapi, they are:
* BlockDirtyBitmapMergeSource
* Qcow2OverlapChecks
* BlockdevRef
* BlockdevRefOrNull
* StrOrNull
Alternate types are similar to Union bu
Hi,
This is the second iteration of RFC v1:
https://lists.gnu.org/archive/html/qemu-devel/2022-04/msg00226.html
# What this is about?
To generate a simple Golang interface that could communicate with QEMU
over QMP. The Go code that is generated is meant to be used as the bare
bones to exchang
This patch handles QAPI event types and generates data structures in
Go that handles it.
We also define a Event interface and two helper functions MarshalEvent
and UnmarshalEvent.
At the moment of this writing, this patch generates 51 structures (50
events)
Example:
qapi:
| { 'event': 'MEMORY
On 6/16/22 15:23, Igor Mammedov wrote:
> On Fri, 20 May 2022 11:45:31 +0100
> Joao Martins wrote:
>
>> It is assumed that the whole GPA space is available to be DMA
>> addressable, within a given address space limit, expect for a
>^^^ typo?
>
On Fri, 17 Jun 2022 12:13:45 +0100
Joao Martins wrote:
> On 6/16/22 14:30, Igor Mammedov wrote:
> > On Fri, 20 May 2022 11:45:30 +0100
> > Joao Martins wrote:
> >
> >> Use the pre-initialized pci-host qdev and fetch the
> >> pci-hole64-size into pc_memory_init() newly added argument.
> >> pii
On Wed, Jun 15, 2022 at 7:49 PM David Hildenbrand wrote:
>
> On 15.06.22 13:17, Xiao Guangrong wrote:
> > On Wed, Jun 15, 2022 at 4:24 PM David Hildenbrand
wrote:
> >
> Is that a temporary or a permanent thing? Do we know?
> >>>
> >>> No idea. But his last signed-off was three years ago.
> >
On Fri, 17 Jun 2022 11:51:44 +0100
Jonathan Cameron wrote:
> On Thu, 16 Jun 2022 16:45:00 +0200
> Igor Mammedov wrote:
>
> > On Mon, 16 May 2022 16:51:34 -0400
> > "Michael S. Tsirkin" wrote:
> >
> > > From: Ben Widawsky
> > >
> > > CXL host bridges themselves may have MMIO. Since host br
On Jun 16 20:34, Jinhao Fan wrote:
> This patch adds shadow doorbell buffer support in NVMe 1.3 to QEMU
> NVMe. The Doorbell Buffer Config admin command is implemented for the
> guest to enable shadow doobell buffer. When this feature is enabled, each
> SQ/CQ is associated with two buffers, i.e., S
On Mon, Jun 13, 2022 at 04:45:29PM +0800, Lei He wrote:
> Implement ECDSA algorithm by hogweed and nettle.
>
> Signed-off-by: lei he
> ---
> crypto/akcipher-nettle.c.inc | 268
> +++
> 1 file changed, 268 insertions(+)
Reviewed-by: Daniel P. Berrangé
On Mon, Jun 13, 2022 at 04:45:28PM +0800, Lei He wrote:
> Add ECDSA key parser and ECDSA signautre parser.
typo: 'signature'
>
> Signed-off-by: lei he
> ---
> crypto/ecdsakey-builtin.c.inc | 248
> ++
> crypto/ecdsakey.c
On 6/16/22 14:21, Reviewed-by: Igor Mammedov wrote:
> On Fri, 20 May 2022 11:45:29 +0100
> Joao Martins wrote:
>
>> At the start of pc_memory_init() we usually pass a range of
>> 0..UINT64_MAX as pci_memory, when really its 2G (i440fx) or
>> 32G (q35). To get the real user value, we need to get p
On Mon, Jun 13, 2022 at 04:45:27PM +0800, Lei He wrote:
> Move 'include "qemu/osdep.h"' from rsakey.h to rsakey.c.
>
> Signed-off-by: lei he
> ---
> crypto/rsakey.c | 1 +
> crypto/rsakey.h | 1 -
> 2 files changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Daniel P. Berrangé
With regards,
On 6/16/22 14:05, Igor Mammedov wrote:
> On Fri, 20 May 2022 11:45:28 +0100
> Joao Martins wrote:
>> Rather than hardcoding the 4G boundary everywhere, introduce a
>> X86MachineState property @above_4g_mem_start and use it
> so far it's just field not a property /fix commit message/
>
Fixed.
>>
On Mon, Jun 13, 2022 at 04:45:26PM +0800, Lei He wrote:
> 1. support decoding of 'bit string','octet string',
> 'object id', and 'context specific tag' for DER decoder.
> 2. support encoding of int and sequence for DER decoder.
> 3. add test suites for the above changes.
>
> Signed-off-by: lei he
On 6/16/22 14:30, Igor Mammedov wrote:
> On Fri, 20 May 2022 11:45:30 +0100
> Joao Martins wrote:
>
>> Use the pre-initialized pci-host qdev and fetch the
>> pci-hole64-size into pc_memory_init() newly added argument.
>> piix needs a bit of care given all the !pci_enabled()
>> and that the pci_ho
On Mon, Jun 13, 2022 at 04:45:25PM +0800, Lei He wrote:
> Introduce ECDSA related structures to qapi-crypto.
>
> Signed-off-by: lei he
> ---
> qapi/crypto.json | 28 ++--
> 1 file changed, 26 insertions(+), 2 deletions(-)
Reviewed-by: Daniel P. Berrangé
With regards,
On Thu, 16 Jun 2022 16:45:00 +0200
Igor Mammedov wrote:
> On Mon, 16 May 2022 16:51:34 -0400
> "Michael S. Tsirkin" wrote:
>
> > From: Ben Widawsky
> >
> > CXL host bridges themselves may have MMIO. Since host bridges don't have
> > a BAR they are treated as special for MMIO. This patch incl
On 16/06/2022 21.03, Alexander Bulekov wrote:
On 220616 0930, Patrick Venture wrote:
On Thu, Jun 16, 2022 at 6:31 AM Alexander Bulekov wrote:
Is this an --enable-sanitizers build? The virtual-device fuzzer catches
Yeah - it should be reproducible with a sanitizers build from HEAD -- I can
Hi Matheus,
could you please test the tests-tcg-next branch at
https://gitlab.com/bonzini/qemu?
Thanks,
Paolo
On Thu, Jun 16, 2022 at 3:23 AM Alex Bennée wrote:
>
>
> Matheus Kowalczuk Ferst writes:
>
> > On 01/06/2022 15:05, Alex Bennée wrote:
> >> From: Paolo Bonzini
> >>
> >> In preparati
Hi,
> > Can you try ditch the QEMU_ALLOCATED_FLAG check added by the commit?
>
> Commit cb8962c146 drops the QEMU_ALLOCATED_FLAG check: if I add it back in
> with the following diff on top then everything works again:
Ah, the other way around.
> diff --git a/ui/console.c b/ui/console.c
> inde
The 'resume_as_sreset' attribute of a cpu is set when a thread is
entering a stop state on ppc books. It causes the thread to be
re-routed to vector 0x100 when woken up by an exception. So it must be
cleared on reset or a thread might be re-routed unexpectedly after a
reset, when it was not in a st
On Thu, Jun 16, 2022 at 06:35:44PM +0400, Marc-André Lureau wrote:
> Hi
>
> On Thu, Jun 16, 2022 at 6:27 PM John Snow wrote:
>
> > In some container environments, there may be references to block devices
> > witnessable from a container through /proc/self/mountinfo that reference
> > devices we
On 17/06/2022 09.36, Zhang Chen wrote:
TODO: This test case does not work. Need add ubpf.h header in qtest
compile "-I ../ubpf/vm -I ../ubpf/vm/inc".
I'm not sure if we need it in qtest. Because normal tests/qtest
not including external module test case like fdt. Or we just
need a qtest case for
On 16/06/2022 16.26, John Snow wrote:
This is listed twice by accident; we require genisoimage to run the
test, so remove the unconditional entry.
Signed-off-by: John Snow
---
tests/vm/Makefile.include | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/vm/Makefile.incl
On 16/06/2022 16.26, John Snow wrote:
Ubuntu 18.04 is out of our support window, and Ubuntu 20.04 does not
support i386 anymore. The debian project does, but they do not provide
any cloud images for it, a new expect-style script would have to be
written.
Since we have i386 cross-compiler tests h
On 16/06/2022 16.26, John Snow wrote:
In certain container environments we may not have FUSE at all, so skip
the test in this circumstance too.
Signed-off-by: John Snow
---
tests/qemu-iotests/108 | 5 +
1 file changed, 5 insertions(+)
diff --git a/tests/qemu-iotests/108 b/tests/qemu-iot
On 16/06/2022 16.43, John Snow wrote:
On Thu, Jun 16, 2022 at 10:36 AM Marc-André Lureau
wrote:
Hi
On Thu, Jun 16, 2022 at 6:27 PM John Snow wrote:
In some container environments, there may be references to block devices
witnessable from a container through /proc/self/mountinfo that refere
Hello everyone,
what do you think? Please tell me if something needs to be clarified or
improved.
Raphael
PS: Hopefully this second reply attempt isn't messed up (first:
https://lists.nongnu.org/archive/html/qemu-block/2022-06/msg00344.html)
On 4/13/22 14:26, Raphael Pour wrote:
This patc
On 16/06/2022 10.30, Paolo Bonzini wrote:
When running from the build tree, the executable is able to find
the BIOS on its own; when running from the source tree, a firmware
blob should already be installed and there is no guarantee that
the one in the source tree works with the QEMU that is bein
On Fri, Jun 17, 2022 at 03:36:19PM +0800, Zhang Chen wrote:
> Make iovisor/ubpf project be a git submodule for QEMU.
> It will auto clone ubpf project when configure QEMU.
I don't think we need todo this. As it is brand new functionality we
don't have any back compat issues. We should just expect
On Fri, Jun 17, 2022 at 3:29 AM Jason Wang wrote:
>
> On Wed, Jun 15, 2022 at 6:03 PM Eugenio Perez Martin
> wrote:
> >
> > On Wed, Jun 15, 2022 at 5:04 AM Jason Wang wrote:
> > >
> > > On Tue, Jun 14, 2022 at 5:32 PM Eugenio Perez Martin
> > > wrote:
> > > >
> > > > On Tue, Jun 14, 2022 at 10:
TODO: This test case does not work. Need add ubpf.h header in qtest
compile "-I ../ubpf/vm -I ../ubpf/vm/inc".
I'm not sure if we need it in qtest. Because normal tests/qtest
not including external module test case like fdt. Or we just
need a qtest case for filter-ubpf module.
This test will load p
Introduce userspace ebpf basic knowledge.
Signed-off-by: Zhang Chen
---
docs/devel/userspace-ebpf.rst | 106 ++
1 file changed, 106 insertions(+)
create mode 100644 docs/devel/userspace-ebpf.rst
diff --git a/docs/devel/userspace-ebpf.rst b/docs/devel/userspace-e
The filter-ubpf module able to load user defined ebpf program
to handle network packet based on filter framework.
Signed-off-by: Zhang Chen
---
net/filter-ubpf.c | 149 ++
net/meson.build | 1 +
2 files changed, 150 insertions(+)
create mode 10064
Add filter-ubpf related QOM and qemu-options.
Signed-off-by: Zhang Chen
---
qapi/qom.json | 18 ++
qemu-options.hx | 6 ++
2 files changed, 24 insertions(+)
diff --git a/qapi/qom.json b/qapi/qom.json
index 6a653c6636..820a5218e8 100644
--- a/qapi/qom.json
+++ b/qapi/qom.j
The qemu_prepare_ubpf() can load user defined userspace ebpf binary
file to Qemu userspace ebpf VM but not run it. The ebpf program
will triggered in the hook point.
Signed-off-by: Zhang Chen
---
ebpf/ubpf-stub.c | 5 +++
ebpf/ubpf.c | 100 +++
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