Re-adding the mailing list, please don't drop the list in
replies to discussions.
On Wed, Jul 20, 2022 at 02:08:23AM +0530, Het Gala wrote:
>
> On 13/07/22 3:10 pm, Het Gala wrote:
> >
> > On 16/06/22 11:09 pm, Daniel P. Berrangé wrote:
> > > On Thu, Jun 09, 2022 at 07:33:04AM +, Het Gala wr
Provide a descriptions of the options that control the emulation of option
ROMS for PCIe devices.
Signed-off-by: Heinrich Schuchardt
---
docs/pcie.txt | 25 +
1 file changed, 25 insertions(+)
diff --git a/docs/pcie.txt b/docs/pcie.txt
index 89e3502075..a22c1f69f7 100644
Queued, thanks.
Paolo
On Wed, Jul 20, 2022 at 2:03 PM Eugenio Perez Martin
wrote:
>
> On Wed, Jul 20, 2022 at 5:40 AM Jason Wang wrote:
> >
> > On Wed, Jul 20, 2022 at 12:40 AM Peter Maydell
> > wrote:
> > >
> > > On Tue, 19 Jul 2022 at 14:17, Jason Wang wrote:
> > > >
> > > > The following changes since commit
>
On Wed, Jul 20, 2022 at 5:40 AM Jason Wang wrote:
>
> On Wed, Jul 20, 2022 at 12:40 AM Peter Maydell
> wrote:
> >
> > On Tue, 19 Jul 2022 at 14:17, Jason Wang wrote:
> > >
> > > The following changes since commit
> > > f9d9fff72eed03acde97ea2d66104748dc474b2e:
> > >
> > > Merge tag 'qemu-spa
On Fri, May 13, 2022 at 2:37 AM Peter Maydell wrote:
>
> On Fri, 22 Apr 2022 at 01:40, Alistair Francis
> wrote:
> >
> > From: Wilfred Mallawa
> >
> > Adds the SPI_HOST device model for ibex. The device specification is as per
> > [1]. The model has been tested on opentitan with spi_host unit te
On Tue, Jul 19, 2022 at 11:37 PM Bin Meng wrote:
>
> Since commit fbf43c7dbf18 ("target/riscv: enable riscv kvm accel"),
> KVM accelerator is supported on RISC-V. Let's document it.
>
> Signed-off-by: Bin Meng
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
>
> docs/about/build-platfor
On Wed, Jul 20, 2022 at 1:52 PM Anup Patel wrote:
>
> On Wed, Jul 20, 2022 at 5:02 AM Jim Shu wrote:
> >
> > Hi Anup,
> >
> > Do you think it is OK if we only use ssptwad as a CPU option name
> > but not a RISC-V extension? just like MMU and PMP options of RISC-V.
> > (And we could change it to R
On Wed, Jul 20, 2022 at 5:02 AM Jim Shu wrote:
>
> Hi Anup,
>
> Do you think it is OK if we only use ssptwad as a CPU option name
> but not a RISC-V extension? just like MMU and PMP options of RISC-V.
> (And we could change it to RISC-V extension in the future
> if Ssptwad becomes the formal RISC-
On Wed, Jul 20, 2022 at 12:40 AM Peter Maydell wrote:
>
> On Tue, 19 Jul 2022 at 14:17, Jason Wang wrote:
> >
> > The following changes since commit f9d9fff72eed03acde97ea2d66104748dc474b2e:
> >
> > Merge tag 'qemu-sparc-20220718' of https://github.com/mcayland/qemu into
> > staging (2022-07-1
at 10:41 PM, Jinhao Fan wrote:
> at 1:34 PM, Klaus Jensen wrote:
>
>> From: Klaus Jensen
>>
>> While testing Jinhaos ioeventfd patch I found it useful with a couple of
>> additional trace events since we no longer see the mmio events.
>>
>> Signed-off-by: Klaus Jensen
>> ---
>> hw/nvme/ctrl
>-Original Message-
>From: Sean Christopherson
>Sent: Wednesday, July 20, 2022 2:53 AM
>To: Paolo Bonzini
>Cc: Duan, Zhenzhong ; qemu-
>de...@nongnu.org; mtosa...@redhat.com; lik...@tencent.com; Ma,
>XiangfeiX
>Subject: Re: [PATCH] i386: Disable BTS and PEBS
>
>On Tue, Jul 19, 2022, P
On 7/19/22 23:40, Paolo Bonzini wrote:
On 7/19/22 15:00, Peter Maydell wrote:
shellcheck points out that this (old) commit removed the code
setting ARCH from configure, but left behind a use of it:
case "$ARCH" in
alpha)
# Ensure there's only a single GP
QEMU_CFLAGS="-msmall-data $QEMU_CF
Hi Anup,
Do you think it is OK if we only use ssptwad as a CPU option name
but not a RISC-V extension? just like MMU and PMP options of RISC-V.
(And we could change it to RISC-V extension in the future
if Ssptwad becomes the formal RISC-V extension)
Both HW/SW update schemes are already defined i
Call the CHECK_NOSHUF macro multiple times: once in the
fGEN_TCG_PRED_LOAD() and again in fLOAD().
Before this commit, a packet with a store and a predicated
load with mem_noshuf that gets encoded like this:
{ P0 = cmp.eq(R17,#0x0)
memw(R18+#0x0) = R2
if (!P0.new) R3 = memw(R17+#0
The following changes since commit d48125de38f48a61d6423ef6a01156d6dff9ee2c:
Merge tag 'kraxel-20220719-pull-request' of https://gitlab.com/kraxel/qemu
into staging (2022-07-19 17:40:36 +0100)
are available in the Git repository at:
https://github.com/quic/qemu tags/pull-hex-
The semantics of a mem_noshuf packet are that the store effectively
happens before the load. However, in cases where the load raises an
exception, we cannot simply execute the store first.
This change adds a probe to check that the load will not raise an
exception before executing the store.
If
On Tue, Jul 19, 2022 at 10:53:33PM +0100, Peter Maydell wrote:
> On Tue, 19 Jul 2022 at 18:16, Dr. David Alan Gilbert (git)
> wrote:
> >
> > From: "Dr. David Alan Gilbert"
> >
> > The following changes since commit da7da9d5e608200ecc0749ff37be246e9cd3314f:
> >
> > Merge tag 'pull-request-2022-0
On Tue, 19 Jul 2022 at 18:16, Dr. David Alan Gilbert (git)
wrote:
>
> From: "Dr. David Alan Gilbert"
>
> The following changes since commit da7da9d5e608200ecc0749ff37be246e9cd3314f:
>
> Merge tag 'pull-request-2022-07-19' of https://gitlab.com/thuth/qemu into
> staging (2022-07-19 13:05:06 +01
On Tue, Jul 19, 2022 at 11:37 PM Bin Meng wrote:
>
> Since commit fbf43c7dbf18 ("target/riscv: enable riscv kvm accel"),
> KVM accelerator is supported on RISC-V. Let's document it.
>
> Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Alistair
> ---
>
> docs/about/build-platforms.rst |
On Tue, Jul 19, 2022 at 09:23:45AM -0300, Leonardo Bras wrote:
> Migration with zero-copy-send currently has it's limitations, as it can't
> be used with TLS nor any kind of compression. In such scenarios, it should
> output errors during parameter / capability setting.
>
> But currently there are
On Tue, Jul 19, 2022 at 11:37:55AM +0100, Daniel P. Berrangé wrote:
> On Tue, Jul 19, 2022 at 12:28:24PM +0200, Thomas Huth wrote:
> > On 18/07/2022 21.14, Peter Xu wrote:
> > > Hi, Thomas,
> > >
> > > On Mon, Jul 18, 2022 at 08:23:26PM +0200, Thomas Huth wrote:
> > > > On 07/07/2022 20.46, Peter
> -Original Message-
> From: Peter Maydell
> Sent: Tuesday, July 19, 2022 6:05 AM
> To: Taylor Simpson
> Cc: qemu-devel@nongnu.org; richard.hender...@linaro.org;
> f4...@amsat.org
> Subject: Re: [PULL 0/2] Hexagon (target/hexagon) bug fixes for mem_noshuf
>
> On Mon, 18 Jul 2022 at 23:
On Tue, Jul 19, 2022 at 01:15:26PM +0200, Gerd Hoffmann wrote:
> On Fri, May 06, 2022 at 10:09:30AM -0700, Dongwon Kim wrote:
> > On Fri, May 06, 2022 at 11:53:22AM +0400, Marc-André Lureau wrote:
> > > Hi
> > >
> > > On Fri, May 6, 2022 at 1:46 AM Dongwon Kim wrote:
> > >
> > > > It only needs
Hello,
I would like to be able to, from the linux-user/main.c, access the target's
registered TranslatorOps instance. How would I do that when 1) the TCG is
correctly initialized and ready to run 2) before QEMU starts to run or when
it is safely paused?
On Tue, 19 Jul 2022 at 18:16, Dr. David Alan Gilbert (git)
wrote:
>
> From: "Dr. David Alan Gilbert"
>
> The following changes since commit da7da9d5e608200ecc0749ff37be246e9cd3314f:
>
> Merge tag 'pull-request-2022-07-19' of https://gitlab.com/thuth/qemu into
> staging (2022-07-19 13:05:06 +01
00)
>
> are available in the Git repository at:
>
> https://gitlab.com/kraxel/qemu.git tags/kraxel-20220719-pull-request
>
> for you to fetch changes up to c34a933802071aae5288e0aa3792756312e3da34:
>
> gtk: Add show_tabs=on
Coverity notes that we forgot to check the error return from
lock_user() in one place in the handling of the UHI_plog semihosting
call. Add the missing error handling.
report_fault() is rather brutal in that it will call abort(), but
this is the same error-handling used in the rest of this file.
On Tue, Jul 19, 2022, Paolo Bonzini wrote:
> On 7/18/22 22:12, Sean Christopherson wrote:
> > On Mon, Jul 18, 2022, Paolo Bonzini wrote:
> > > This needs to be fixed in the kernel because old QEMU/new KVM is
> > > supported.
> >
> > I can't object to adding a quirk for this since KVM is breaking
On 7/18/22 22:12, Sean Christopherson wrote:
On Mon, Jul 18, 2022, Paolo Bonzini wrote:
This needs to be fixed in the kernel because old QEMU/new KVM is supported.
I can't object to adding a quirk for this since KVM is breaking userspace, but
on
the KVM side we really need to stop "sanitizing
On 7/19/22 14:35, Jason A. Donenfeld wrote:
6 files changed, 19 insertions(+), 6 deletions(-)
Considering the subject line, I'm quite distressed that the i386
setup_data rng seed patch did not make it in. I just resent it to the
mailing list [1] in case you missed it before. Do you think you c
From: Xiaojuan Yang
Add LoongArch flatted device tree, adding cpu device node, firmware cfg node,
pcie node into it, and create fdt rom memory region. Now fdt info is not
full since only uefi bios uses fdt, linux kernel does not use fdt.
Loongarch Linux kernel uses acpi table which is full in qem
From: Xiaojuan Yang
There are two situations to start system by kernel file. If exists bios
option, system will boot from loaded bios file, else system will boot
from hardcoded auxcode, and jump to kernel elf entry.
Reviewed-by: Richard Henderson
Signed-off-by: Xiaojuan Yang
Message-Id: <20220
From: Xiaojuan Yang
Add fw_cfg table for loongarch virt machine, including memmap table.
Reviewed-by: Richard Henderson
Signed-off-by: Xiaojuan Yang
Message-Id: <20220712083206.4187715-2-yangxiaoj...@loongson.cn>
[rth: Replace fprintf with assert; drop unused return value;
initialize res
On 7/19/22 11:57, Emanuele Giuseppe Esposito wrote:
Wrapping the new drains in aio_context_acquire/release(new_context) is
not so much helpful either, since apparently the following
blk_set_aio_context makes aio_poll() hang.
I am not sure why, any ideas?
I'll take a look, thanks. In any case
From: Song Gao
Choose some instructions to test:
- FCMP.cond.S
- cond: ceq clt cle cne seq slt sle sne
Signed-off-by: Song Gao
Message-Id: <20220716085426.3098060-8-gaos...@loongson.cn>
Signed-off-by: Richard Henderson
---
tests/tcg/loongarch64/test_fpcom.c| 37 +++
From: Song Gao
This includes:
- FCLASS.{S/D}
Signed-off-by: Song Gao
Message-Id: <20220716085426.3098060-7-gaos...@loongson.cn>
Signed-off-by: Richard Henderson
---
tests/tcg/loongarch64/test_fclass.c | 130 ++
tests/tcg/loongarch64/Makefile.target | 1 +
2 files c
Hi Paolo,
On Tue, Jul 19, 2022 at 8:15 PM Paolo Bonzini wrote:
>
> On 7/19/22 14:35, Jason A. Donenfeld wrote:
> >> 6 files changed, 19 insertions(+), 6 deletions(-)
> > Considering the subject line, I'm quite distressed that the i386
> > setup_data rng seed patch did not make it in. I just res
From: Philippe Mathieu-Daudé
Generated on Loongson-3A5000 (CPU revision 0x0014c011).
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20220104132022.2146857-1-f4...@amsat.org>
Signed-off-by: Song Gao
Message-Id: <20220716085426.3098060-2-gaos...@loongson.cn>
Signed-off-by: Richard Henderson
From: Xiaojuan Yang
Loongarch virt machine uses general hardware reduces acpi method, rather
than LS7A acpi device. Now only power management function is used in
acpi ged device, memory hotplug will be added later. Also acpi tables
such as RSDP/RSDT/FADT etc.
The acpi table has submited to acpi
From: Song Gao
We should result zero when exception is invalid and operation is nan
Signed-off-by: Song Gao
Message-Id: <20220716085426.3098060-4-gaos...@loongson.cn>
Signed-off-by: Richard Henderson
---
target/loongarch/fpu_helper.c | 143 +++---
1 file changed, 8
On 7/19/22 15:00, Peter Maydell wrote:
shellcheck points out that this (old) commit removed the code
setting ARCH from configure, but left behind a use of it:
case "$ARCH" in
alpha)
# Ensure there's only a single GP
QEMU_CFLAGS="-msmall-data $QEMU_CFLAGS"
;;
esac
Presumably meson.build ne
From: Song Gao
This includes:
- DIV.{W[U]/D[U]}
- MOD.{W[U]/D[U]}
Signed-off-by: Song Gao
Message-Id: <20220716085426.3098060-6-gaos...@loongson.cn>
Signed-off-by: Richard Henderson
---
tests/tcg/loongarch64/test_div.c | 54 +++
tests/tcg/loongarch64/Makefile.targ
From: Xiaojuan Yang
Add smbios support for loongarch virt machine, and put them into fw_cfg
table so that bios can parse them quickly. The weblink of smbios spec:
https://www.dmtf.org/dsp/DSP0134, the version is 3.6.0.
Acked-by: Richard Henderson
Signed-off-by: Xiaojuan Yang
Message-Id: <20220
From: Xiaojuan Yang
We should config cpucfg[20] to set value for the scache's ways, sets,
and size arguments when loongarch cpu init. However, the old code
wirte 'sets argument' twice, so we change one of them to 'size argument'.
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
Mess
From: Song Gao
This includes:
- CL{O/Z}.{W/D}
- CT{O/Z}.{W/D}
Signed-off-by: Song Gao
Message-Id: <20220716085426.3098060-5-gaos...@loongson.cn>
Signed-off-by: Richard Henderson
---
tests/tcg/loongarch64/test_bit.c | 88 +++
tests/tcg/loongarch64/Makefile.target |
From: Song Gao
This includes:
- PCADDI
- PCADDU12I
- PCADDU18I
- PCALAU12I
Signed-off-by: Song Gao
Message-Id: <20220716085426.3098060-9-gaos...@loongson.cn>
Signed-off-by: Richard Henderson
---
tests/tcg/loongarch64/test_pcadd.c| 38 +++
tests/tcg/loongarch64/Make
From: Xiaojuan Yang
Replace '1 << shift' with 'MAKE_64BIT_MASK(shift, 1)' to fix
unintentional integer overflow errors in tlb_helper file.
Fix coverity CID: 1489759 1489762
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
Message-Id: <20220715060740.1500628-5-yangxiaoj...@loongson.
From: Xiaojuan Yang
Fix such errors:
1. We should not use 'unsigned long' type as argument when we use
find_first_bit(), and we use ctz64() to replace find_first_bit()
to fix this bug.
2. It is not standard to use '1ULL << irq' to generate a irq mask.
So, we replace it with 'MAKE_64BIT_MASK(irq,
From: Xiaojuan Yang
Add uefi bios loading support, now only uefi bios is porting to
loongarch virt machine.
Reviewed-by: Richard Henderson
Signed-off-by: Xiaojuan Yang
Message-Id: <20220712083206.4187715-3-yangxiaoj...@loongson.cn>
Signed-off-by: Richard Henderson
---
include/hw/loongarch/vi
From: Xiaojuan Yang
Fix out-of-bounds errors when access excp_names[] array. the valid
boundary size of excp_names should be 0 to ARRAY_SIZE(excp_names)-1.
However, the general code do not consider the max boundary.
Fix coverity CID: 1489758
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard He
From: Xiaojuan Yang
The boundary size of cpucfg array should be 0 to ARRAY_SIZE(cpucfg)-1.
So, using index bigger than max boundary to access cpucfg[] must be
forbidden.
Fix coverity CID: 1489760
Signed-off-by: Xiaojuan Yang
Reviewed-by: Richard Henderson
Message-Id: <20220715060740.1500628-6
From: Song Gao
The muladd (inf,zero,nan) case sets InvalidOp and returns the
input value 'c', and prefer sNaN over qNaN, in c,a,b order.
Binary operations prefer sNaN over qNaN and a,b order.
Signed-off-by: Song Gao
Message-Id: <20220716085426.3098060-3-gaos...@loongson.cn>
[rth: Add specializa
From: Xiaojuan Yang
The cpu_model argument may already have the '-loongarch-cpu' suffix,
e.g. when using the default for the LS7A1000 machine. If that fails,
try again with the suffix. Validate that the object created by the
function is derived from the proper base class.
Signed-off-by: Xiaoju
Use the pre-packaged toolchain provided by Loongson via github.
Tested-by: Song Gao
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
Message-Id: <20220704070824.965429-1-richard.hender...@linaro.org>
---
configure | 5
tests/docker/
The following changes since commit da7da9d5e608200ecc0749ff37be246e9cd3314f:
Merge tag 'pull-request-2022-07-19' of https://gitlab.com/thuth/qemu into
staging (2022-07-19 13:05:06 +0100)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-la-202
Le 19/07/2022 à 18:20, Helge Deller a écrit :
The pipe2() syscall is available on all Linux platforms since kernel
2.6.27, so use it unconditionally to emulate pipe() and pipe2().
Signed-off-by: Helge Deller
Reviewed-by: Peter Maydell
---
Changes in v2:
- added Reviewed-by: from Peter
- new di
From: Juan Quintela
Reorder the structures so we can know if the fields are:
- Read only
- Their own locking (i.e. sems)
- Protected by 'mutex'
- Only for the multifd channel
Signed-off-by: Juan Quintela
Message-Id: <20220531104318.7494-2-quint...@redhat.com>
Reviewed-by: Dr. David Alan Gilbert
From: Peter Xu
We just added TLS tests for precopy but not postcopy. Add the
corresponding test for vanilla postcopy.
Rename the vanilla postcopy to "postcopy/plain" because all postcopy tests
will only use unix sockets as channel.
Signed-off-by: Peter Xu
Message-Id: <20220707185525.27692-1-p
From: Leonardo Bras
Some errors, like the lack of Scatter-Gather support by the network
interface(NETIF_F_SG) may cause sendmsg(...,MSG_ZEROCOPY) to fail on using
zero-copy, which causes it to fall back to the default copying mechanism.
After each full dirty-bitmap scan there should be a zero-co
From: Daniel P. Berrangé
The code calls qio_channel_read() in a loop when it reports
QIO_CHANNEL_ERR_BLOCK. This code is reported when errno==EAGAIN.
As such the later block of code will always hit the 'errno != EAGAIN'
condition, making the final 'else' unreachable.
Fixes: Coverity CID 1490203
From: Peter Xu
Four tests are added for preempt mode:
- Postcopy plain
- Postcopy recovery
- Postcopy tls
- Postcopy tls+recovery
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Peter Xu
Message-Id: <20220707185530.27801-1-pet...@redhat.com>
Signed-off-by: Dr. David Alan Gilbert
From: Hyman Huang(黄勇)
Introduce kvm_dirty_ring_size util function to help calculate
dirty ring ful time.
Signed-off-by: Hyman Huang(黄勇)
Acked-by: Peter Xu
Message-Id:
Signed-off-by: Dr. David Alan Gilbert
---
accel/kvm/kvm-all.c| 5 +
accel/stubs/kvm-stub.c | 5 +
include/sysem
From: Leonardo Bras
Migration with zero-copy-send currently has it's limitations, as it can't
be used with TLS nor any kind of compression. In such scenarios, it should
output errors during parameter / capability setting.
But currently there are some ways of setting this not-supported scenarios
From: Hyman Huang(黄勇)
Implement dirtyrate calculation periodically basing on
dirty-ring and throttle virtual CPU until it reachs the quota
dirty page rate given by user.
Introduce qmp commands "set-vcpu-dirty-limit",
"cancel-vcpu-dirty-limit", "query-vcpu-dirty-limit"
to enable, disable, query d
From: Leonardo Bras
Signed-off-by: Leonardo Bras
Acked-by: Markus Armbruster
Acked-by: Peter Xu
Reviewed-by: Daniel P. Berrangé
Message-Id: <2022071122.18951-3-leob...@redhat.com>
Signed-off-by: Dr. David Alan Gilbert
---
migration/migration.c | 2 ++
monitor/hmp-cmds.c| 5 +
qa
From: Hyman Huang(黄勇)
Setup a negative feedback system when vCPU thread
handling KVM_EXIT_DIRTY_RING_FULL exit by introducing
throttle_us_per_full field in struct CPUState. Sleep
throttle_us_per_full microseconds to throttle vCPU
if dirtylimit is in service.
Signed-off-by: Hyman Huang(黄勇)
Revie
From: Peter Xu
It's easy to build this upon the postcopy tls test. Rename the old
postcopy recovery test to postcopy/recovery/plain.
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Peter Xu
Message-Id: <20220707185527.27747-1-pet...@redhat.com>
Signed-off-by: Dr. David Alan Gilbert
dgil
From: Hyman Huang(黄勇)
Add dirty page rate limit test if kernel support dirty ring,
The following qmp commands are covered by this test case:
"calc-dirty-rate", "query-dirty-rate", "set-vcpu-dirty-limit",
"cancel-vcpu-dirty-limit" and "query-vcpu-dirty-limit".
Signed-off-by: Hyman Huang(黄勇)
Ack
From: Peter Xu
So that it can be used in postcopy tests too soon.
Reviewed-by: Daniel P. Berrange
Signed-off-by: Peter Xu
Message-Id: <20220707185522.27638-1-pet...@redhat.com>
Signed-off-by: Dr. David Alan Gilbert
---
tests/qtest/migration-test.c | 144 +--
1
From: Hyman Huang(黄勇)
abstract out dirty log change logic into function
global_dirty_log_change.
abstract out dirty page rate calculation logic via
dirty-ring into function vcpu_calculate_dirtyrate.
abstract out mathematical dirty page rate calculation
into do_calculate_dirtyrate, decouple it f
From: Leonardo Bras
If flush is called when no buffer was sent with MSG_ZEROCOPY, it currently
returns 1. This return code should be used only when Linux fails to use
MSG_ZEROCOPY on a lot of sendmsg().
Fix this by returning early from flush if no sendmsg(...,MSG_ZEROCOPY)
was attempted.
Fixes:
From: Peter Xu
This patch allows the postcopy preempt channel to be created
asynchronously. The benefit is that when the connection is slow, we won't
take the BQL (and potentially block all things like QMP) for a long time
without releasing.
A function postcopy_preempt_wait_channel() is introdu
From: Hyman Huang(黄勇)
Introduce the third method GLOBAL_DIRTY_LIMIT of dirty
tracking for calculate dirtyrate periodly for dirty page
rate limit.
Add dirtylimit.c to implement dirtyrate calculation periodly,
which will be used for dirty page rate limit.
Add dirtylimit.h to export util functions
From: Peter Xu
Add a property field that can conditionally disable the "break sending huge
page" behavior in postcopy preemption. By default it's enabled.
It should only be used for debugging purposes, and we should never remove
the "x-" prefix.
Reviewed-by: Dr. David Alan Gilbert
Reviewed-by
From: Peter Xu
Add migrate_channel_requires_tls() to detect whether the specific channel
requires TLS, leveraging the recently introduced migrate_use_tls(). No
functional change intended.
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Peter Xu
Message-Id: <20220707185513.27421-1-pet...@re
From: Peter Xu
This patch is based on the async preempt channel creation. It continues
wiring up the new channel with TLS handshake to destionation when enabled.
Note that only the src QEMU needs such operation; the dest QEMU does not
need any change for TLS support due to the fact that all cha
From: Peter Xu
It's useful for specifying tls credentials all in the cmdline (along with
the -object tls-creds-*), especially for debugging purpose.
The trick here is we must remember to not free these fields again in the
finalize() function of migration object, otherwise it'll cause double-free
From: Peter Xu
With preemption mode on, when we see a postcopy request that was requesting
for exactly the page that we have preempted before (so we've partially sent
the page already via PRECOPY channel and it got preempted by another
postcopy request), currently we drop the request so that afte
Move obtaining hole64_start from device_memory memory region base/size
into an helper alongside correspondent getters in pc_memory_init() when
the hotplug range is unitialized. While doing that remove the memory
region based logic from this newly added helper.
This is the final step that allows pc
From: Peter Xu
Firstly, postcopy already preempts precopy due to the fact that we do
unqueue_page() first before looking into dirty bits.
However that's not enough, e.g., when there're host huge page enabled, when
sending a precopy huge page, a postcopy request needs to wait until the whole
huge
From: Peter Xu
This patch enables postcopy-preempt feature.
It contains two major changes to the migration logic:
(1) Postcopy requests are now sent via a different socket from precopy
background migration stream, so as to be isolated from very high page
request delays.
(2) For huge pa
Calculate max *used* GPA against the CPU maximum possible address
and error out if the former surprasses the latter. This ensures
max used GPA is reacheable by configured phys-bits. Default phys-bits
on Qemu is TCG_PHYS_ADDR_BITS (40) which is enough for the CPU to
address 1Tb (0xff ) or 1
From: Hyman Huang(黄勇)
Introduce cpu_list_generation_id to track cpu list generation so
that cpu hotplug/unplug can be detected during measurement of
dirty page rate.
cpu_list_generation_id could be used to detect changes of cpu
list, which is prepared for dirty page rate measurement.
Signed-off
From: Peter Xu
To allow postcopy recovery, the ram fast load (preempt-only) dest QEMU thread
needs similar handling on fault tolerance. When ram_load_postcopy() fails,
instead of stopping the thread it halts with a semaphore, preparing to be
kicked again when recovery is detected.
A mutex is in
From: "Dr. David Alan Gilbert"
The following changes since commit da7da9d5e608200ecc0749ff37be246e9cd3314f:
Merge tag 'pull-request-2022-07-19' of https://gitlab.com/thuth/qemu into
staging (2022-07-19 13:05:06 +0100)
are available in the Git repository at:
https://gitlab.com/dagrh/qemu.g
The added enforcing is only relevant in the case of AMD where the
range right before the 1TB is restricted and cannot be DMA mapped
by the kernel consequently leading to IOMMU INVALID_DEVICE_REQUEST
or possibly other kinds of IOMMU events in the AMD IOMMU.
Although, there's a case where it may mak
From: Hyman Huang(黄勇)
Add a non-required argument 'CPUState' to kvm_dirty_ring_reap so
that it can cover single vcpu dirty-ring-reaping scenario.
Signed-off-by: Hyman Huang(黄勇)
Reviewed-by: Peter Xu
Message-Id:
Signed-off-by: Dr. David Alan Gilbert
---
accel/kvm/kvm-all.c | 23
From: Peter Xu
Create a new socket for postcopy to be prepared to send postcopy requested
pages via this specific channel, so as to not get blocked by precopy pages.
A new thread is also created on dest qemu to receive data from this new channel
based on the ram_load_postcopy() routine.
The ram
It is assumed that the whole GPA space is available to be DMA
addressable, within a given address space limit, except for a
tiny region before the 4G. Since Linux v5.4, VFIO validates
whether the selected GPA is indeed valid i.e. not reserved by
IOMMU on behalf of some specific devices or platform-
v8[9] -> v9:
* Move wrongfully placed hunk from patch 6 into patch 4 (error only in v8
despite end result being same) (Igor Mammedov)
* Remove stray new line from patch 8 (Igor Mammedov)
* Add Acked-by in patches 5, 6, 8, 9, 10 (Igor Mammedov)
(only patch 7 is missing acks/rb)
Note: This series
Factor out the calculation of the base address of the memory region.
It will be used later on for the cxl range end counterpart calculation
and as well in pc_memory_init() CXL memory region initialization, thus
avoiding duplication.
Cc: Jonathan Cameron
Signed-off-by: Joao Martins
Acked-by: Igor
From: Ilya Leoshkevich
zlib_send_prepare() compresses pages of a running VM. zlib does not
make any thread-safety guarantees with respect to changing deflate()
input concurrently with deflate() [1].
One can observe problems due to this with the IBM zEnterprise Data
Compression accelerator capabl
Use the pre-initialized pci-host qdev and fetch the
pci-hole64-size into pc_memory_init() newly added argument.
Use PCI_HOST_PROP_PCI_HOLE64_SIZE pci-host property for
fetching pci-hole64-size.
This is in preparation to determine that host-phys-bits are
enough and for pci-hole64-size to be conside
Move calculation of CXL memory region end to separate helper.
This is in preparation to a future change that removes CXL range
dependency on the CXL memory region, with the goal of allowing
pc_pci_hole64_start() to be called before any memory region are
initialized.
Cc: Jonathan Cameron
Signed-o
Rather than hardcoding the 4G boundary everywhere, introduce a
X86MachineState field @above_4g_mem_start and use it
accordingly.
This is in preparation for relocating ram-above-4g to be
dynamically start at 1T on AMD platforms.
Signed-off-by: Joao Martins
Reviewed-by: Igor Mammedov
---
hw/i386
At the start of pc_memory_init() we usually pass a range of
0..UINT64_MAX as pci_memory, when really its 2G (i440fx) or
32G (q35). To get the real user value, we need to get pci-host
passed property for default pci_hole64_size. Thus to get that,
create the qdev prior to memory init to better make e
Remove pc_get_cxl_range_end() dependency on the CXL memory region,
and replace with one that does not require the CXL host_mr to determine
the start of CXL start.
This in preparation to allow pc_pci_hole64_start() to be called early
in pc_memory_init(), handle CXL memory region end when its underl
There's a couple of places that seem to duplicate this calculation
of RAM size above the 4G boundary. Move all those to a helper function.
Signed-off-by: Joao Martins
Reviewed-by: Igor Mammedov
---
hw/i386/pc.c | 29 ++---
1 file changed, 14 insertions(+), 15 deletions(-
On Tue, 19 Jul 2022 at 14:17, Jason Wang wrote:
>
> The following changes since commit f9d9fff72eed03acde97ea2d66104748dc474b2e:
>
> Merge tag 'qemu-sparc-20220718' of https://github.com/mcayland/qemu into
> staging (2022-07-19 09:57:13 +0100)
>
> are available in the git repository at:
>
> h
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