On 8/25/22 02:27, Richard Henderson wrote:
If you were sharing this with the old decoder, and thus needed to retain
it, that would be one thing. But there's no shared prefix or postfix in
this function, so you might as well split each case into the functions.
Yes, absolutely.
Paolo
On 8/25/22 02:23, Richard Henderson wrote:
+ op->v = v;
+}
Surely this assignment...
+static void gen_writeback(DisasContext *s, X86DecodedOp *op)
+{
...
+ case X86_ALU_GPR:
+ gen_op_mov_reg_v(s, op->ot, op->n, s->T0);
... can be used here instead of hard-coding T0. It shoul
On 8/25/22 03:47, Richard Henderson wrote:
On 8/24/22 10:31, Paolo Bonzini wrote:
diff --git a/target/i386/tcg/decode-old.c.inc b/target/i386/tcg/decode-old.c.inc
index 603642d6e1..fb86855501 100644
--- a/target/i386/tcg/decode-old.c.inc
+++ b/target/i386/tcg/decode-old.c.inc
@@ -1808,10 +1808,2
On 8/25/22 02:12, Richard Henderson wrote:
Surely it would be just as readable as
static const X86OpEntry onebyte[256] = {
/*
* Table A-2: One-byte Opcode Map: 00H — F7H
*/
[0x00] = X86_OP_ENTRY2(ADD, E,b, G,b),
[0x01] = X86_OP_ENTRY2(ADD, E,v, G,v),
...
[
On 8/25/22 01:01, Richard Henderson wrote:
One notable
difference is that the new decoder always sign-extends 8-bit immediates,
so for example a "cmpb $e9, %dl" instruction will subtract $0xfff...fffe9
from the temporary value. This is the way Intel intended "Ib" immediates
to work, and there's
On Thu, Aug 25, 2022 at 2:38 AM Si-Wei Liu wrote:
>
>
>
> On 8/23/2022 9:27 PM, Jason Wang wrote:
> >
> > 在 2022/8/20 01:13, Eugenio Pérez 写道:
> >> It was returned as error before. Instead of it, simply update the
> >> corresponding field so qemu can send it in the migration data.
> >>
> >> Signed
On Thu, Aug 18, 2022 at 11:13 PM Guo Zhi wrote:
>
> Follow VIRTIO 1.1 spec, we can only writing out a single used ring for a
> batch of descriptors, and only notify guest when the batch of
> descriptors have all been used.
Yes, but I don't see anything that is related to the "exposing used
buffer
On Thu, Aug 18, 2022 at 11:13 PM Guo Zhi wrote:
>
> In virtio-spec 1.1, new feature bit VIRTIO_F_IN_ORDER was introduced.
> When this feature has been negotiated, virtio driver will use
> descriptors in ring order: starting from offset 0 in the table, and
> wrapping around at the end of the table.
From: Klaus Jensen
Even if the host is somehow using compare to do compare-and-write, the
host should be notified immediately about the compare failure and not
have to wait for the driver to potentially retry the command.
Reported-by: Jim Harris
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c
在 2022/8/25 10:52, Jason Wang 写道:
On Wed, Aug 24, 2022 at 7:27 PM Kangjie Xu wrote:
在 2022/8/24 16:59, Jason Wang 写道:
在 2022/8/23 16:20, Kangjie Xu 写道:
在 2022/8/23 15:44, Jason Wang 写道:
在 2022/8/16 09:06, Kangjie Xu 写道:
PCI devices support vq enable.
Nit: it might be "support devic
Specify maximum possible APIC ID assigned for current VM session to KVM
prior to the creation of vCPUs. By this setting, KVM can set up VM-scoped
data structure indexed by the APIC ID, e.g. Posted-Interrupt Descriptor
pointer table to support Intel IPI virtualization, with the most optimal
memory f
On Thu, Aug 25, 2022 at 2:35 AM Eugenio Pérez wrote:
>
> This series enables shadowed CVQ to intercept multiqueue commands through
> shadowed CVQ, update the virtio NIC device model so qemu send it in a
> migration, and the restore of that MQ state in the destination.
>
> It needs to be applied on
On Thu, Aug 25, 2022 at 2:36 AM Eugenio Pérez wrote:
>
> Since there may be many commands we need to issue to load the NIC
> state, let's split them in individual functions
>
> Signed-off-by: Eugenio Pérez
> --
> v2: Add vhost_vdpa_net_load_cmd helper
> ---
> net/vhost-vdpa.c | 54 ++
On Thu, Aug 25, 2022 at 2:36 AM Eugenio Pérez wrote:
>
> This allows to simplify the code.
>
> Signed-off-by: Eugenio Pérez
> ---
> net/vhost-vdpa.c | 9 +
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c
> index 6ce68fcd3f..468e460ac
On Thu, Aug 25, 2022 at 10:53 AM Jason Wang wrote:
>
> On Thu, Aug 25, 2022 at 8:38 AM Si-Wei Liu wrote:
> >
> >
> >
> > On 8/23/2022 9:27 PM, Jason Wang wrote:
> > >
> > > 在 2022/8/20 01:13, Eugenio Pérez 写道:
> > >> It was returned as error before. Instead of it, simply update the
> > >> corresp
On Thu, Aug 25, 2022 at 8:38 AM Si-Wei Liu wrote:
>
>
>
> On 8/23/2022 9:27 PM, Jason Wang wrote:
> >
> > 在 2022/8/20 01:13, Eugenio Pérez 写道:
> >> It was returned as error before. Instead of it, simply update the
> >> corresponding field so qemu can send it in the migration data.
> >>
> >> Signed
On Wed, Aug 24, 2022 at 7:27 PM Kangjie Xu wrote:
>
>
> 在 2022/8/24 16:59, Jason Wang 写道:
>
>
> 在 2022/8/23 16:20, Kangjie Xu 写道:
>
>
> 在 2022/8/23 15:44, Jason Wang 写道:
>
>
> 在 2022/8/16 09:06, Kangjie Xu 写道:
>
> PCI devices support vq enable.
>
>
>
> Nit: it might be "support device specific vq
On Wed, Aug 24, 2022 at 7:17 PM Fiona Ebner wrote:
>
> Fixes: d05dcd94ae ("net: vmxnet3: validate configuration values during
> activate (CVE-2021-20203)")
> Signed-off-by: Fiona Ebner
> ---
>
> I'm not familiar with this code, so really I'm asking: is the change
> justified?
Patch looks good,
On 8/24/22 10:31, Paolo Bonzini wrote:
> diff --git a/target/i386/tcg/decode-old.c.inc
> b/target/i386/tcg/decode-old.c.inc
> index 603642d6e1..fb86855501 100644
> --- a/target/i386/tcg/decode-old.c.inc
> +++ b/target/i386/tcg/decode-old.c.inc
> @@ -1808,10 +1808,24 @@ static target_ulong disas_in
On 8/24/22 10:31, Paolo Bonzini wrote:
The "O" operand type in the Intel SDM needs to load an 8- to 64-bit
unsigned value, while insn_get is limited to 32 bits. Extract the code
out of disas_insn and into a separate function.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-old.c.inc |
On 8/24/22 10:32, Paolo Bonzini wrote:
+static void gen_LODS(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
+{
+MemOp ot = decode->op[0].ot;
+if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
+gen_repz_lods(s, ot, s->pc_start - s->cs_base, s->pc - s->cs_base);
Note tha
On 8/23/2022 9:27 PM, Jason Wang wrote:
在 2022/8/20 01:13, Eugenio Pérez 写道:
It was returned as error before. Instead of it, simply update the
corresponding field so qemu can send it in the migration data.
Signed-off-by: Eugenio Pérez
---
Looks correct.
Adding Si Wei for double check.
On 8/24/22 10:32, Paolo Bonzini wrote:
+static void decode_group_0x63(DisasContext *s, CPUX86State *env, X86OpEntry
*entry, uint8_t *b)
+{
+static X86OpEntry arpl = X86_OP_ENTRY2(ARPL, E,w, G,w, .special =
X86_SPECIAL_ProtMode);
+static X86OpEntry mov = X86_OP_ENTRY3(MOV, G,v, E,v, None
On 8/24/22 10:32, Paolo Bonzini wrote:
@@ -183,8 +202,7 @@ static void gen_XOR(DisasContext *s, CPUX86State *env,
X86DecodedInsn *decode)
decode->op[2].alu_op_type == X86_ALU_GPR &&
decode->op[1].n == decode->op[2].n) {
tcg_gen_movi_tl(s->T0, 0);
-gen_op_upd
On 8/24/22 10:31, Paolo Bonzini wrote:
+static void gen_alu_op(DisasContext *s1, int op, MemOp ot)
+{
+switch(op) {
+case OP_ADCL:
+gen_compute_eflags_c(s1, s1->tmp4);
+if (s1->prefix & PREFIX_LOCK) {
+tcg_gen_add_tl(s1->T0, s1->tmp4, s1->T1);
+tcg_
On 8/24/22 10:31, Paolo Bonzini wrote:
Add generic code generation that takes care of preparing operands
around calls to decode.e.gen in a table-driven manner, so that ALU
operations need not take care of that.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 14 +++-
On 8/24/22 10:31, Paolo Bonzini wrote:
+static X86OpEntry A4_00_F7[16][8] = {
const. Especially for the big tables, but really for anything static that you can get
away with.
+static void decode_threebyte_38(DisasContext *s, CPUX86State *env, X86OpEntry
*entry, uint8_t *b)
+{
+*b = x8
On 2022/08/24 16:46, Damien Le Moal wrote:
> On 2022/08/22 21:12, Sam Li wrote:
>> Stefan Hajnoczi 于2022年8月23日周二 08:49写道：
>>>
>>> On Tue, Aug 16, 2022 at 02:25:18PM +0800, Sam Li wrote:
[...] +blkz = (struct blk_zone *)(rep + 1);
+while (n < nrz) {
+memset(rep, 0, rep
On 2022/08/22 21:12, Sam Li wrote:
> Stefan Hajnoczi 于2022年8月23日周二 08:49写道：
>>
>> On Tue, Aug 16, 2022 at 02:25:18PM +0800, Sam Li wrote:
>>> By adding zone management operations in BlockDriver, storage controller
>>> emulation can use the new block layer APIs including Report Zone and
>>> four zo
On Thu, 25 Aug 2022, Bernhard Beschow wrote:
On Wed, Aug 24, 2022 at 3:54 PM BALATON Zoltan wrote:
On Tue, 23 Aug 2022, Bernhard Beschow wrote:
The IDE function is closely tied to the ISA function (e.g. the IDE
interrupt routing happens there), so it makes sense that the IDE
function is instan
On 8/24/22 10:31, Paolo Bonzini wrote:
It is only lightly tested but it can boot to iPXE and run some 64-bit
coreutils just fine; Linux seems to trigger a bug in outsw/l/q emulation
that I haven't checked yet, but still it's enough to show the result of
a couple days of hacking.
Excellent.
Th
On Wed, Aug 24, 2022 at 12:54 AM BALATON Zoltan wrote:
> On Tue, 23 Aug 2022, Bernhard Beschow wrote:
> > On Tue, Aug 23, 2022 at 2:44 AM BALATON Zoltan
> wrote:
> >
> >> On Tue, 23 Aug 2022, Bernhard Beschow wrote:
> >>> Resolves duplicate code in the boards.
> >>>
> >>> Signed-off-by: Bernhard
On Wed, Aug 24, 2022 at 1:36 AM BALATON Zoltan wrote:
> On Tue, 23 Aug 2022, Bernhard Beschow wrote:
> > On Tue, Aug 23, 2022 at 2:35 AM BALATON Zoltan
> wrote:
> >
> >> On Tue, 23 Aug 2022, Bernhard Beschow wrote:
> >>> The object creation now happens in chip-specific init methods which
> >>> a
On Wed, Aug 24, 2022 at 3:54 PM BALATON Zoltan wrote:
> On Tue, 23 Aug 2022, Bernhard Beschow wrote:
> > The IDE function is closely tied to the ISA function (e.g. the IDE
> > interrupt routing happens there), so it makes sense that the IDE
> > function is instantiated within the southbridge itse
The sscofpmf extension was ratified as a part of priv spec v1.12.
Mark the csr_ops accordingly.
Reviewed-by: Weiwei Li
Reviewed-by: Alistair Francis
Signed-off-by: Atish Patra
---
target/riscv/csr.c | 90 ++
1 file changed, 60 insertions(+), 30 delet
All the hpmcounters and the fixed counters (CY, IR, TM) can be represented
as a unified counter. Thus, the predicate function doesn't need handle each
case separately.
Simplify the predicate function so that we just handle things differently
between RV32/RV64 and S/HS mode.
Reviewed-by: Bin Meng
From: Atish Patra
Qemu can monitor the following cache related PMU events through
tlb_fill functions.
1. DTLB load/store miss
3. ITLB prefetch miss
Increment the PMU counter in tlb_fill function.
Reviewed-by: Alistair Francis
Tested-by: Heiko Stuebner
Signed-off-by: Atish Patra
Signed-off-b
Qemu virt machine can support few cache events and cycle/instret counters.
It also supports counter overflow for these events.
Add a DT node so that OpenSBI/Linux kernel is aware of the virt machine
capabilities. There are some dummy nodes added for testing as well.
Acked-by: Alistair Francis
Si
vstimecmp CSR allows the guest OS or to program the next guest timer
interrupt directly. Thus, hypervisor no longer need to inject the
timer interrupt to the guest if vstimecmp is used. This was ratified
as a part of the Sstc extension.
Reviewed-by: Alistair Francis
Signed-off-by: Atish Patra
--
The latest version of the SBI specification includes a Performance Monitoring
Unit(PMU) extension[1] which allows the supervisor to start/stop/configure
various PMU events. The Sscofpmf ('Ss' for Privileged arch and Supervisor-level
extensions, and 'cofpmf' for Count OverFlow and Privilege Mode Fil
The Sscofpmf ('Ss' for Privileged arch and Supervisor-level extensions,
and 'cofpmf' for Count OverFlow and Privilege Mode Filtering)
extension allows the perf to handle overflow interrupts and filtering
support. This patch provides a framework for programmable
counters to leverage the extension. A
This series implements Sstc extension[1] which was ratified recently.
The first patch is a prepartory patches while PATCH 2 adds stimecmp
support while PATCH 3 adds vstimecmp support. This series is based on
on top of upstream commit (faee5441a038).
The series can also be found at
https://github.
Historically, The mtime/mtimecmp has been part of the CPU because
they are per hart entities. However, they actually belong to aclint
which is a MMIO device.
Move them to the ACLINT device. This also emulates the real hardware
more closely.
Reviewed-by: Anup Patel
Reviewed-by: Alistair Francis
stimecmp allows the supervisor mode to update stimecmp CSR directly
to program the next timer interrupt. This CSR is part of the Sstc
extension which was ratified recently.
Reviewed-by: Alistair Francis
Signed-off-by: Atish Patra
---
target/riscv/cpu.c | 9
target/riscv/cpu.h
On 8/24/22 9:13 PM, Stefan Hajnoczi wrote:
On Wed, Aug 24, 2022 at 12:18:34PM +0300, Daniil Tatianin wrote:
+size_t virtio_blk_common_get_config_size(uint64_t host_features)
+{
+size_t config_size = MAX(VIRTIO_BLK_CFG_SIZE,
+virtio_feature_get_config_size(feature_sizes, host_featu
On 8/24/22 9:00 PM, Stefan Hajnoczi wrote:
On Wed, Aug 24, 2022 at 12:18:35PM +0300, Daniil Tatianin wrote:
diff --git a/hw/block/vhost-user-blk.c b/hw/block/vhost-user-blk.c
index 9117222456..e89164c358 100644
--- a/hw/block/vhost-user-blk.c
+++ b/hw/block/vhost-user-blk.c
@@ -251,6 +251,8 @@ s
On Aug 11 23:37, Jinhao Fan wrote:
> This patch series changes qemu-nvme's interrupt emulation to use event
> notifiers, which can ensure thread-safe interrupt delivery when iothread
> is used. In the first two patches, I convert qemu-nvme's IO emulation
> logic to send irq via eventfd, so that the
On Wed, 24 Aug 2022 at 17:43, David Hildenbrand wrote:
> One idea is doing another pass over the list at the end (after possible
> merging of sections) and making sure everything is page-aligned.
>
> Another idea is specifying somehow that that memory region should simply
> not be dumped ...
>
>
>
On Wed, 24 Aug 2022 at 16:51, Jean-Philippe Brucker
wrote:
>
> dt-validate and dtc throw a few warnings when parsing the virtio-iommu
> node:
>
> pcie@1000: virtio_iommu@16:compatible: ['virtio,pci-iommu'] does not
> contain items matching the given schema
> pcie@1000: Unevaluated pro
On Wed, 24 Aug 2022 at 16:51, Jean-Philippe Brucker
wrote:
>
> The GPIO devicetree node is missing "interrupt-controller" and
> "#interrupt-cells" properties:
>
> pl061@903: 'interrupt-controller' is a required property
> From schema: linux/Documentation/devicetree/bindings/gpio/pl061-gpio
Thomas Huth, le mer. 24 août 2022 17:11:16 +0200, a ecrit:
> At the point in time we're going to release QEMU 7.2, all supported
> host OS distributions will have a libslirp package available, so
> there is no need anymore for us to ship the slirp submodule. Thus
> let's clean up the related tests
On Wed, 24 Aug 2022 at 16:51, Jean-Philippe Brucker
wrote:
>
> dt-validate reports three issues in the SMMU device-tree node:
>
> smmuv3@905: $nodename:0: 'smmuv3@905' does not match
> '^iommu@[0-9a-f]*'
> smmuv3@905: interrupt-names: 'oneOf' conditional failed, one must be
> fix
On Wed, 24 Aug 2022 at 16:51, Jean-Philippe Brucker
wrote:
>
> The compatible property of the Arm timer should contain either
> "arm,armv7-timer" or "arm,armv8-timer", not both.
>
> timer: compatible: 'oneOf' conditional failed, one must be fixed:
> ['arm,armv8-timer', 'arm,armv7-timer']
On Wed, 24 Aug 2022 at 16:51, Jean-Philippe Brucker
wrote:
>
> Fix three dt-validate warnings about the GIC node due to invalid names
> and missing property:
>
> intc@800: $nodename:0: 'intc@800' does not match
> '^interrupt-controller(@[0-9a-f,]+)*$'
> intc@800: 'its@808' doe
On Wed, 24 Aug 2022 at 16:51, Jean-Philippe Brucker
wrote:
>
> dt-validate warns that an implementation compatible with arm,psci-1.0
> shouldn't have arm,psci in their compatible string.
>
> psci: compatible: 'oneOf' conditional failed, one must be fixed:
> ['arm,psci-1.0', 'arm,psci-0.2
On Wed, 17 Aug 2022 at 15:33, Peter Maydell wrote:
>
> On Wed, 17 Aug 2022 at 15:24, Anton Kochkov wrote:
> >
> > For consistency, function "update_rx_fifo()" should use
> > the RX FIFO register names, not the TX FIFO ones even if
>
> "register field names"
>
> > they refer to the same memory reg
* Bin Meng (bmeng...@gmail.com) wrote:
> From: Xuzhou Cheng
>
> Make sure QEMU process "to" is killed before launching another target
> for migration in the test_multifd_tcp_cancel case.
>
> Signed-off-by: Xuzhou Cheng
> Signed-off-by: Bin Meng
> ---
>
> tests/qtest/migration-test.c | 4
* Bin Meng (bmeng...@gmail.com) wrote:
> From: Bin Meng
>
> On Windows the QEMU executable is created via CreateProcess() and IO
> redirection does not work, so we need to set MigrateStart::hide_stderr
> to false to disable adding IO redirection to the command line.
>
> Signed-off-by: Bin Meng
* Bin Meng (bmeng...@gmail.com) wrote:
> From: Bin Meng
>
> The test case 'test_migrate_fd_proto' calls socketpair() which does
> not exist on win32. Exclude it. The helper function wait_command_fd()
> is not needed anymore, hence exclude it too.
>
> Signed-off-by: Bin Meng
Reviewed-by: Dr. Da
* Bin Meng (bmeng...@gmail.com) wrote:
> From: Bin Meng
>
> Windows does not provide a link() API like POSIX. Instead it provides
> a similar API CreateHardLink() that does the same thing, but with
> different argument order and return value.
>
> Signed-off-by: Bin Meng
Reviewed-by: Dr. David
It was returned as error before. Instead of it, simply update the
corresponding field so qemu can send it in the migration data.
Signed-off-by: Eugenio Pérez
---
hw/net/virtio-net.c | 17 ++---
1 file changed, 6 insertions(+), 11 deletions(-)
diff --git a/hw/net/virtio-net.c b/hw/ne
Finally enable SVQ with MQ feature.
Signed-off-by: Eugenio Pérez
---
net/vhost-vdpa.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c
index b070c029e7..0376151b60 100644
--- a/net/vhost-vdpa.c
+++ b/net/vhost-vdpa.c
@@ -94,6 +94,7 @@ static const uint64_t
Same way as with the MAC, restore the expected number of queues at
device's start.
Signed-off-by: Eugenio Pérez
---
net/vhost-vdpa.c | 28
1 file changed, 28 insertions(+)
diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c
index c89e2262d9..77c85f4ddd 100644
--- a/net
So we are sure we can update the device model properly before sending to
the device.
Signed-off-by: Eugenio Pérez
---
net/vhost-vdpa.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c
index 77c85f4ddd..b070c029e7 100644
--- a/net/vhost-vdpa.c
+++ b
Since there may be many commands we need to issue to load the NIC
state, let's split them in individual functions
Signed-off-by: Eugenio Pérez
--
v2: Add vhost_vdpa_net_load_cmd helper
---
net/vhost-vdpa.c | 54
1 file changed, 36 insertions(+), 1
This series enables shadowed CVQ to intercept multiqueue commands through
shadowed CVQ, update the virtio NIC device model so qemu send it in a
migration, and the restore of that MQ state in the destination.
It needs to be applied on top of [1].
[1] https://lists.gnu.org/archive/html/qemu-devel/2
This allows to simplify the code.
Signed-off-by: Eugenio Pérez
---
net/vhost-vdpa.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c
index 6ce68fcd3f..468e460ac2 100644
--- a/net/vhost-vdpa.c
+++ b/net/vhost-vdpa.c
@@ -35,7 +35,9 @@
On Wed, Aug 24, 2022 at 12:18:37PM +0300, Daniil Tatianin wrote:
> Make vhost-user-blk backwards compatible when migrating from older VMs
> running with modern features turned off, the same way it was done for
> virtio-blk in 20764be0421c ("virtio-blk: set config size depending on the
> features e
On Wed, Aug 24, 2022 at 12:18:34PM +0300, Daniil Tatianin wrote:
> +size_t virtio_blk_common_get_config_size(uint64_t host_features)
> +{
> +size_t config_size = MAX(VIRTIO_BLK_CFG_SIZE,
> +virtio_feature_get_config_size(feature_sizes, host_features));
> +
> +assert(config_size <= s
GDB's remote serial protocol allows stop-reply messages to be sent by
the stub either as a notification packet or as a reply to a GDB command
(provided that the cmd accepts such a response). QEMU currently does not
implement notification packets, so it should only send stop-replies
synchronously an
* Bin Meng (bmeng...@gmail.com) wrote:
> From: Bin Meng
>
> Use the same g_mkdir_with_parents() call to create a directory on
> all platforms.
>
> Signed-off-by: Bin Meng
Reviewed-by: Dr. David Alan Gilbert
> ---
>
> tests/migration/stress.c | 2 +-
> tests/qtest/migration-tes
Applied to gitlab.com/danielhb/qemu/tree/ppc-7.2. Thanks,
Daniel
On 8/19/22 06:47, Daniel Henrique Barboza wrote:
Hi,
Second version removes pnv_phb_attach_root_port() in patch 2 as
suggested by Cedric.
The patches are based on ppc-7.2:
https://gitlab.com/danielhb/qemu/-/tree/ppc-7.2
Cha
On Wed, Aug 24, 2022 at 12:18:36PM +0300, Daniil Tatianin wrote:
> @@ -591,7 +588,8 @@ static Property vhost_user_blk_properties[] = {
> DEFINE_PROP_UINT16("num-queues", VHostUserBlk, num_queues,
> VHOST_USER_BLK_AUTO_NUM_QUEUES),
> DEFINE_PROP_UINT32("queue-size",
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 16 ++
target/i386/tcg/decode-old.c.inc | 2 +-
target/i386/tcg/emit.c.inc | 86
3 files changed, 103 insertions(+), 1 deletion(-)
diff --git a/target/i386/tcg/decode-new.c.inc b/targe
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 41
target/i386/tcg/decode-old.c.inc | 19 +---
target/i386/tcg/emit.c.inc | 166 ++-
target/i386/tcg/translate.c | 17
4 files changed, 227 insertions(+), 16 deletions(-)
On Wed, Aug 24, 2022 at 12:18:35PM +0300, Daniil Tatianin wrote:
> diff --git a/hw/block/vhost-user-blk.c b/hw/block/vhost-user-blk.c
> index 9117222456..e89164c358 100644
> --- a/hw/block/vhost-user-blk.c
> +++ b/hw/block/vhost-user-blk.c
> @@ -251,6 +251,8 @@ static uint64_t vhost_user_blk_get_fe
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 16
target/i386/tcg/decode-old.c.inc | 2 +-
target/i386/tcg/emit.c.inc | 22 --
3 files changed, 37 insertions(+), 3 deletions(-)
diff --git a/target/i386/tcg/decode-new.c.inc b/targe
* Bin Meng (bmeng...@gmail.com) wrote:
> From: Bin Meng
>
> Use g_get_tmp_dir() to get the directory to use for temporary files.
>
> Signed-off-by: Bin Meng
> ---
>
> tests/qtest/fuzz/generic_fuzz_configs.h | 6 --
> tests/qtest/ahci-test.c | 15 +++
> tests/q
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 16
target/i386/tcg/emit.c.inc | 33
2 files changed, 49 insertions(+)
diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index b1e849b332..de
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 30 +
target/i386/tcg/emit.c.inc | 77
2 files changed, 107 insertions(+)
diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index 586894e4ee..161a
The new decoder likes to compute the address in A0 very early, so the
gen_lea_v_seg in gen_pop_T0 would clobber the address of the memory
operand. Instead use T0 since it is already available and will be
overwritten immediately after.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c
On Thu, Aug 18, 2022 at 02:46:19PM -0400, Yusuke Okada wrote:
> From: Yusuke Okada
>
> The "%f" specifier in g_date_time_format() is only available in glib
> 2.65.2 or later. If combined with older glib, the function returns null
> and the timestamp displayed as "(null)".
>
> For backward compat
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 16
target/i386/tcg/decode-old.c.inc | 2 +-
target/i386/tcg/emit.c.inc | 5 +
3 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-
On 8/24/22 06:40, Bin Meng wrote:
From: Xuzhou Cheng
spapr->htab is allocated by qemu_memalign(), hence we should use
qemu_vfree() to free it.
Fixes: c5f54f3e31bf ("pseries: Move hash page table allocation to reset time")
Fixes: b4db54132ffe ("target/ppc: Implement H_REGISTER_PROCESS_TABLE
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 16
target/i386/tcg/emit.c.inc | 30 +-
target/i386/tcg/translate.c | 2 ++
3 files changed, 47 insertions(+), 1 deletion(-)
diff --git a/target/i386/tcg/decode-new.c.inc
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 30 ++
target/i386/tcg/emit.c.inc | 27 +++
2 files changed, 57 insertions(+)
diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index 68920
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 16
target/i386/tcg/emit.c.inc | 22 ++
2 files changed, 38 insertions(+)
diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index 07a2aea540..3d96ac3adb 1
Add generic code generation that takes care of preparing operands
around calls to decode.e.gen in a table-driven manner, so that ALU
operations need not take care of that.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 14 +++-
target/i386/tcg/emit.c.inc | 62 +
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 16 +++
target/i386/tcg/decode-old.c.inc | 2 +-
target/i386/tcg/emit.c.inc | 35 +++-
3 files changed, 51 insertions(+), 2 deletions(-)
diff --git a/target/i386/tcg/decode-new.c.in
Using operands named "0-7" for fixed registers wasn't a great idea
in retrospect... It only makes sense for 1-byte INC/DEC, and those
could even use LoBits instead.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 17 -
target/i386/tcg/decode-old.c.inc | 2 +-
The new decoder is based on three principles:
- use mostly table-driven decoding, using tables derived as much as possible
from the Intel manual, keeping the code as "non-branchy" as possible
- keep address generation and (for ALU operands) memory loads and write back
as much in common code a
While looking again at Paul's patches for AVX, I came to the conclusion
that the x86 decoder is unsalvageable. The encoding of x86 is simply too
messy for it to be decoded in code; huge tables, derived as much as possible
from the architecture reference, are the real way to go.
So here is a new,
For simplicity, this also brings in the entire implementation of ALU
operations from the old decoder.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 16 +
target/i386/tcg/emit.c.inc | 109 +++
2 files changed, 125 insertions(+)
diff --
The "O" operand type in the Intel SDM needs to load an 8- to 64-bit
unsigned value, while insn_get is limited to 32 bits. Extract the code
out of disas_insn and into a separate function.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-old.c.inc | 11 +--
target/i386/tcg/translat
Thomas Huth writes:
> It's still based on Fedora 30 - which is not supported anymore by QEMU
> since years. Seems like nobody is using (and refreshing) this, and it's
> easier to test this via a container anyway, so let's remove this now.
>
> Signed-off-by: Thomas Huth
Queued to testing/next,
Richard Henderson writes:
> The project has reached the magic size at which we see
>
> /usr/aarch64-linux-gnu/lib/libc.a(init-first.o): in function
> `__libc_init_first':
> (.text+0x10): relocation truncated to fit: R_AARCH64_LD64_GOTPAGE_LO15
> against \
> symbol `__environ' defined in .bss
On Tue, Aug 23, 2022 at 10:36:00PM +, Martin Oliveira wrote:
> Hello,
>
> I'm trying to use the QEMU NVMe userspace driver and I'm hitting an error
> when trying to use more than one device from an IOMMU group:
>
> Failed to open VFIO group file: /dev/vfio/39: Device or resource busy
>
On 24.08.22 14:43, Marc-André Lureau wrote:
> Hi,
Hi!
>
> tpm-crb creates a "tpm-crb-cmd" RAM memory region that is not page
> aligned. Apparently, this is not a problem for QEMU in general. However,
> it crashes kdump'ing in dump.c:get_next_page, as it expects
I assume you mean "dumping in kdu
On 8/24/22 06:03, LIU Zhiwei wrote:
Disassemble function(plugin_disas, target_disas, monitor_disas) will
always call set_disas_info before disassembling instructions.
plugin_disas and target_disas will always be called under a TB, which
has the same XLEN.
We can't ensure that monitor_disas wil
On 8/24/22 02:19, Alex Bennée wrote:
The following changes since commit a8cc5842b5cb863e46a2d009151c6ccbdecadaba:
Merge tag 'for-upstream' of git://repo.or.cz/qemu/kevin into staging
(2022-08-23 10:37:21 -0700)
are available in the Git repository at:
https://github.com/stsquad/qemu.git
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