On Sun, Apr 09, 2023 at 04:40:50PM +0300, Michael Tokarev wrote:
> 06.04.2023 09:40, Yang Zhong wrote:
> > The previous patch wrongly replaced FEAT_XSAVE_XCR0_{LO|HI} with
> > FEAT_XSAVE_XSS_{LO|HI} in CPUID(EAX=12,ECX=1):{ECX,EDX}, which made
> > SGX enclave only supported SSE and x87
The patch tries to separate the multi-letter extensions that may
implicitly-enabled by misa.EXT from the explicitly-enabled cases, so that the
misa.EXT can truely disabled by write_misa().
With this separation, the implicitly-enabled zve64d/f and zve32f extensions
will no work if we clear
For extensions that may implicitly enabled from misa.EXT:
- ext_* is true if the extension is explicitly-enabled.
- ext_*_enabled is true no matter the extension is implicitly-enabled or
explicitly-enabled. And we change the check on the extension to it.
Signed-off-by: Weiwei Li
Signed-off-by:
Move multi-letter extensions that may implicitly enabled from misa.EXT
alone to prepare for following separation of implicitly enabled and
explicitly enabled extensions.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu.c | 56
Commit 1b2b12376c8 ("intel-iommu: PASID support") takes PASID into
account when calculating iotlb hash like:
static guint vtd_iotlb_hash(gconstpointer v)
{
const struct vtd_iotlb_key *key = v;
return key->gfn | ((key->sid) << VTD_IOTLB_SID_SHIFT) |
(key->level) <<
On Mon, Apr 10, 2023 at 11:17 AM Longpeng (Mike, Cloud Infrastructure
Service Product Dept.) wrote:
>
>
>
> 在 2023/4/10 10:14, Jason Wang 写道:
> > On Wed, Apr 5, 2023 at 7:38 PM Eugenio Perez Martin
> > wrote:
> >>
> >> Hi!
> >>
> >> As mentioned in the last upstream virtio-networking meeting,
在 2023/4/10 10:14, Jason Wang 写道:
On Wed, Apr 5, 2023 at 7:38 PM Eugenio Perez Martin wrote:
Hi!
As mentioned in the last upstream virtio-networking meeting, one of
the factors that adds more downtime to migration is the handling of
the guest memory (pin, map, etc). At this moment this
On Fri, Apr 7, 2023 at 12:22 AM Peter Maydell wrote:
>
> On Mon, 7 Nov 2022 at 22:53, Michael S. Tsirkin wrote:
> >
> > From: Jason Wang
> >
> > This patch introduce ECAP_PASID via "x-pasid-mode".
>
> Hi; Coverity points out an issue with this code (CID 1508100):
>
> > -static guint
On Wed, Apr 5, 2023 at 7:38 PM Eugenio Perez Martin wrote:
>
> Hi!
>
> As mentioned in the last upstream virtio-networking meeting, one of
> the factors that adds more downtime to migration is the handling of
> the guest memory (pin, map, etc). At this moment this handling is
> bound to the
From: Richard Henderson
Fix a crash writing to 't3', which is now a constant.
Instead, write the result of the remu to 't0'.
Fixes: 7058ff5231a ("target/ppc: Avoid tcg_const_* in translate.c")
Reported-by: Nicholas Piggin
Reviewed-by: Anton Johansson
Signed-off-by: Richard Henderson
[ clg:
The following changes since commit c6f3cbca32bde9ee94d9949aa63e8a7ef2d7bc5b:
Update version for v8.0.0-rc3 release (2023-04-05 17:26:14 +0100)
are available in the Git repository at:
https://github.com/legoater/qemu/ tags/pull-ppc-20230409
for you to fetch changes up
Signed-off-by: Stefan Weil
---
If my change is okay I suggest to apply the patch for 8.0
because it fixes documentation.
Regards,
Stefan W.
docs/system/devices/cxl.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/system/devices/cxl.rst b/docs/system/devices/cxl.rst
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1529
Signed-off-by: Stefan Weil
---
I suggest to apply the patch for 8.0 because it fixes documentation.
Regards
Stefan W.
docs/system/introduction.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Signed-off-by: Stefan Weil
---
The patch does not change code and could also be applied for 8.0.
hw/arm/Kconfig| 2 +-
hw/arm/exynos4210.c | 4 ++--
hw/arm/musicpal.c | 2 +-
hw/arm/omap1.c| 2 +-
hw/arm/omap2.c| 2 +-
hw/arm/virt-acpi-build.c
On 4/9/23 10:29, Cédric Le Goater wrote:
On 4/9/23 18:21, Richard Henderson wrote:
On 4/8/23 14:24, Cédric Le Goater wrote:
On 4/8/23 09:05, Richard Henderson wrote:
Fix a crash writing to 't3', which is now a constant.
Instead, write the result of the remu to 't1'.
Fixes: 7058ff5231a
On 4/9/23 18:21, Richard Henderson wrote:
On 4/8/23 14:24, Cédric Le Goater wrote:
On 4/8/23 09:05, Richard Henderson wrote:
Fix a crash writing to 't3', which is now a constant.
Instead, write the result of the remu to 't1'.
Fixes: 7058ff5231a ("target/ppc: Avoid tcg_const_* in translate.c")
On 4/9/23 01:52, Michael Tokarev wrote:
Hi!
In the qemu-user case, we allocate various structures and arrays
for conversion of data between host and guest byte orders and sizes.
But it is actually not necessary to do such allocation when the
*size* is the same, and only byte order is different,
On 4/8/23 14:24, Cédric Le Goater wrote:
On 4/8/23 09:05, Richard Henderson wrote:
Fix a crash writing to 't3', which is now a constant.
Instead, write the result of the remu to 't1'.
Fixes: 7058ff5231a ("target/ppc: Avoid tcg_const_* in translate.c")
Reported-by: Nicholas Piggin
Reviewed-by:
09.04.2023 17:04, Warner Losh пишет:
On Sun, Apr 9, 2023 at 2:53 AM Michael Tokarev mailto:m...@tls.msk.ru>> wrote:
Hi!
In the qemu-user case, we allocate various structures and arrays
for conversion of data between host and guest byte orders and sizes.
But it is actually not
As userspace APIC now supports x2APIC, intel interrupt remapping
hardware can be set to EIM mode when userspace local APIC is used.
Signed-off-by: Bui Quang Minh
---
hw/i386/intel_iommu.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/hw/i386/intel_iommu.c
This commit adds support for x2APIC transitions when writing to
MSR_IA32_APICBASE register and finally adds CPUID_EXT_X2APIC to
TCG_EXT_FEATURES.
Signed-off-by: Bui Quang Minh
---
hw/intc/apic.c | 50
hw/intc/apic_common.c| 7
This patch corrects QEMU to properly use what KVM_CAP_NR_MEMSLOTS means,
i.e. the maximum user memslots KVM supports.
1. Rename KVMState::nr_slots --> max_slots.
2. Remember nr_slots in each KML. This also decouples each KML, e.g. x86's
two KMLs don't need to have same size of slots[].
3.
This commit adds XTSup configuration to let user choose to whether enable
this feature or not. When XTSup is enabled, additional bytes in IRTE with
enabled guest virtual VAPIC are used to support 32-bit destination id.
Additionally, this commit changes to use IVHD type 0x11 in ACPI table for
This commit refactors apic_mem_read/write to support both MMIO access in
xAPIC and MSR access in x2APIC.
Signed-off-by: Bui Quang Minh
---
hw/intc/apic.c | 79 ++--
hw/intc/trace-events | 4 +-
include/hw/i386/apic.h |
This commit extends the APIC ID to 32-bit long and remove the 255 max APIC
ID limit in userspace APIC. The array that manages local APICs is now
dynamically allocated based on the max APIC ID of created x86 machine.
Also, new x2APIC IPI destination determination scheme, self IPI and x2APIC
mode
Hi everyone,
This series implements x2APIC mode in userspace local APIC and the
RDMSR/WRMSR helper to access x2APIC registers in x2APIC mode. Intel iommu
and AMD iommu are adjusted to support x2APIC interrupt remapping. With this
series, we can now boot Linux kernel into x2APIC mode with TCG
On 4/3/23 23:38, Bui Quang Minh wrote:
On 4/3/23 17:27, David Woodhouse wrote:
On Wed, 2023-03-29 at 22:30 +0700, Bui Quang Minh wrote:
I do some more testing on my hardware, your point is correct when dest
== 0x, the interrupt is delivered to all APICs regardless of
their mode.
On Sun, Apr 9, 2023 at 2:53 AM Michael Tokarev wrote:
> Hi!
>
> In the qemu-user case, we allocate various structures and arrays
> for conversion of data between host and guest byte orders and sizes.
> But it is actually not necessary to do such allocation when the
> *size* is the same, and only
06.04.2023 09:40, Yang Zhong wrote:
The previous patch wrongly replaced FEAT_XSAVE_XCR0_{LO|HI} with
FEAT_XSAVE_XSS_{LO|HI} in CPUID(EAX=12,ECX=1):{ECX,EDX}, which made
SGX enclave only supported SSE and x87 feature(xfrm=0x3).
Fixes: 301e90675c3f ("target/i386: Enable support for XSAVES based
On Thu, 6 Apr 2023 at 09:22, Thomas De Schampheleire
wrote:
>
> The event filename is an absolute path. Convert it to a relative path when
> writing '#line' directives, to preserve reproducibility of the generated
> output when different base paths are used.
>
> Signed-off-by: Thomas De
(Replying to an old(ish) email... original thread:
https://patchwork.ozlabs.org/project/qemu-devel/patch/20221216192220.2881898-1-...@msgid.tls.msk.ru/
)
16.12.2022 23:44, Richard Henderson wrote:
On 12/16/22 11:22, Michael Tokarev wrote:
do_ppoll() in linux-user/syscall.c uses alloca() to
pc_succ_insn is no longer useful after the introduce of cur_insn_len
and all pc related value use diff value instead of absolute value.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/translate.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git
Compute the target address before storing it into badaddr
when mis-aligned exception is triggered.
Use a target_pc temp to store the target address to avoid
the confusing operation that udpate target address into
cpu_pc before misalign check, then update it into badaddr
and restore cpu_pc to
09.04.2023 13:48, Michael Tokarev пишет:
..
v3:
- fix a bug in getgroups(). In initial implementation I checked
for ret>0 in order to convert returned list of groups to target
byte order. But this clashes with unusual corner case for this
syscall: getgroups(0,NULL) return current
Use cur_insn_len to store the length of the current instruction to
prepare for PC-relative translation.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/translate.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/riscv/translate.c
Reduce reliance on absolute values(by passing pc difference) to
prepare for PC-relative translation.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/insn_trans/trans_privileged.c.inc | 2 +-
target/riscv/insn_trans/trans_rvi.c.inc| 6 +++---
linux-user getgroups(), setgroups(), getgroups32() and setgroups32()
used alloca() to allocate grouplist arrays, with unchecked gidsetsize
coming from the "guest". With NGROUPS_MAX being 65536 (linux, and it
is common for an application to allocate NGROUPS_MAX for getgroups()),
this means a
Reduce reliance on absolute values by using true pc difference for
gen_pc_plus_diff() to prepare for PC-relative translation.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/insn_trans/trans_rvi.c.inc | 6 ++
target/riscv/translate.c| 13
Reduce reliance on absolute value to prepare for PC-relative translation.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/insn_trans/trans_rvi.c.inc | 4 ++--
target/riscv/translate.c| 8 +---
2 files changed, 7 insertions(+), 5 deletions(-)
diff
Add a base pc_save for PC-relative translation(CF_PCREL).
Diable the directly sync pc from tb by riscv_cpu_synchronize_from_tb.
Use gen_pc_plus_diff to get the pc-relative address.
Enable CF_PCREL in System mode.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu.c
This patchset tries to add support for PC-relative translation.
The existence of CF_PCREL can improve performance with the guest
kernel's address space randomization. Each guest process maps libc.so
(et al) at a different virtual address, and this allows those
translations to be shared.
And
linux-user getgroups(), setgroups(), getgroups32() and setgroups32()
used alloca() to allocate grouplist arrays, with unchecked gidsetsize
coming from the "guest". With NGROUPS_MAX being 65536 (linux, and it
is common for an application to allocate NGROUPS_MAX for getgroups()),
this means a
09.04.2023 12:06, Michael Tokarev пишет:
..
Laurent, can you describe what you're doing there in a bit more details please?
I'd love to fix this one. Do you know which test is/was failing?
Oh, n/m, I found it: it's getgroups01 test in
testcases/kernel/syscalls/getgroups/.
/mjt
04.02.2023 01:23, Laurent Vivier wrote:
Le 03/02/2023 à 22:57, Richard Henderson a écrit :
On 2/3/23 11:49, Laurent Vivier wrote:
..
I'm going to remove this patch from my branch because it breaks something.
When I execute LTP test suite (20200930), I have:
getgroups01 1 TPASS :
Hi!
In the qemu-user case, we allocate various structures and arrays
for conversion of data between host and guest byte orders and sizes.
But it is actually not necessary to do such allocation when the
*size* is the same, and only byte order is different, because the
conversion can be done
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