Re: [PATCH] target: ppc: Correctly initialize HILE in HID-0 for book3s processors

Hi Fabiano, Thanks for looking into this patch and apologies for the delayed reponse. Fabiano Rosas writes: > Narayana Murty N writes: > >> On PPC64 the HILE(Hypervisor Interrupt Little Endian) bit in HID-0 >> register needs to be initialized as per isa 3.0b[1] section >> 2.10. This bit gets

[PATCH 4/5] virtio: Add shared memory capability

From: "Dr. David Alan Gilbert" Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG' to allow defining shared memory regions with sizes and offsets of 2^32 and more. Multiple instances of the capability are allowed and distinguished by a device-specific 'id'. Signed-off-by: Dr. David

[PATCH 1/5] hw/display/virtio-gpu-virgl: virtio_gpu_gl -> virtio_gpu_virgl

From: Gurchetan Singh The virtio-gpu GL device has a heavy dependence on virgl. Acknowledge this by naming functions accurately. Signed-off-by: Gurchetan Singh Reviewed-by: Philippe Mathieu-Daudé --- v1: - (Philippe) virtio_gpu_virglrenderer_reset --> virtio_gpu_virgl_reset_renderer

[PATCH 3/5] hw/display/virtio-gpu-virgl: define callbacks in realize function

From: Gurchetan Singh This reduces the amount of renderer backend specific needed to be exposed to the GL device. We only need one realize function per renderer backend. Signed-off-by: Gurchetan Singh Reviewed-by: Philippe Mathieu-Daudé --- v1: - Remove NULL inits (Philippe) - Use

[PATCH 0/5] virtio-gpu cleanups and obvious definitions

This series refactors the virtio-gpu-gl device in the first three patches. The 4th and 5th patches are definitions already in the virtio-spec and can benefit all three of the following proposals: https://lists.gnu.org/archive/html/qemu-devel/2023-04/msg03791.html

[PATCH 2/5] hw/display/virtio-gpu-virgl: make GL device more library agnostic

From: Gurchetan Singh We need to: - Move all virgl functions to their own file - Only have needed class callbacks in the generic GL device We plan to use this cleanup for gfxstream in the near feature. Signed-off-by: Gurchetan Singh --- hw/display/virtio-gpu-gl.c | 110

[PATCH 5/5] virtio-gpu: CONTEXT_INIT feature

From: Antonio Caggiano The feature can be enabled when a backend wants it. Signed-off-by: Antonio Caggiano Reviewed-by: Marc-André Lureau Signed-off-by: Gurchetan Singh --- hw/display/virtio-gpu-base.c | 3 +++ include/hw/virtio/virtio-gpu.h | 3 +++ 2 files changed, 6 insertions(+) diff

RE: [PATCH v2 11/21] Hexagon (target/hexagon) Short-circuit packet register writes

> -Original Message- > From: Taylor Simpson > Sent: Thursday, April 27, 2023 6:00 PM > To: qemu-devel@nongnu.org > Cc: Taylor Simpson ; richard.hender...@linaro.org; > phi...@linaro.org; a...@rev.ng; a...@rev.ng; Brian Cain > ; Matheus Bernardino (QUIC) > > Subject: [PATCH v2 11/21]

Re: [PATCH v4 2/7] target/riscv: Move pmp_get_tlb_size apart from get_physical_address_pmp

On 2023/4/22 21:03, Weiwei Li wrote: pmp_get_tlb_size can be separated from get_physical_address_pmp and is only needed when ret == TRANSLATE_SUCCESS. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang --- target/riscv/cpu_helper.c | 16 ++-- 1 file changed, 6

Re: [PATCH v4 1/7] target/riscv: Update pmp_get_tlb_size()

On 2023/4/22 21:03, Weiwei Li wrote: PMP entries before the matched PMP entry (including the matched PMP entry) may only cover partial of the TLB page, which may make different regions in that page allow different RWX privs, such as for PMP0 (0x8008~0x800F, R) and PMP1

Re: [PATCH 2/2] target/riscv/vector_helper.c: make vext_set_tail_elems_1s() debug only

On 2023/4/28 04:57, Daniel Henrique Barboza wrote: Commit 3479a814 ("target/riscv: rvv-1.0: add VMA and VTA") added vma and vta fields in the vtype register, while also defining that QEMU doesn't need to have a tail agnostic policy to be compliant with the RVV spec. It ended up removing all

Re: [PATCH 1/2] target/riscv/vector_helper.c: skip set tail when vta is zero

On 2023/4/28 04:57, Daniel Henrique Barboza wrote: The function is a no-op if 'vta' is zero but we're still doing a lot of stuff in this function regardless. vext_set_elems_1s() will ignore every single time (since vta is zero) and we just wasted time. Skip it altogether in this case. Aside

RE: [PATCH] target/hexagon: fix = vs. == mishap

> -Original Message- > From: Richard Henderson > Sent: Thursday, April 27, 2023 8:33 AM > To: Paolo Bonzini ; qemu-devel@nongnu.org > Cc: Taylor Simpson > Subject: Re: [PATCH] target/hexagon: fix = vs. == mishap > > WARNING: This email originated from outside of Qualcomm. Please be

[PATCH v2 20/21] Hexagon (target/hexagon) Move pkt_has_store_s1 to DisasContext

The pkt_has_store_s1 field is only used for bookkeeping helpers with a load. With recent changes that eliminate the need to free TCGv variables, it makes more sense to make this transient. These helpers already take the instruction slot as an argument. We combine the slot and pkt_has_store_s1

[PATCH v2 02/21] Hexagon (target/hexagon) Add DisasContext arg to gen_log_reg_write

Add DisasContext arg to gen_log_reg_write_pair also Signed-off-by: Taylor Simpson Reviewed-by: Richard Henderson --- target/hexagon/gen_tcg.h| 2 +- target/hexagon/genptr.h | 2 +- target/hexagon/genptr.c | 10 +-

[PATCH v2 11/21] Hexagon (target/hexagon) Short-circuit packet register writes

In certain cases, we can avoid the overhead of writing to hex_new_value and write directly to hex_gpr. We add need_commit field to DisasContext indicating if the end-of-packet commit is needed. If it is not needed, get_result_gpr() and get_result_gpr_pair() can return hex_gpr. We pass the

[PATCH v2 18/21] Hexagon (target/hexagon) Move new_pred_value to DisasContext

The new_pred_value array in the CPUHexagonState is only used for bookkeeping within the translation of a packet. With recent changes that eliminate the need to free TCGv variables, these make more sense to be transient and kept in DisasContext. Suggested-by: Richard Henderson Signed-off-by:

[PATCH v2 16/21] Hexagon (target/hexagon) Make special new_value for USR

Precursor to moving new_value from the global state to DisasContext USR will need to stay in the global state because some helpers will set it's value Signed-off-by: Taylor Simpson Reviewed-by: Richard Henderson --- target/hexagon/cpu.h| 1 + target/hexagon/genptr.h | 1

[PATCH v2 06/21] Hexagon (target/hexagon) Remove log_reg_write from op_helper.[ch]

With the overrides added in prior commits, this function is not used Remove references in macros.h Signed-off-by: Taylor Simpson Reviewed-by: Richard Henderson --- target/hexagon/macros.h| 14 -- target/hexagon/op_helper.h | 4 target/hexagon/op_helper.c | 17

[PATCH v2 10/21] Hexagon (target/hexagon) Mark registers as read during packet analysis

Have gen_analyze_funcs mark the registers that are read by the instruction. We also mark the implicit reads using instruction attributes. Signed-off-by: Taylor Simpson Reviewed-by: Richard Henderson --- target/hexagon/translate.h | 36 +++

[PATCH v2 01/21] meson.build Add CONFIG_HEXAGON_IDEF_PARSER

Enable conditional compilation depending on whether idef-parser is configured Signed-off-by: Taylor Simpson --- meson.build | 1 + 1 file changed, 1 insertion(+) diff --git a/meson.build b/meson.build index c44d05a13f..d4e438b033 100644 --- a/meson.build +++ b/meson.build @@ -1859,6 +1859,7 @@

[PATCH v2 08/21] Hexagon (target/hexagon) Clean up pred_written usage

Only endloop instructions will conditionally write to a predicate. When there is an endloop instruction, we preload the values into new_pred_value. The only place pred_written is needed is when HEX_DEBUG is on. We remove the last use of check_for_attrib. However, new uses will be introduced

[PATCH v2 19/21] Hexagon (target/hexagon) Move pred_written to DisasContext

The pred_written variable in the CPUHexagonState is only used for bookkeeping within the translation of a packet. With recent changes that eliminate the need to free TCGv variables, these make more sense to be transient and kept in DisasContext. Suggested-by: Richard Henderson Signed-off-by:

[PATCH v2 05/21] Hexagon (target/hexagon) Add overrides for clr[tf]new

These instructions have implicit reads from p0, so we don't want them in helpers when idef-parser is off. Signed-off-by: Taylor Simpson --- target/hexagon/gen_tcg.h | 16 target/hexagon/macros.h | 4 2 files changed, 16 insertions(+), 4 deletions(-) diff --git

[PATCH v2 21/21] Hexagon (target/hexagon) Move items to DisasContext

The following items in the CPUHexagonState are only used for bookkeeping within the translation of a packet. With recent changes that eliminate the need to free TCGv variables, these make more sense to be transient and kept in DisasContext. The following items are moved dczero_addr

[PATCH v2 07/21] Hexagon (target/hexagon) Eliminate uses of log_pred_write function

These instructions have implicit writes to registers, so we don't want them to be helpers when idef-parser is off. The following instructions are overriden S2_cabacdecbin SA1_cmpeqi Remove the log_pred_write function from op_helper.c Remove references in macros.h Signed-off-by: Taylor

[PATCH v2 14/21] Hexagon (target/hexagon) Short-circuit more HVX single instruction packets

The generated helpers for HVX use pass-by-reference, so they can't short-circuit when the reads/writes overlap. The instructions with overrides are OK because they use tcg_gen_gvec_*. We add a flag has_hvx_helper to DisasContext and extend gen_analyze_funcs to set the flag when the instruction

[PATCH v2 09/21] Hexagon (target/hexagon) Don't overlap dest writes with source reads

When generating TCG, make sure we have read all the operand registers before writing to the destination registers. This is a prerequesite for short-circuiting where the source and dest operands could be the same. Signed-off-by: Taylor Simpson Reviewed-by: Richard Henderson ---

[PATCH v2 15/21] Hexagon (target/hexagon) Add overrides for disabled idef-parser insns

The following have overrides S2_insert S2_insert_rp S2_asr_r_svw_trun A2_swiz These instructions have semantics that write to the destination before all the operand reads have been completed. Therefore, the idef-parser versions were disabled with the short-circuit patch. Test

[PATCH v2 03/21] Hexagon (target/hexagon) Add overrides for loop setup instructions

These instructions have implicit writes to registers, so we don't want them to be helpers when idef-parser is off. Signed-off-by: Taylor Simpson Acked-by: Richard Henderson --- target/hexagon/gen_tcg.h | 21 +++ target/hexagon/genptr.c | 44

[PATCH v2 00/21] Hexagon (target/hexagon) short-circuit and move to DisasContext

This patch series achieves two major goals Goal 1: Short-circuit packet semantics In certain cases, we can avoid the overhead of writing to hex_new_value and write directly to hex_gpr. Here's a simple example of the TCG generated for 0x004000b4: 0x7800c020 { R0 = #0x1 }

[PATCH v2 17/21] Hexagon (target/hexagon) Move new_value to DisasContext

The new_value array in the CPUHexagonState is only used for bookkeeping within the translation of a packet. With recent changes that eliminate the need to free TCGv variables, these make more sense to be transient and kept in DisasContext. Suggested-by: Richard Henderson Signed-off-by: Taylor

[PATCH v2 13/21] Hexagon (target/hexagon) Short-circuit packet HVX writes

In certain cases, we can avoid the overhead of writing to future_VRegs and write directly to VRegs. We consider HVX reads/writes when computing ctx->need_commit. Then, we can early-exit from gen_commit_hvx. Signed-off-by: Taylor Simpson Reviewed-by: Richard Henderson ---

[PATCH v2 12/21] Hexagon (target/hexagon) Short-circuit packet predicate writes

In certain cases, we can avoid the overhead of writing to hex_new_pred_value and write directly to hex_pred. We consider predicate reads/writes when computing ctx->need_commit. The get_result_pred() function uses this field to decide between hex_new_pred_value and hex_pred. Then, we can

[PATCH v2 04/21] Hexagon (target/hexagon) Add overrides for allocframe/deallocframe

These instructions have implicit writes to registers, so we don't want them to be helpers when idef-parser is off. Signed-off-by: Taylor Simpson Reviewed-by: Richard Henderson --- target/hexagon/gen_tcg.h | 32 +++ target/hexagon/genptr.c | 47

[PATCH v2 5/9] Hexagon (tests/tcg/hexagon) Add v68 HVX tests

Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson --- tests/tcg/hexagon/v68_hvx.c | 90 + tests/tcg/hexagon/v6mpy_ref.c.inc | 161 ++ tests/tcg/hexagon/Makefile.target | 3 + 3 files changed, 254 insertions(+) create mode 100644

[PATCH v2 6/9] Hexagon (target/hexagon) Add v69 HVX instructions

The following instructions are added V6_vasrvuhubrndsat V6_vasrvuhubsat V6_vasrvwuhrndsat V6_vasrvwuhsat V6_vassign_tmp V6_vcombine_tmp V6_vmpyuhvs Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson --- target/hexagon/gen_tcg_hvx.h | 12

[PATCH v2 0/9] Hexagon (target/hexagon) New architecture support

Add support for new Hexagon architecture versions v68/v69/v71/v73 Changes in v2 Address feedback from Anton Johansson Rename v6mpy_ref.h to v6mpy_ref.c.inc Shorten format of hexagon_v*_cpu_init_functions Change loop counts MAX_VEC_SIZE_BYTES / 2 to MAX_VEC_SIZE_BYTES / 4

[PATCH v2 1/9] Hexagon (target/hexagon) Add support for v68/v69/v71/v73

Add support for the ELF flags Move target/hexagon/cpu.[ch] to be v73 Change the compiler flag used by "make check-tcg" The decbin instruction is removed in Hexagon v73, so check the version before trying to compile the instruction. Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson ---

[PATCH v2 8/9] Hexagon (target/hexagon) Add v73 scalar instructions

The following instructions are added J2_callrh J2_junprh Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson --- target/hexagon/gen_tcg.h | 4 target/hexagon/attribs_def.h.inc | 1 + target/hexagon/imported/branch.idef | 7 ++-

[PATCH v2 4/9] Hexagon (target/hexagon) Add v68 HVX instructions

The following instructions are added V6_v6mpyvubs10_vxx V6_v6mpyhubs10_vxx V6_v6mpyvubs10 V6_v6mpyhubs10 Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson --- target/hexagon/mmvec/macros.h| 9 +- target/hexagon/imported/mmvec/encode_ext.def | 8 +-

[PATCH v2 3/9] Hexagon (tests/tcg/hexagon) Add v68 scalar tests

Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson --- tests/tcg/hexagon/v68_scalar.c| 186 ++ tests/tcg/hexagon/Makefile.target | 2 + 2 files changed, 188 insertions(+) create mode 100644 tests/tcg/hexagon/v68_scalar.c diff --git

[PATCH v2 7/9] Hexagon (tests/tcg/hexagon) Add v69 HVX tests

The following instructions are tested V6_vasrvuhubrndsat V6_vasrvuhubsat V6_vasrvwuhrndsat V6_vasrvwuhsat V6_vassign_tmp V6_vcombine_tmp V6_vmpyuhvs Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson --- tests/tcg/hexagon/v69_hvx.c | 318

[PATCH v2 2/9] Hexagon (target/hexagon) Add v68 scalar instructions

The following instructions are added L2_loadw_aq L4_loadd_aq R6_release_at_vi R6_release_st_vi S2_storew_rl_at_vi S4_stored_rl_at_vi S2_storew_rl_st_vi S4_stored_rl_st_vi The release instructions are nop's in qemu. The others behave as loads/stores. The

[PATCH v2 9/9] Hexagon (tests/tcg/hexagon) Add v73 scalar tests

Tests added for the following instructions J2_callrh J2_jumprh Signed-off-by: Taylor Simpson Reviewed-by: Anton Johansson --- tests/tcg/hexagon/v73_scalar.c| 96 +++ tests/tcg/hexagon/Makefile.target | 2 + 2 files changed, 98 insertions(+) create mode

Re: [PATCH 0/2] target/riscv: RVV 1-fill tail element changes

On Thu, 27 Apr 2023 13:57:06 PDT (-0700), dbarb...@ventanamicro.com wrote: Hi, This series makes changes in vext_set_tail_elements_1s() to be a little nicer to the emulation. First patch makes the function a no-op when vta == 0. Aside from the logic simplification we also have a little

Re: [PATCH v3 4/4] configure: add --disable-colo-proxy option

On Thu, 27 Apr 2023 23:29:46 +0300 Vladimir Sementsov-Ogievskiy wrote: > Add option to not build filter-mirror, filter-rewriter and > colo-compare when they are not needed. > > There could be more agile configuration, for example add separate > options for each filter, but that may be done in

Re: [PATCH v3 3/4] build: move COLO under CONFIG_REPLICATION

On Thu, 27 Apr 2023 23:29:45 +0300 Vladimir Sementsov-Ogievskiy wrote: > We don't allow to use x-colo capability when replication is not > configured. So, no reason to build COLO when replication is disabled, > it's unusable in this case. > > Note also that the check in migrate_caps_check() is

Re: [PATCH v3 4/4] configure: add --disable-colo-proxy option

On 28.04.23 00:18, Lukas Straub wrote: On Thu, 27 Apr 2023 23:29:46 +0300 Vladimir Sementsov-Ogievskiy wrote: Add option to not build filter-mirror, filter-rewriter and colo-compare when they are not needed. There could be more agile configuration, for example add separate options for each

[PATCH v10 7/8] raven: disable reentrancy detection for iomem

As the code is designed for re-entrant calls from raven_io_ops to pci-conf, mark raven_io_ops as reentrancy-safe. Signed-off-by: Alexander Bulekov --- hw/pci-host/raven.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/hw/pci-host/raven.c b/hw/pci-host/raven.c index

[PATCH v10 3/8] checkpatch: add qemu_bh_new/aio_bh_new checks

Advise authors to use the _guarded versions of the APIs, instead. Reviewed-by: Darren Kenny Signed-off-by: Alexander Bulekov --- scripts/checkpatch.pl | 8 1 file changed, 8 insertions(+) diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index d768171dcf..eeaec436eb 100755

[PATCH v10 6/8] bcm2835_property: disable reentrancy detection for iomem

As the code is designed for re-entrant calls from bcm2835_property to bcm2835_mbox and back into bcm2835_property, mark iomem as reentrancy-safe. Signed-off-by: Alexander Bulekov Reviewed-by: Thomas Huth --- hw/misc/bcm2835_property.c | 7 +++ 1 file changed, 7 insertions(+) diff --git

[PATCH v10 0/8] memory: prevent dma-reentracy issues

v8-> v9: - Replace trace-events and attempt at making re-entrancy fatal with a warn_report message. This message should only be printed if a device is broken (and needs to be marked re-entrancy safe), or if something in the guest is attempting to trigger unintentional

[PATCH v10 4/8] hw: replace most qemu_bh_new calls with qemu_bh_new_guarded

This protects devices from bh->mmio reentrancy issues. Thanks: Thomas Huth for diagnosing OS X test failure. Reviewed-by: Darren Kenny Reviewed-by: Stefan Hajnoczi Reviewed-by: Michael S. Tsirkin Reviewed-by: Paul Durrant Signed-off-by: Alexander Bulekov Reviewed-by: Thomas Huth ---

[PATCH v10 5/8] lsi53c895a: disable reentrancy detection for script RAM

As the code is designed to use the memory APIs to access the script ram, disable reentrancy checks for the pseudo-RAM ram_io MemoryRegion. In the future, ram_io may be converted from an IO to a proper RAM MemoryRegion. Reported-by: Fiona Ebner Signed-off-by: Alexander Bulekov Reviewed-by:

[PATCH v10 8/8] apic: disable reentrancy detection for apic-msi

As the code is designed for re-entrant calls to apic-msi, mark apic-msi as reentrancy-safe. Signed-off-by: Alexander Bulekov Reviewed-by: Darren Kenny --- hw/intc/apic.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/hw/intc/apic.c b/hw/intc/apic.c index 20b5a94073..ac3d47d231

[PATCH v10 2/8] async: Add an optional reentrancy guard to the BH API

Devices can pass their MemoryReentrancyGuard (from their DeviceState), when creating new BHes. Then, the async API will toggle the guard before/after calling the BH call-back. This prevents bh->mmio reentrancy issues. Reviewed-by: Darren Kenny Signed-off-by: Alexander Bulekov ---

[PATCH v10 1/8] memory: prevent dma-reentracy issues

Add a flag to the DeviceState, when a device is engaged in PIO/MMIO/DMA. This flag is set/checked prior to calling a device's MemoryRegion handlers, and set when device code initiates DMA. The purpose of this flag is to prevent two types of DMA-based reentrancy issues: 1.) mmio -> dma -> mmio

[PATCH 1/2] target/riscv/vector_helper.c: skip set tail when vta is zero

The function is a no-op if 'vta' is zero but we're still doing a lot of stuff in this function regardless. vext_set_elems_1s() will ignore every single time (since vta is zero) and we just wasted time. Skip it altogether in this case. Aside from the code simplification there's a noticeable

[PATCH 0/2] target/riscv: RVV 1-fill tail element changes

Hi, This series makes changes in vext_set_tail_elements_1s() to be a little nicer to the emulation. First patch makes the function a no-op when vta == 0. Aside from the logic simplification we also have a little performance boost. Second patch makes the function debug only. The logic is

[PATCH 2/2] target/riscv/vector_helper.c: make vext_set_tail_elems_1s() debug only

Commit 3479a814 ("target/riscv: rvv-1.0: add VMA and VTA") added vma and vta fields in the vtype register, while also defining that QEMU doesn't need to have a tail agnostic policy to be compliant with the RVV spec. It ended up removing all tail handling code as well. Later, commit 752614ca

Re: [PATCH 03/20] block: bdrv/blk_co_unref() for calls in coroutine context

Il gio 27 apr 2023, 19:00 Kevin Wolf ha scritto: > By the way, and slightly unrelated, can vrc somehow help with finding > places that call coroutine wrappers without holding the AioContext lock? > (This results in an abort() when AIO_WAIT_WHILE() tries to unlock the > AioContext.) This is one

Re: [PATCH v3 1/4] block/meson.build: prefer positive condition for replication

On Thu, 27 Apr 2023 23:29:43 +0300 Vladimir Sementsov-Ogievskiy wrote: > Signed-off-by: Vladimir Sementsov-Ogievskiy > Reviewed-by: Juan Quintela > Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Lukas Straub > --- > block/meson.build | 2 +- > 1 file changed, 1 insertion(+), 1

[PATCH v3 0/4] COLO: improve build options

v3: 01: add r-bs 02: improve commit message 03: - improve commit message - drop ifdefs from migration/colo.c which are not needed anymore - don't move migrate_colo_enabled() (now just migrate_colo()), instead modify it inplace - keep colo-compare.c for now (will be handled in updated

[PATCH v3 1/4] block/meson.build: prefer positive condition for replication

Signed-off-by: Vladimir Sementsov-Ogievskiy Reviewed-by: Juan Quintela Reviewed-by: Philippe Mathieu-Daudé --- block/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/block/meson.build b/block/meson.build index 382bec0e7d..b9a72e219b 100644 --- a/block/meson.build

[PATCH v3 3/4] build: move COLO under CONFIG_REPLICATION

We don't allow to use x-colo capability when replication is not configured. So, no reason to build COLO when replication is disabled, it's unusable in this case. Note also that the check in migrate_caps_check() is not the only restriction: some functions in migration/colo.c will just abort if

[PATCH v3 4/4] configure: add --disable-colo-proxy option

Add option to not build filter-mirror, filter-rewriter and colo-compare when they are not needed. There could be more agile configuration, for example add separate options for each filter, but that may be done in future on demand. The aim of this patch is to make possible to disable the whole

[PATCH v3 2/4] scripts/qapi: allow optional experimental enum values

We have 'if' feature for some things in QAPI, including enum values. But currently it doesn't work for experimental enum values, as in generated QEnumLookup structure, the description for additional features (for example - "unstable") is not surrounded by corresponding "#ifdef"s. So let's fix it.

Re: [PATCH 0/6] Add RISC-V KVM AIA Support

Hi, The patches seems to be based on an old QEMU code base. E.g. patch 2 does not have the changes made by 568e0614d097 that was merged in January this year. Can you please re-send the series based on top of Alistair's riscv-to-apply.next

Re: [PATCH v2 3/4] build: move COLO under CONFIG_REPLICATION

On 23.04.23 04:54, Zhang, Chen wrote: -Original Message- From: Vladimir Sementsov-Ogievskiy Sent: Friday, April 21, 2023 4:36 PM To: Zhang, Chen;qemu-devel@nongnu.org Cc:qemu-bl...@nongnu.org;michael.r...@amd.com;arm...@redhat.com;

Re: [PATCH 06/19] migration/rdma: Unfold last user of acct_update_position()

On Thu, 27 Apr 2023 18:34:36 +0200 Juan Quintela wrote: > Signed-off-by: Juan Quintela Reviewed-by: Lukas Straub > --- > migration/ram.c | 9 - > migration/ram.h | 1 - > migration/rdma.c | 4 +++- > 3 files changed, 3 insertions(+), 11 deletions(-) > > diff --git

Re: [PATCH 05/19] migration/rdma: Split the zero page case from acct_update_position

On Thu, 27 Apr 2023 18:34:35 +0200 Juan Quintela wrote: > Now that we have atomic counters, we can do it on the place that we > need it, no need to do it inside ram.c. > > Signed-off-by: Juan Quintela Reviewed-by: Lukas Straub > --- > migration/ram.c | 12 > migration/ram.h

Re: [PATCH 04/19] migration: Rename RAMStats to MigrationAtomicStats

On Thu, 27 Apr 2023 18:34:34 +0200 Juan Quintela wrote: > It is lousely based on MigrationStats, but that name is taken, so this > is the best one that I came with. > > Signed-off-by: Juan Quintela Reviewed-by: Lukas Straub > --- > > If you have any good suggestion for the name, I am all

Re: [PATCH v11 08/13] tests/qtest: Fix tests when no KVM or TCG are present

On Wed, Apr 26, 2023 at 03:00:08PM -0300, Fabiano Rosas wrote: > It is possible to have a build with both TCG and KVM disabled due to > Xen requiring the i386 and x86_64 binaries to be present in an aarch64 > host. > > If we build with --disable-tcg on the aarch64 host, we will end-up > with a

Re: [PATCH 03/19] migration: Rename ram_counters to mig_stats

On Thu, 27 Apr 2023 18:34:33 +0200 Juan Quintela wrote: > migration_stats is just too long, and it is going to have more than > ram counters in the near future. > > Signed-off-by: Juan Quintela Reviewed-by: Lukas Straub > --- > migration/migration-stats.c | 2 +- >

Re: [PATCH 02/19] migration: Move ram_stats to its own file migration-stats.[ch]

On Thu, 27 Apr 2023 18:34:32 +0200 Juan Quintela wrote: > There is already include/qemu/stats.h, so stats.h was a bad idea. > We want this file to not depend on anything else, we will move all the > migration counters/stats to this struct. > > Signed-off-by: Juan Quintela Reviewed-by: Lukas

Re: [PATCH 01/19] multifd: We already account for this packet on the multifd thread

On Thu, 27 Apr 2023 18:34:31 +0200 Juan Quintela wrote: > Signed-off-by: Juan Quintela Reviewed-by: Lukas Straub > --- > migration/multifd.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/migration/multifd.c b/migration/multifd.c > index 6a59c03dd2..6053012ad9 100644 > ---

Re: [PATCH 10/13] hw/ide/piix: Reuse PCIIDEState::{cmd,data}_ops

Am 27. April 2023 10:52:17 UTC schrieb Mark Cave-Ayland : >On 26/04/2023 21:14, Bernhard Beschow wrote: > >> Am 26. April 2023 18:18:35 UTC schrieb Bernhard Beschow : >>> >>> >>> Am 26. April 2023 11:37:48 UTC schrieb Mark Cave-Ayland >>> : On 22/04/2023 16:07, Bernhard Beschow wrote:

Re: [PATCH v2] meson: Pass -j option to sphinx

Daniel P. Berrangé writes: > On Thu, Apr 27, 2023 at 02:25:16PM -0300, Fabiano Rosas wrote: >> Save a bit of build time by passing the number of jobs option to >> sphinx. >> >> We cannot use the -j option from make because meson does not support >> setting build time parameters for custom

Re: [PATCH v2] meson: Pass -j option to sphinx

On Thu, Apr 27, 2023 at 02:25:16PM -0300, Fabiano Rosas wrote: > Save a bit of build time by passing the number of jobs option to > sphinx. > > We cannot use the -j option from make because meson does not support > setting build time parameters for custom targets. Use nproc instead or > the

[PATCH v2] meson: Pass -j option to sphinx

Save a bit of build time by passing the number of jobs option to sphinx. We cannot use the -j option from make because meson does not support setting build time parameters for custom targets. Use nproc instead or the equivalent sphinx option "-j auto", if that is available. Also make sure our

[PATCH v10 3/4] qemu-iotests: test zone append operation

The patch tests zone append writes by reporting the zone wp after the completion of the call. "zap -p" option can print the sector offset value after completion, which should be the start sector where the append write begins. Signed-off-by: Sam Li Reviewed-by: Stefan Hajnoczi ---

[PATCH v10 2/4] block: introduce zone append write for zoned devices

A zone append command is a write operation that specifies the first logical block of a zone as the write position. When writing to a zoned block device using zone append, the byte offset of the call may point at any position within the zone to which the data is being appended. Upon completion the

[PATCH v10 4/4] block: add some trace events for zone append

Signed-off-by: Sam Li Reviewed-by: Dmitry Fomichev Reviewed-by: Stefan Hajnoczi --- block/file-posix.c | 3 +++ block/trace-events | 2 ++ 2 files changed, 5 insertions(+) diff --git a/block/file-posix.c b/block/file-posix.c index 8fc7f73d2c..5f1745ede8 100644 --- a/block/file-posix.c +++

[PATCH v10 1/4] file-posix: add tracking of the zone write pointers

Since Linux doesn't have a user API to issue zone append operations to zoned devices from user space, the file-posix driver is modified to add zone append emulation using regular writes. To do this, the file-posix driver tracks the wp location of all zones of the device. It uses an array of

[PATCH v10 0/4] Add zone append write for zoned device

This patch series add zone append operation based on the previous zoned device support part. The file-posix driver is modified to add zone append emulation using regular writes. v9: - address review comments [Stefan] * fix get_zones_wp() for wrong offset index * fix misuses of

[PATCH v19 6/8] iotests: test new zone operations

The new block layer APIs of zoned block devices can be tested by: $ tests/qemu-iotests/check zoned Run each zone operation on a newly created null_blk device and see whether it outputs the same zone information. Signed-off-by: Sam Li Reviewed-by: Stefan Hajnoczi Acked-by: Kevin Wolf

[PATCH v19 7/8] block: add some trace events for new block layer APIs

Signed-off-by: Sam Li Reviewed-by: Stefan Hajnoczi Reviewed-by: Dmitry Fomichev Acked-by: Kevin Wolf Message-id: 20230324090605.28361-8-faithilike...@gmail.com Signed-off-by: Stefan Hajnoczi --- block/file-posix.c | 3 +++ block/trace-events | 2 ++ 2 files changed, 5 insertions(+) diff

[PATCH v19 0/8] Add support for zoned device

Zoned Block Devices (ZBDs) devide the LBA space to block regions called zones that are larger than the LBA size. It can only allow sequential writes, which reduces write amplification in SSD, leading to higher throughput and increased capacity. More details about ZBDs can be found at:

[PATCH v19 1/8] block/block-common: add zoned device structs

Signed-off-by: Sam Li Reviewed-by: Stefan Hajnoczi Reviewed-by: Damien Le Moal Reviewed-by: Hannes Reinecke Reviewed-by: Dmitry Fomichev Acked-by: Kevin Wolf Message-id: 20230324090605.28361-2-faithilike...@gmail.com [Adjust commit message prefix as suggested by Philippe Mathieu-Daudé .

[PATCH v19 3/8] block/block-backend: add block layer APIs resembling Linux ZonedBlockDevice ioctls

Add zoned device option to host_device BlockDriver. It will be presented only for zoned host block devices. By adding zone management operations to the host_block_device BlockDriver, users can use the new block layer APIs including Report Zone and four zone management operations (open, close,

[PATCH v19 4/8] block/raw-format: add zone operations to pass through requests

raw-format driver usually sits on top of file-posix driver. It needs to pass through requests of zone commands. Signed-off-by: Sam Li Reviewed-by: Stefan Hajnoczi Reviewed-by: Damien Le Moal Reviewed-by: Hannes Reinecke Reviewed-by: Dmitry Fomichev Acked-by: Kevin Wolf Message-id:

[PATCH v19 8/8] docs/zoned-storage: add zoned device documentation

Add the documentation about the zoned device support to virtio-blk emulation. Signed-off-by: Sam Li Reviewed-by: Stefan Hajnoczi Reviewed-by: Damien Le Moal Reviewed-by: Dmitry Fomichev Acked-by: Kevin Wolf Message-id: 20230324090605.28361-9-faithilike...@gmail.com [Add index-api.rst to fix

[PATCH v19 5/8] block: add zoned BlockDriver check to block layer

Putting zoned/non-zoned BlockDrivers on top of each other is not allowed. Signed-off-by: Sam Li Reviewed-by: Stefan Hajnoczi Reviewed-by: Hannes Reinecke Reviewed-by: Dmitry Fomichev Acked-by: Kevin Wolf Message-id: 20230324090605.28361-6-faithilike...@gmail.com [Adjust commit message prefix

[PATCH v19 2/8] block/file-posix: introduce helper functions for sysfs attributes

Use get_sysfs_str_val() to get the string value of device zoned model. Then get_sysfs_zoned_model() can convert it to BlockZoneModel type of QEMU. Use get_sysfs_long_val() to get the long value of zoned device information. Signed-off-by: Sam Li Reviewed-by: Hannes Reinecke Reviewed-by: Stefan

Re: [PATCH v20 03/21] target/s390x/cpu topology: handle STSI(15) and build the SYSIB

On 25/04/2023 18.14, Pierre Morel wrote: On interception of STSI(15.1.x) the System Information Block (SYSIB) is built from the list of pre-ordered topology entries. Signed-off-by: Pierre Morel --- MAINTAINERS | 1 + include/hw/s390x/cpu-topology.h | 24 +++

Re: [PATCH 03/20] block: bdrv/blk_co_unref() for calls in coroutine context

Am 27.04.2023 um 16:30 hat Paolo Bonzini geschrieben: > Il mar 25 apr 2023, 19:32 Kevin Wolf ha scritto: > > > These functions must not be called in coroutine context, because they > > need write access to the graph. > > > > With these patches applied vrc is still complaining about calls to >

[PATCH 12/19] migration/rdma: It makes no sense to recive that flag without RDMA

This could only happen if the source send RAM_SAVE_FLAG_HOOK (i.e. rdma) and destination don't have CONFIG_RDMA. Signed-off-by: Juan Quintela --- migration/qemu-file.c | 8 1 file changed, 8 deletions(-) diff --git a/migration/qemu-file.c b/migration/qemu-file.c index

[PATCH 19/19] migration/rdma: Move rdma constants from qemu-file.h to rdma.h

Signed-off-by: Juan Quintela --- migration/qemu-file.h | 17 - migration/ram.c | 2 +- migration/rdma.h | 16 3 files changed, 17 insertions(+), 18 deletions(-) diff --git a/migration/qemu-file.h b/migration/qemu-file.h index 9c99914b21..5129b6f196

[PATCH 03/19] migration: Rename ram_counters to mig_stats

migration_stats is just too long, and it is going to have more than ram counters in the near future. Signed-off-by: Juan Quintela --- migration/migration-stats.c | 2 +- migration/migration-stats.h | 2 +- migration/migration.c | 32 - migration/multifd.c

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