[PULL 47/89] target/riscv: remove cpu->cfg.ext_j

From: Daniel Henrique Barboza Create a new "j" RISCVCPUMisaExtConfig property that will update env->misa_ext* with RVJ. Instances of cpu->cfg.ext_j and similar are replaced with riscv_has_ext(env, RVJ). Remove the old "j" property and 'ext_j' from RISCVCPUConfig. Signed-off-by: Daniel Henrique

[PULL 77/89] target/riscv: Suppress pte update with is_debug

From: Richard Henderson The debugger should not modify PTE_A or PTE_D. Signed-off-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Weiwei Li Tested-by: Daniel Henrique Barboza Message-Id: <20230325105429.1142530-22-richard.hender...@linaro.org> Message-Id:

[PULL 35/89] target/riscv/cpu.c: remove 'multi_letter' from isa_ext_data

From: Daniel Henrique Barboza We don't have MISA extensions in isa_edata_arr[] anymore. Remove the redundant 'multi_letter' field from isa_ext_data. Suggested-by: Weiwei Li Signed-off-by: Daniel Henrique Barboza Reviewed-by: Weiwei Li Reviewed-by: Alistair Francis Message-Id:

[PULL 45/89] target/riscv: remove cpu->cfg.ext_u

From: Daniel Henrique Barboza Create a new "u" RISCVCPUMisaExtConfig property that will update env->misa_ext* with RVU. Instances of cpu->cfg.ext_u and similar are replaced with riscv_has_ext(env, RVU). Remove the old "u" property and 'ext_u' from RISCVCPUConfig. Signed-off-by: Daniel Henrique

[PULL 54/89] target/riscv: Use PRV_RESERVED instead of PRV_H

From: Weiwei Li PRV_H has no real meaning, but just a reserved privilege mode currently. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson Message-Id: <20230407014743.18779-3-liwei...@iscas.ac.cn> [ Changes by AF: - Convert

[PULL 50/89] target/riscv: remove cfg.ext_g setup from rv64_thead_c906_cpu_init()

From: Daniel Henrique Barboza This CPU is enabling G via cfg.ext_g and, at the same time, setting IMAFD in set_misa() and cfg.ext_icsr. riscv_cpu_validate_set_extensions() is already doing that, so there's no need for cpu_init() setups to worry about setting G and its extensions.

[PULL 46/89] target/riscv: remove cpu->cfg.ext_h

From: Daniel Henrique Barboza Create a new "h" RISCVCPUMisaExtConfig property that will update env->misa_ext* with RVH. Instances of cpu->cfg.ext_h and similar are replaced with riscv_has_ext(env, RVH). Remove the old "h" property and 'ext_h' from RISCVCPUConfig. Signed-off-by: Daniel Henrique

[PULL 28/89] target/riscv: Remove riscv_cpu_virt_enabled()

From: Weiwei Li Directly use env->virt_enabled instead. Suggested-by: LIU Zhiwei Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson Reviewed-by: LIU Zhiwei Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-Id:

[PULL 55/89] target/riscv: Legalize MPP value in write_mstatus

From: Weiwei Li mstatus.MPP field is a WARL field since priv version 1.11, so we remain it unchanged if an invalid value is written into it. And after this, RVH shouldn't be passed to riscv_cpu_set_mode(). Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Alistair Francis

[PULL 18/89] target/riscv: Add support for Zce

From: Weiwei Li Add and expose property for Zce: * Specifying Zce without F includes Zca, Zcb, Zcmp, Zcmt. * Specifying Zce with F includes Zca, Zcb, Zcmp, Zcmt and Zcf. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Alistair Francis Message-Id:

[PULL 19/89] target/riscv: Fix itrigger when icount is used

From: LIU Zhiwei When I boot a ubuntu image, QEMU output a "Bad icount read" message and exit. The reason is that when execute helper_mret or helper_sret, it will cause a call to icount_get_raw_locked (), which needs set can_do_io flag on cpustate. Thus we setting this flag when execute these

[PULL 39/89] target/riscv: remove cpu->cfg.ext_d

From: Daniel Henrique Barboza Create a new "d" RISCVCPUMisaExtConfig property that will update env->misa_ext* with RVD. Instances of cpu->cfg.ext_d and similar are replaced with riscv_has_ext(env, RVD). Remove the old "d" property and 'ext_d' from RISCVCPUConfig. Signed-off-by: Daniel Henrique

[PULL 32/89] hw/riscv: Add signature dump function for spike to run ACT tests

From: Weiwei Li Add signature and signature-granularity properties in spike to specify the target signatrue file and the line size for signature data. Recgonize the signature section between begin_signature and end_signature symbols when loading elf of ACT tests. Then dump signature data in

[PULL 17/89] disas/riscv.c: add disasm support for Zc*

From: Weiwei Li Zcmp/Zcmt instructions will override disasm for c.fld*/c.fsd* instructions currently. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Acked-by: Alistair Francis Message-Id: <20230307081403.61950-10-liwei...@iscas.ac.cn> Signed-off-by: Alistair Francis ---

[PULL 30/89] target/riscv: Fix format for comments

From: Weiwei Li Fix formats for multi-lines comments. Add spaces around single line comments(after "/*" and before "*/"). Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Acked-by: Richard Henderson Reviewed-by: LIU Zhiwei Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique

[PULL 27/89] target/riscv: Set opcode to env->bins for illegal/virtual instruction fault

From: Weiwei Li decode_save_opc() will not work for generate_exception(), since 0 is passed to riscv_raise_exception() as pc in helper_raise_exception(), and bins will not be restored in this case. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Daniel Henrique Barboza

[PULL 51/89] target/riscv: add RVG and remove cpu->cfg.ext_g

From: Daniel Henrique Barboza We're still have one RISCVCPUConfig MISA flag, 'ext_g'. We'll remove it the same way we did with the others: create a "g" RISCVCPUMisaExtConfig property, remove the old "g" property, remove all instances of 'cfg.ext_g' and use riscv_has_ext(env, RVG). The caveat is

[PULL 43/89] target/riscv: remove cpu->cfg.ext_m

From: Daniel Henrique Barboza Create a new "m" RISCVCPUMisaExtConfig property that will update env->misa_ext* with RVM. Instances of cpu->cfg.ext_m and similar are replaced with riscv_has_ext(env, RVM). Remove the old "m" property and 'ext_m' from RISCVCPUConfig. Signed-off-by: Daniel Henrique

[PULL 42/89] target/riscv: remove cpu->cfg.ext_e

From: Daniel Henrique Barboza Create a new "e" RISCVCPUMisaExtConfig property that will update env->misa_ext* with RVE. Instances of cpu->cfg.ext_e and similar are replaced with riscv_has_ext(env, RVE). Remove the old "e" property and 'ext_e' from RISCVCPUConfig. Signed-off-by: Daniel Henrique

[PULL 14/89] target/riscv: add support for Zcmp extension

From: Weiwei Li Add encode, trans* functions for Zcmp instructions. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Message-Id: <20230307081403.61950-7-liwei...@iscas.ac.cn> Signed-off-by: Alistair Francis ---

[PULL 15/89] target/riscv: add support for Zcmt extension

From: Weiwei Li Add encode, trans* functions and helper functions support for Zcmt instrutions. Add support for jvt csr. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Message-Id:

[PULL 12/89] target/riscv: add support for Zcd extension

From: Weiwei Li Separate c_fld/c_fsd from fld/fsd to add additional check for c.fld{sp}/c.fsd{sp} which is useful for zcmp/zcmt to reuse their encodings. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Message-Id:

[PULL 26/89] target/riscv: Fix addr type for get_physical_address

From: Weiwei Li Function get_physical_address() translates both virtual address and guest physical address, and the latter is 34-bits for Sv32x4. So we should use vaddr type for 'addr' parameter. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Alistair Francis Reviewed-by:

[PULL 03/89] target/riscv: Simplify getting RISCVCPU pointer from env

From: Weiwei Li Use env_archcpu() to get RISCVCPU pointer from env directly. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Message-Id:

[PULL 36/89] target/riscv: introduce riscv_cpu_add_misa_properties()

From: Daniel Henrique Barboza Ever since RISCVCPUConfig got introduced users are able to set CPU extensions in the command line. User settings are reflected in the cpu->cfg object for later use. These properties are used in the target/riscv/cpu.c code, most notably in

[PULL 29/89] target/riscv: Fix format for indentation

From: Weiwei Li Fix identation problems, and try to use the same indentation strategy in the same file. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: LIU Zhiwei Acked-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-Id:

[PULL 09/89] target/riscv: add cfg properties for Zc* extension

From: Weiwei Li Add properties for Zca,Zcb,Zcf,Zcd,Zcmp,Zcmt extension. Add check for these properties. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Message-Id: <20230307081403.61950-2-liwei...@iscas.ac.cn> Signed-off-by:

[PULL 25/89] target/riscv: Remove redundant parentheses

From: Weiwei Li Remove redundant parentheses in get_physical_address. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson Reviewed-by: LIU Zhiwei Reviewed-by: Alistair Francis Message-Id: <20230327080858.39703-8-liwei...@iscas.ac.cn> Signed-off-by: Alistair

[PULL 05/89] target/riscv: Simplify arguments for riscv_csrrw_check

From: Weiwei Li Remove RISCVCPU argument, and get cfg infomation from CPURISCVState directly. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Message-Id:

[PULL 21/89] target/riscv: Remove redundant check on RVH

From: Weiwei Li Check on riscv_cpu_virt_enabled contains the check on RVH. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson Reviewed-by: LIU Zhiwei Reviewed-by: Alistair Francis Message-Id: <20230327080858.39703-3-liwei...@iscas.ac.cn> Signed-off-by:

[PULL 13/89] target/riscv: add support for Zcb extension

From: Weiwei Li Add encode and trans* functions support for Zcb instructions. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Message-Id: <20230307081403.61950-6-liwei...@iscas.ac.cn> Signed-off-by: Alistair Francis ---

[PULL 23/89] target/riscv: Remove check on RVH for riscv_cpu_set_virt_enabled

From: Weiwei Li In current implementation, riscv_cpu_set_virt_enabled is only called when RVH is enabled. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson Reviewed-by: LIU Zhiwei Reviewed-by: Alistair Francis Message-Id:

[PULL 06/89] target/riscv: refactor Zicond support

From: Philipp Tomsich After the original Zicond support was stuck/fell through the cracks on the mailing list at v3 (and a different implementation was merged in the meanwhile), we need to refactor Zicond to prepare it to be reused by XVentanaCondOps. This commit lifts the common logic out into

[PULL 01/89] target/riscv: Avoid env_archcpu() when reading RISCVCPUConfig

From: Weiwei Li Use riscv_cpu_cfg(env) instead of env_archcpu().cfg. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Message-Id: <20230309071329.45932-2-liwei...@iscas.ac.cn> Signed-off-by: Alistair Francis ---

[PULL 22/89] target/riscv: Remove check on RVH for riscv_cpu_virt_enabled

From: Weiwei Li Since env->virt.VIRT_ONOFF is initialized as false, and will not be set to true when RVH is disabled, so we can just return this bit(false) when RVH is not disabled. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson Reviewed-by: LIU Zhiwei

[PULL 20/89] target/riscv: Remove redundant call to riscv_cpu_virt_enabled

From: Weiwei Li The assignment is done under the condition riscv_cpu_virt_enabled()=true. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson Reviewed-by: LIU Zhiwei Reviewed-by: Alistair Francis Message-Id: <20230327080858.39703-2-liwei...@iscas.ac.cn>

[PULL 08/89] target/riscv: fix invalid riscv, event-to-mhpmcounters entry

From: Conor Dooley dt-validate complains: > soc: pmu: {'riscv,event-to-mhpmcounters': > [[1, 1, 524281], [2, 2, 524284], [65561, 65561, 524280], > [65563, 65563, 524280], [65569, 65569, 524280], [0, 0, 0], [0, 0]], > pmu: riscv,event-to-mhpmcounters:6: [0, 0] is too short There are bogus 0

[PULL 07/89] target/riscv: redirect XVentanaCondOps to use the Zicond functions

From: Philipp Tomsich The Zicond standard extension implements the same instruction semantics as XVentanaCondOps, although using different mnemonics and opcodes. Point XVentanaCondOps to the (newly implemented) Zicond implementation to reduce the future maintenance burden. Also updating

[PULL 02/89] target/riscv: Fix priv version dependency for vector and zfh

From: LIU Zhiwei Vector implicitly enables zve64d, zve64f, zve32f sub extensions. As vector only requires PRIV_1_10_0, these sub extensions should not require priv version higher than that. The same for Zfh. Signed-off-by: LIU Zhiwei Reviewed-by: Daniel Henrique Barboza Reviewed-by: Weiwei

[PULL 00/89] riscv-to-apply queue

The following changes since commit f6b761bdbd8ba63cee7428d52fb6b46e4224ddab: Merge tag 'qga-pull-2023-05-04' of https://github.com/kostyanf14/qemu into staging (2023-05-04 12:08:00 +0100) are available in the Git repository at: https://github.com/alistair23/qemu.git

[PULL 11/89] target/riscv: add support for Zcf extension

From: Weiwei Li Separate c_flw/c_fsw from flw/fsw to add check for Zcf extension. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Message-Id: <20230307081403.61950-4-liwei...@iscas.ac.cn> Signed-off-by: Alistair Francis ---

[PULL 04/89] target/riscv: Simplify type conversion for CPURISCVState

From: Weiwei Li Use CPURISCVState as argument directly in riscv_cpu_update_mip and riscv_timer_write_timecmp, since type converts from CPURISCVState to RISCVCPU in many caller of them and then back to CPURISCVState in them. Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Reviewed-by:

[PULL 12/16] migration: qemu_file_total_transferred() function is monotonic

So delta_bytes can only be greater or equal to zero. Never negative. Signed-off-by: Juan Quintela Reviewed-by: Daniel P. Berrangé Message-Id: <20230504113841.23130-3-quint...@redhat.com> --- migration/block.c | 8 +--- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git

[PULL 10/16] migration/rdma: Check for postcopy sooner

It makes no sense first try to see if there is an rdma error and then do nothing on postcopy stage. Change it so we check we are in postcopy before doing anything. Signed-off-by: Juan Quintela Reviewed-by: Daniel P. Berrangé Message-Id: <20230504114443.23891-6-quint...@redhat.com> ---

[PULL 15/16] qemu-file: Make total_transferred an uint64_t

Change all the functions that use it. It was already passed as uint64_t. Signed-off-by: Juan Quintela Reviewed-by: Daniel P. Berrangé Message-Id: <20230504113841.23130-8-quint...@redhat.com> --- migration/block.c | 5 ++--- migration/qemu-file.c | 8 migration/qemu-file.h | 4

[PULL 08/16] migration/rdma: We can calculate the rioc from the QEMUFile

Signed-off-by: Juan Quintela Reviewed-by: Daniel P. Berrangé Message-Id: <20230504114443.23891-4-quint...@redhat.com> --- migration/rdma.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/migration/rdma.c b/migration/rdma.c index 5b82085bd7..17c4b9206f 100644 ---

[PULL 16/16] qemu-file: Make ram_control_save_page() use accessors for rate_limit

Signed-off-by: Juan Quintela Reviewed-by: Daniel P. Berrangé Reviewed-by: Peter Xu Message-Id: <20230504113841.23130-9-quint...@redhat.com> --- migration/qemu-file.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/migration/qemu-file.c b/migration/qemu-file.c index

[PULL 14/16] qemu-file: remove shutdown member

The first thing that we do after setting the shutdown value is set the error as -EIO if there is not a previous error. So this value is redundant. Just remove it and use qemu_file_get_error() in the places that it was tested. Signed-off-by: Juan Quintela Reviewed-by: Daniel P. Berrangé

[PULL 13/16] qemu-file: No need to check for shutdown in qemu_file_rate_limit

After calling qemu_file_shutdown() we set the error as -EIO if there is no another previous error, so no need to check it here. Signed-off-by: Juan Quintela Reviewed-by: Peter Xu Reviewed-by: Daniel P. Berrangé Message-Id: <20230504113841.23130-6-quint...@redhat.com> --- migration/qemu-file.c

[PULL 00/16] Migration 20230505 patches

The following changes since commit f6b761bdbd8ba63cee7428d52fb6b46e4224ddab: Merge tag 'qga-pull-2023-05-04' of https://github.com/kostyanf14/qemu into staging (2023-05-04 12:08:00 +0100) are available in the Git repository at: https://gitlab.com/juan.quintela/qemu.git

[PULL 01/16] migration: Fix block_bitmap_mapping migration

It is valid that params->has_block_bitmap_mapping is true and params->block_bitmap_mapping is NULL. So we can't use the trick of having a single function. Move to two functions one for each value and the tests are fixed. Fixes: b804b35b1c8a0edfd127ac20819c234be55ac7fc migration: Create

[PULL 04/16] migration: Put zero_pages in alphabetical order

I forgot to move it when I rename it from duplicated_pages. Message-Id: <20230504103357.22130-3-quint...@redhat.com> Reviewed-by: David Edmondson Reviewed-by: Daniel P. Berrangé Signed-off-by: Juan Quintela --- migration/migration-stats.h | 8 1 file changed, 4 insertions(+), 4

[PULL 06/16] migration: Make RAM_SAVE_FLAG_HOOK a normal case entry

Fixes this commit, clearly a bad merge after a rebase or similar, it should have been its own case since that point. commit 5b0e9dd46fbda5152566a4a26fd96bc0d0452bf7 Author: Peter Lieven Date: Tue Jun 24 11:32:36 2014 +0200 migration: catch unknown flag combinations in ram_load

[PULL 02/16] migration/rdma: Don't pass the QIOChannelRDMA as an opaque

We can calculate it from the QEMUFile like the caller. Reviewed-by: Daniel P. Berrangé Message-Id: <20230503131847.11603-6-quint...@redhat.com> Signed-off-by: Juan Quintela --- migration/rdma.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/migration/rdma.c

[PULL 03/16] migration: Document all migration_stats

Message-Id: <20230504103357.22130-2-quint...@redhat.com> Reviewed-by: David Edmondson Reviewed-by: Daniel P. Berrangé Signed-off-by: Juan Quintela --- migration/migration-stats.h | 43 + 1 file changed, 43 insertions(+) diff --git

[PULL 11/16] migration: max_postcopy_bandwidth is a size parameter

So make everything that uses it uint64_t no int64_t. Signed-off-by: Juan Quintela Reviewed-by: Daniel P. Berrangé Message-Id: <20230504113841.23130-2-quint...@redhat.com> --- migration/migration.c | 4 ++-- migration/options.c | 2 +- migration/options.h | 2 +- 3 files changed, 4

[PULL 05/16] migration: Rename xbzrle_enabled xbzrle_started

Otherwise it is confusing with the function xbzrle_enabled(). Suggested-by: Daniel P. Berrangé Reviewed-by: Daniel P. Berrangé Reviewed-by: Peter Xu Signed-off-by: Juan Quintela Message-Id: <20230504115323.24407-1-quint...@redhat.com> --- migration/ram.c | 14 +++--- 1 file changed,

[PULL 07/16] migration/rdma: simplify ram_control_load_hook()

Signed-off-by: Juan Quintela Reviewed-by: Daniel P. Berrangé Message-Id: <20230504114443.23891-3-quint...@redhat.com> --- migration/qemu-file.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/migration/qemu-file.c b/migration/qemu-file.c index ee04240a21..b7afc8d498

[PULL 09/16] migration/rdma: It makes no sense to recive that flag without RDMA

This could only happen if the source sent RAM_SAVE_FLAG_HOOK (i.e. rdma) and destination don't have CONFIG_RDMA. Signed-off-by: Juan Quintela Reviewed-by: Daniel P. Berrangé Message-Id: <20230504114443.23891-5-quint...@redhat.com> --- migration/qemu-file.c | 8 1 file changed, 8

Re: [PATCH risu] use time() as random seed and introduce --randseed option

Agree on the usefulness of generating the same test. That is the reason behind adding --randseed option. Once a seed is set, it always generates the same sequence of instructions. Basically with this patch, - by default you will generate random instruction sequences for most testing

Re: [PATCH 3/9] qemu-file: make qemu_file_[sg]et_rate_limit() use an uint64_t

Juan Quintela wrote: > It is really size_t. Everything else uses uint64_t, so move this to > uint64_t as well. A size can't be negative anyways. > > Signed-off-by: Juan Quintela Self-nack. > -qemu_file_set_rate_limit(ms->to_dst_file, INT64_MAX); > +

Re: [PATCH 4/5] migration/rdma: It makes no sense to recive that flag without RDMA

Daniel P. Berrangé wrote: > In $SUBJECT s/recive/receive/ > > On Thu, May 04, 2023 at 01:44:42PM +0200, Juan Quintela wrote: >> This could only happen if the source send > > s/send/sent/ Fixed. >> RAM_SAVE_FLAG_HOOK (i.e. rdma) and destination don't have CONFIG_RDMA. >> >> Signed-off-by:

Re: [PATCH] migration: Rename xbzrle_enabled xbzrle_started

Peter Xu wrote: > On Thu, May 04, 2023 at 01:53:23PM +0200, Juan Quintela wrote: >> Otherwise it is confusing with the function xbzrle_enabled(). >> >> Suggested-by: Daniel P. Berrangé >> Signed-off-by: Juan Quintela >> --- >> migration/ram.c | 14 +++--- >> 1 file changed, 7

Re: [PATCH v4 10/10] migration: block incoming colo when capability is disabled

On Fri, 5 May 2023 01:30:34 +0300 Vladimir Sementsov-Ogievskiy wrote: > On 05.05.23 01:10, Lukas Straub wrote: > > On Fri, 28 Apr 2023 22:49:28 +0300 > > Vladimir Sementsov-Ogievskiy wrote: > > > >> We generally require same set of capabilities on source and target. > >> Let's require x-colo

Re: [PATCH v4 10/10] migration: block incoming colo when capability is disabled

On 05.05.23 01:10, Lukas Straub wrote: On Fri, 28 Apr 2023 22:49:28 +0300 Vladimir Sementsov-Ogievskiy wrote: We generally require same set of capabilities on source and target. Let's require x-colo capability to use COLO on target. Signed-off-by: Vladimir Sementsov-Ogievskiy Good patch,

Re: [PATCH v4 10/10] migration: block incoming colo when capability is disabled

On Fri, 28 Apr 2023 22:49:28 +0300 Vladimir Sementsov-Ogievskiy wrote: > We generally require same set of capabilities on source and target. > Let's require x-colo capability to use COLO on target. > > Signed-off-by: Vladimir Sementsov-Ogievskiy Good patch, this is needed anyway for COLO with

Re: [PATCH v5 00/21] block: remove aio_disable_external() API

Am 04.05.2023 um 21:53 hat Stefan Hajnoczi geschrieben: > v5: > - Use atomic accesses for in_flight counter in vhost-user-server.c [Kevin] > - Stash SCSIDevice id/lun values for VIRTIO_SCSI_T_TRANSPORT_RESET event > before unrealizing the SCSIDevice [Kevin] > - Keep vhost-user-blk export

Re: [PATCH v4 20/20] aio: remove aio_disable_external() API

Am 25.04.2023 um 19:27 hat Stefan Hajnoczi geschrieben: > All callers now pass is_external=false to aio_set_fd_handler() and > aio_set_event_notifier(). The aio_disable_external() API that > temporarily disables fd handlers that were registered is_external=true > is therefore dead code. > >

Re: [PATCH v4 18/20] virtio-scsi: implement BlockDevOps->drained_begin()

Am 25.04.2023 um 19:27 hat Stefan Hajnoczi geschrieben: > The virtio-scsi Host Bus Adapter provides access to devices on a SCSI > bus. Those SCSI devices typically have a BlockBackend. When the > BlockBackend enters a drained section, the SCSI device must temporarily > stop submitting new I/O

Re: [PATCH] hw/ppc/Kconfig: NVDIMM is a hard requirement for the pseries machine

On 5/4/23 15:05, Thomas Huth wrote: When building QEMU with "--without-default-devices", the pseries machine fails to start even when running with the --nodefaults option: $ ./qemu-system-ppc64 --nodefaults -M pseries Type 'spapr-nvdimm' is missing its parent 'nvdimm' Aborted (core

Re: [PATCH 0/4] vhost-user-fs: Internal migration

On Thu, 4 May 2023 at 13:39, Hanna Czenczek wrote: > > On 11.04.23 17:05, Hanna Czenczek wrote: > > [...] > > > Hanna Czenczek (4): > >vhost: Re-enable vrings after setting features > >vhost-user: Interface for migration state transfer > >vhost: Add high-level state save/load

Re: [PATCH v4 17/20] virtio-blk: implement BlockDevOps->drained_begin()

Am 25.04.2023 um 19:27 hat Stefan Hajnoczi geschrieben: > Detach ioeventfds during drained sections to stop I/O submission from > the guest. virtio-blk is no longer reliant on aio_disable_external() > after this patch. This will allow us to remove the > aio_disable_external() API once all other

[PATCH v2] Add information how to fix common build error on Windows in symlink-install-tree

By default, Windows doesn't allow to create soft links for user account and only administrator is allowed to do this. To fix this problem you have to raise your permissions or enable Developer Mode, which available since Windows 10. Additional explanation when build fails will allow developer

Re: [PATCH v4 16/20] virtio: make it possible to detach host notifier from any thread

Am 25.04.2023 um 19:27 hat Stefan Hajnoczi geschrieben: > virtio_queue_aio_detach_host_notifier() does two things: > 1. It removes the fd handler from the event loop. > 2. It processes the virtqueue one last time. > > The first step can be peformed by any thread and without taking the >

[PATCH v4 3/7] target/i386: Add a couple of feature bits in 8000_0008_EBX

Add the following feature bits. amd-psfd : Predictive Store Forwarding Disable: PSF is a hardware-based micro-architectural optimization designed to improve the performance of code execution by predicting address dependencies between loads and stores.

[PATCH v4 5/7] target/i386: Add missing feature bits in EPYC-Milan model

Add the following feature bits for EPYC-Milan model and bump the version. vaes: Vector VAES(ENC|DEC), VAES(ENC|DEC)LAST instruction support vpclmulqdq : Vector VPCLMULQDQ instruction support stibp-always-on : Single Thread Indirect Branch Prediction Mode has enhanced

[PATCH v4 4/7] target/i386: Add feature bits for CPUID_Fn80000021_EAX

Add the following feature bits. no-nested-data-bp : Processor ignores nested data breakpoints. lfence-always-serializing : LFENCE instruction is always serializing. null-sel-cls-base : Null Selector Clears Base. When this bit is set, a null segment load

[PATCH v4 6/7] target/i386: Add VNMI and automatic IBRS feature bits

Add the following featute bits. vnmi: Virtual NMI (VNMI) allows the hypervisor to inject the NMI into the guest without using Event Injection mechanism meaning not required to track the guest NMI and intercepting the IRET. The presence of this feature is indicated via the CPUID

[PATCH v4 7/7] target/i386: Add EPYC-Genoa model to support Zen 4 processor series

Adds the support for AMD EPYC Genoa generation processors. The model display for the new processor will be EPYC-Genoa. Adds the following new feature bits on top of the feature bits from the previous generation EPYC models. avx512f : AVX-512 Foundation instruction avx512dq:

[PATCH v4 0/7] Add EPYC-Genoa model and update previous EPYC Models

This series updates the AMD EPYC models and adds new EPYC-Genoa model. Here are the features. a. Allow versioned CPUs to specify new cache_info pointers. b. Add EPYC-v4, EPYC-Rome-v3 and EPYC-Milan-v2 fixing the cache_info.complex_indexing. c. Introduce EPYC-Milan-v2 by adding few missing

[PATCH v4 2/7] target/i386: Add new EPYC CPU versions with updated cache_info

From: Michael Roth Introduce new EPYC cpu versions: EPYC-v4 and EPYC-Rome-v3. The only difference vs. older models is an updated cache_info with the 'complex_indexing' bit unset, since this bit is not currently defined for AMD and may cause problems should it be used for something else in the

[PATCH v4 1/7] target/i386: allow versioned CPUs to specify new cache_info

From: Michael Roth New EPYC CPUs versions require small changes to their cache_info's. Because current QEMU x86 CPU definition does not support versioned cach_info, we would have to declare a new CPU type for each such case. To avoid the dup work, add "cache_info" in X86CPUVersionDefinition", to

[PATCH] vfio/pci: Static Resizable BAR capability

The PCI Resizable BAR (ReBAR) capability is currently hidden from the VM because the protocol for interacting with the capability does not support a mechanism for the device to reject an advertised supported BAR size. However, when assigned to a VM, the act of resizing the BAR requires adjustment

Re: [PATCH v3 1/7] target/i386: allow versioned CPUs to specify new cache_info

Hi Robert, On 4/25/23 10:22, Moger, Babu wrote: > Hi Robert, > > On 4/25/23 00:42, Robert Hoo wrote: >> Babu Moger 于2023年4月25日周二 00:42写道： >>> >>> From: Michael Roth >>> >>> New EPYC CPUs versions require small changes to their cache_info's. >> >> Do you mean, for the real HW of EPYC CPU, each

[PATCH v5 06/21] util/vhost-user-server: rename refcount to in_flight counter

The VuServer object has a refcount field and ref/unref APIs. The name is confusing because it's actually an in-flight request counter instead of a refcount. Normally a refcount destroys the object upon reaching zero. The VuServer counter is used to wake up the vhost-user coroutine when there are

[PATCH v5 03/21] hw/qdev: introduce qdev_is_realized() helper

Add a helper function to check whether the device is realized without requiring the Big QEMU Lock. The next patch adds a second caller. The goal is to avoid spreading DeviceState field accesses throughout the code. Suggested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé

[PATCH v5 04/21] virtio-scsi: avoid race between unplug and transport event

Only report a transport reset event to the guest after the SCSIDevice has been unrealized by qdev_simple_device_unplug_cb(). qdev_simple_device_unplug_cb() sets the SCSIDevice's qdev.realized field to false so that scsi_device_find/get() no longer see it. scsi_target_emulate_report_luns() also

[PATCH v5 21/21] aio: remove aio_disable_external() API

All callers now pass is_external=false to aio_set_fd_handler() and aio_set_event_notifier(). The aio_disable_external() API that temporarily disables fd handlers that were registered is_external=true is therefore dead code. Remove aio_disable_external(), aio_enable_external(), and the is_external

[PATCH v5 16/21] block/fuse: do not set is_external=true on FUSE fd

This is part of ongoing work to remove the aio_disable_external() API. Use BlockDevOps .drained_begin/end/poll() instead of aio_set_fd_handler(is_external=true). As a side-effect the FUSE export now follows AioContext changes like the other export types. Signed-off-by: Stefan Hajnoczi ---

[PATCH v5 20/21] virtio: do not set is_external=true on host notifiers

Host notifiers can now use is_external=false since virtio-blk and virtio-scsi no longer rely on is_external=true for drained sections. Signed-off-by: Stefan Hajnoczi --- hw/virtio/virtio.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/virtio/virtio.c

[PATCH v5 08/21] block/export: stop using is_external in vhost-user-blk server

vhost-user activity must be suspended during bdrv_drained_begin/end(). This prevents new requests from interfering with whatever is happening in the drained section. Previously this was done using aio_set_fd_handler()'s is_external argument. In a multi-queue block layer world the

[PATCH v5 17/21] virtio: make it possible to detach host notifier from any thread

virtio_queue_aio_detach_host_notifier() does two things: 1. It removes the fd handler from the event loop. 2. It processes the virtqueue one last time. The first step can be peformed by any thread and without taking the AioContext lock. The second step may need the AioContext lock (depending on

[PATCH v5 15/21] block/export: don't require AioContext lock around blk_exp_ref/unref()

The FUSE export calls blk_exp_ref/unref() without the AioContext lock. Instead of fixing the FUSE export, adjust blk_exp_ref/unref() so they work without the AioContext lock. This way it's less error-prone. Suggested-by: Paolo Bonzini Signed-off-by: Stefan Hajnoczi --- include/block/export.h

[PATCH v5 07/21] block/export: wait for vhost-user-blk requests when draining

Each vhost-user-blk request runs in a coroutine. When the BlockBackend enters a drained section we need to enter a quiescent state. Currently any in-flight requests race with bdrv_drained_begin() because it is unaware of vhost-user-blk requests. When blk_co_preadv/pwritev()/etc returns it wakes

[PATCH v5 10/21] block: add blk_in_drain() API

The BlockBackend quiesce_counter is greater than zero during drained sections. Add an API to check whether the BlockBackend is in a drained section. The next patch will use this API. Signed-off-by: Stefan Hajnoczi --- include/sysemu/block-backend-global-state.h | 1 + block/block-backend.c

[PATCH v5 19/21] virtio-scsi: implement BlockDevOps->drained_begin()

The virtio-scsi Host Bus Adapter provides access to devices on a SCSI bus. Those SCSI devices typically have a BlockBackend. When the BlockBackend enters a drained section, the SCSI device must temporarily stop submitting new I/O requests. Implement this behavior by temporarily stopping

[PATCH v5 14/21] block/export: rewrite vduse-blk drain code

vduse_blk_detach_ctx() waits for in-flight requests using AIO_WAIT_WHILE(). This is not allowed according to a comment in bdrv_set_aio_context_commit(): /* * Take the old AioContex when detaching it from bs. * At this point, new_context lock is already acquired, and we are now * also

[PATCH v5 11/21] block: drain from main loop thread in bdrv_co_yield_to_drain()

For simplicity, always run BlockDevOps .drained_begin/end/poll() callbacks in the main loop thread. This makes it easier to implement the callbacks and avoids extra locks. Move the function pointer declarations from the I/O Code section to the Global State section for BlockDevOps, BdrvChildClass,

[PATCH v5 02/21] block-backend: split blk_do_set_aio_context()

blk_set_aio_context() is not fully transactional because blk_do_set_aio_context() updates blk->ctx outside the transaction. Most of the time this goes unnoticed but a BlockDevOps.drained_end() callback that invokes blk_get_aio_context() fails assert(ctx == blk->ctx). This happens because blk->ctx

[PATCH v5 05/21] virtio-scsi: stop using aio_disable_external() during unplug

This patch is part of an effort to remove the aio_disable_external() API because it does not fit in a multi-queue block layer world where many AioContexts may be submitting requests to the same disk. The SCSI emulation code is already in good shape to stop using aio_disable_external(). It was

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