[PATCH] sbsa-ref: switch default cpu core to Neoverse-N1

The world outside moves to newer and newer cpu cores. Let move SBSA Reference Platform to something newer as well. Signed-off-by: Marcin Juszkiewicz --- hw/arm/sbsa-ref.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index

[PATCH 01/12] libvirt-ci: update submodule to cover pipewire

From: Marc-André Lureau List of upstream changes: Abdulwasiu Apalowo (6): commandline: add default tag information to image argument containers: add tag parameter to image_exists method lcitool: edit error message during container run (or shell) operation. containers:

[PATCH 12/12] audio/pw: improve channel position code

From: Marc-André Lureau Follow PulseAudio backend comment and code, and only implement the channels QEMU actually supports at this point, and add the same comment about limits and future mappings. Simplify a bit the code. Signed-off-by: Marc-André Lureau --- audio/pwaudio.c | 75

[PATCH 04/12] audio/pw: drop needless case statement

From: Marc-André Lureau Signed-off-by: Marc-André Lureau --- audio/pwaudio.c | 10 -- 1 file changed, 10 deletions(-) diff --git a/audio/pwaudio.c b/audio/pwaudio.c index 9eb69bfd18..51cfc0b052 100644 --- a/audio/pwaudio.c +++ b/audio/pwaudio.c @@ -197,16 +197,6 @@

[PATCH 11/12] audio/pw: remove wrong comment

From: Marc-André Lureau The stream is actually created connected. Signed-off-by: Marc-André Lureau --- audio/pwaudio.c | 1 - 1 file changed, 1 deletion(-) diff --git a/audio/pwaudio.c b/audio/pwaudio.c index 38905f5be2..f74d506ec6 100644 --- a/audio/pwaudio.c +++ b/audio/pwaudio.c @@ -537,7

[PATCH 08/12] audio/pw: factorize some common code

From: Marc-André Lureau Signed-off-by: Marc-André Lureau --- audio/pwaudio.c | 85 - 1 file changed, 34 insertions(+), 51 deletions(-) diff --git a/audio/pwaudio.c b/audio/pwaudio.c index d0bc4680a6..67df53948c 100644 --- a/audio/pwaudio.c +++

[PATCH 03/12] audio/pw: Pipewire->PipeWire case fix for user-visible text

From: Marc-André Lureau "PipeWire" is the correct case. Signed-off-by: Marc-André Lureau --- meson.build | 2 +- qapi/audio.json | 12 ++-- audio/pwaudio.c | 10 +- audio/trace-events| 2 +- meson_options.txt

[PATCH 10/12] audio/pw: simplify error reporting in stream creation

From: Marc-André Lureau create_stream() now reports on all error paths. Signed-off-by: Marc-André Lureau --- audio/pwaudio.c | 12 +--- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/audio/pwaudio.c b/audio/pwaudio.c index 5c706a9fde..38905f5be2 100644 ---

[PATCH 02/12] tests/lcitool: add pipewire

From: Marc-André Lureau Signed-off-by: Marc-André Lureau --- tests/docker/dockerfiles/alpine.docker| 1 + tests/docker/dockerfiles/centos8.docker | 1 + tests/docker/dockerfiles/debian-amd64-cross.docker| 1 + tests/docker/dockerfiles/debian-amd64.docker

[PATCH 09/12] audio/pw: add more error reporting

From: Marc-André Lureau Signed-off-by: Marc-André Lureau --- audio/pwaudio.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/audio/pwaudio.c b/audio/pwaudio.c index 67df53948c..5c706a9fde 100644 --- a/audio/pwaudio.c +++ b/audio/pwaudio.c @@ -429,6 +429,10 @@

[PATCH 00/12] audio: pipewire backend improvements

From: Marc-André Lureau Hi, Here are a few patches to cover PipeWire support in the CI and other misc code improvements. Note: depends on libvirt-ci!396 thanks Marc-André Lureau (12): libvirt-ci: update submodule to cover pipewire tests/lcitool: add pipewire audio/pw:

[PATCH 07/12] audio/pw: add more details on error

From: Marc-André Lureau PipeWire uses errno to report error details. Signed-off-by: Marc-André Lureau --- audio/pwaudio.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/audio/pwaudio.c b/audio/pwaudio.c index 2b12b40934..d0bc4680a6 100644 --- a/audio/pwaudio.c +++

[PATCH 05/12] audio/pw: needless check for NULL

From: Marc-André Lureau g_clear_pointer() already checks for NULL. Signed-off-by: Marc-André Lureau --- audio/pwaudio.c | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/audio/pwaudio.c b/audio/pwaudio.c index 51cfc0b052..6ca4ef4f62 100644 --- a/audio/pwaudio.c +++

[PATCH 06/12] audio/pw: trace during init before calling pipewire API

From: Marc-André Lureau Signed-off-by: Marc-André Lureau --- audio/pwaudio.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/audio/pwaudio.c b/audio/pwaudio.c index 6ca4ef4f62..2b12b40934 100644 --- a/audio/pwaudio.c +++ b/audio/pwaudio.c @@ -784,10 +784,11 @@ static

[PATCH RESEND] vhost: fix possible wrap in SVQ descriptor ring

QEMU invokes vhost_svq_add() when adding a guest's element into SVQ. In vhost_svq_add(), it uses vhost_svq_available_slots() to check whether QEMU can add the element into the SVQ. If there is enough space, then QEMU combines some out descriptors and some in descriptors into one descriptor chain,

[PATCH v2 1/2] vdpa: rename vhost_vdpa_net_cvq_add()

We want to introduce a new version of vhost_vdpa_net_cvq_add() that does not poll immediately after forwarding custom buffers to the device, so that QEMU can send all the SVQ control commands in parallel instead of serialized. Signed-off-by: Hawkins Jiawei --- net/vhost-vdpa.c | 15

[PATCH v2 0/2] Send all the SVQ control commands in parallel

This patchset allows QEMU to poll and check the device used buffer after sending all SVQ control commands, instead of polling and checking immediately after sending each SVQ control command, so that QEMU can send all the SVQ control commands in parallel, which have better performance improvement.

[PATCH v2 2/2] vdpa: send CVQ state load commands in parallel

This patch introduces the vhost_vdpa_net_cvq_add() and refactors the vhost_vdpa_net_load*(), so that QEMU can send CVQ state load commands in parallel. To be more specific, this patch introduces vhost_vdpa_net_cvq_add() to add SVQ control commands to SVQ and kick the device, but does not poll the

[PATCH] loongarch: mark loongarch_ipi_iocsr re-entrnacy safe

loongarch_ipi_iocsr MRs rely on re-entrant IO through the ipi_send function. As such, mark these MRs re-entrancy-safe. Fixes: a2e1753b80 ("memory: prevent dma-reentracy issues") Signed-off-by: Alexander Bulekov --- hw/intc/loongarch_ipi.c | 4 1 file changed, 4 insertions(+) diff --git

Re: [PATCH v10 1/8] memory: prevent dma-reentracy issues

 Hi Alexander 在 2023/4/28 下午5:14, Thomas Huth 写道: On 28/04/2023 11.11, Alexander Bulekov wrote: On 230428 1015, Thomas Huth wrote: On 28/04/2023 10.12, Daniel P. Berrangé wrote: On Thu, Apr 27, 2023 at 05:10:06PM -0400, Alexander Bulekov wrote: Add a flag to the DeviceState, when a device is

Re: [PULL v2 00/45] loongarch-to-apply queue

/gaosong/qemu.git tags/pull-loongarch-20230506 for you to fetch changes up to 725d7e763a802321e1bb303348afc551d564d31e: hw/intc: don't use target_ulong for LoongArch ipi (2023-05-06 11:19:50 +0800) Add LoongArch LSX instructions. v2

Re: [PATCH v3 04/10] scripts/qapi: document the tool that generated the file

Alex Bennée writes: > This makes it a little easier for developers to find where things > where being generated. > > Reviewed-by: Richard Henderson > Signed-off-by: Alex Bennée > Message-Id: <20230503091756.1453057-5-alex.ben...@linaro.org> > --- > scripts/qapi/gen.py | 4 ++-- > 1 file

[PATCH v5 08/30] tcg/riscv: Introduce prepare_host_addr

Merge tcg_out_tlb_load, add_qemu_ldst_label, tcg_out_test_alignment, and some code that lived in both tcg_out_qemu_ld and tcg_out_qemu_st into one function that returns TCGReg and TCGLabelQemuLdst. Signed-off-by: Richard Henderson --- tcg/riscv/tcg-target.c.inc | 253

Re: [PATCH v2] target/ppc: Fix fallback to MFSS for MFFS* instructions on pre 3.0 ISAs

On 5/6/23 07:52, Richard Purdie wrote: The following commits changed the code such that the fallback to MFSS for MFFSCRN, MFFSCRNI, MFFSCE and MFFSL on pre 3.0 ISAs was removed and became an illegal instruction: bf8adfd88b547680aa857c46098f3a1e94373160 - target/ppc: Move mffscrn[i] to

[PATCH v5 25/30] tcg/ppc: Adjust constraints on qemu_ld/st

The softmmu tlb uses TCG_REG_{TMP1,TMP2,R0}, not any of the normally available registers. Now that we handle overlap betwen inputs and helper arguments, we can allow any allocatable reg. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target-con-set.h |

[PATCH v5 27/30] tcg/ppc: Remove unused constraint J

Never used since its introduction. Fixes: 3d582c6179c ("tcg-ppc64: Rearrange integer constant constraints") Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target-con-str.h | 1 - tcg/ppc/tcg-target.c.inc | 3 --- 2 files changed, 4 deletions(-) diff --git a/tcg/ppc/tcg-target-con-str.h

[PATCH v5 06/30] tcg/mips: Introduce prepare_host_addr

Merge tcg_out_tlb_load, add_qemu_ldst_label, tcg_out_test_alignment, and some code that lived in both tcg_out_qemu_ld and tcg_out_qemu_st into one function that returns HostAddress and TCGLabelQemuLdst structures. Signed-off-by: Richard Henderson --- tcg/mips/tcg-target.c.inc | 404

[PATCH v2] MAINTAINERS: Update Akihiko Odaki's email address

From: Akihiko Odaki I am now employed by Daynix. Although my role as a reviewer of macOS-related change is not very relevant to the employment, I decided to use the company email address to avoid confusions from different addresses. Signed-off-by: Akihiko Odaki Reviewed-by: Marc-André Lureau

[PATCH v5 29/30] tcg/s390x: Use ALGFR in constructing softmmu host address

Rather than zero-extend the guest address into a register, use an add instruction which zero-extends the second input. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc

[PATCH v5 11/30] tcg/i386: Convert tcg_out_qemu_ld_slow_path

Use tcg_out_ld_helper_args and tcg_out_ld_helper_ret. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 71 +++ 1 file changed, 28 insertions(+), 43 deletions(-) diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc index

[PATCH v5 28/30] tcg/riscv: Simplify constraints on qemu_ld/st

The softmmu tlb uses TCG_REG_TMP[0-2], not any of the normally available registers. Now that we handle overlap betwen inputs and helper arguments, we can allow any allocatable reg. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- tcg/riscv/tcg-target-con-set.h | 2 --

[PATCH v5 30/30] tcg/s390x: Simplify constraints on qemu_ld/st

Adjust the softmmu tlb to use R0+R1, not any of the normally available registers. Since we handle overlap betwen inputs and helper arguments, we can allow any allocatable reg. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target-con-set.h | 2 -- tcg/s390x/tcg-target-con-str.h | 1 -

[PATCH v5 04/30] tcg/arm: Introduce prepare_host_addr

Merge tcg_out_tlb_load, add_qemu_ldst_label, and some code that lived in both tcg_out_qemu_ld and tcg_out_qemu_st into one function that returns HostAddress and TCGLabelQemuLdst structures. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.c.inc | 351

[PATCH v5 13/30] tcg/aarch64: Convert tcg_out_qemu_{ld,st}_slow_path

Use tcg_out_ld_helper_args, tcg_out_ld_helper_ret, and tcg_out_st_helper_args. Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c.inc | 40 +++- 1 file changed, 16 insertions(+), 24 deletions(-) diff --git a/tcg/aarch64/tcg-target.c.inc

[PATCH v5 12/30] tcg/i386: Convert tcg_out_qemu_st_slow_path

Use tcg_out_st_helper_args. This eliminates the use of a tail call to the store helper. This may or may not be an improvement, depending on the call/return branch prediction of the host microarchitecture. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 57

[PATCH v5 17/30] tcg/ppc: Convert tcg_out_qemu_{ld,st}_slow_path

Use tcg_out_ld_helper_args, tcg_out_ld_helper_ret, and tcg_out_st_helper_args. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 88 1 file changed, 26 insertions(+), 62 deletions(-) diff --git

[PATCH v5 16/30] tcg/mips: Convert tcg_out_qemu_{ld,st}_slow_path

Use tcg_out_ld_helper_args, tcg_out_ld_helper_ret, and tcg_out_st_helper_args. This allows our local tcg_out_arg_* infrastructure to be removed. We are no longer filling the call or return branch delay slots, nor are we tail-calling for the store, but this seems a small price to pay.

[PATCH v5 10/30] tcg: Add routines for calling slow-path helpers

Add tcg_out_ld_helper_args, tcg_out_ld_helper_ret, and tcg_out_st_helper_args. These and their subroutines use the existing knowledge of the host function call abi to load the function call arguments and return results. These will be used to simplify the backends in turn. Signed-off-by: Richard

[PATCH v5 21/30] tcg/mips: Remove MO_BSWAP handling

While performing the load in the delay slot of the call to the common bswap helper function is cute, it is not worth the added complexity. Signed-off-by: Richard Henderson --- tcg/mips/tcg-target.h | 4 +- tcg/mips/tcg-target.c.inc | 284 ++ 2 files

[PATCH v5 26/30] tcg/ppc: Remove unused constraints A, B, C, D

These constraints have not been used for quite some time. Fixes: 77b73de67632 ("Use rem/div[u]_i32 drop div[u]2_i32") Reviewed-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target-con-str.h | 4 1 file changed, 4

[PATCH v5 09/30] tcg/s390x: Introduce prepare_host_addr

Merge tcg_out_tlb_load, add_qemu_ldst_label, tcg_out_test_alignment, tcg_prepare_user_ldst, and some code that lived in both tcg_out_qemu_ld and tcg_out_qemu_st into one function that returns HostAddress and TCGLabelQemuLdst structures. Signed-off-by: Richard Henderson ---

[PATCH v5 15/30] tcg/loongarch64: Convert tcg_out_qemu_{ld, st}_slow_path

Use tcg_out_ld_helper_args, tcg_out_ld_helper_ret, and tcg_out_st_helper_args. Signed-off-by: Richard Henderson --- tcg/loongarch64/tcg-target.c.inc | 37 ++-- 1 file changed, 11 insertions(+), 26 deletions(-) diff --git a/tcg/loongarch64/tcg-target.c.inc

[PATCH v5 20/30] tcg/loongarch64: Simplify constraints on qemu_ld/st

The softmmu tlb uses TCG_REG_TMP[0-2], not any of the normally available registers. Now that we handle overlap betwen inputs and helper arguments, we can allow any allocatable reg. Signed-off-by: Richard Henderson --- tcg/loongarch64/tcg-target-con-set.h | 2 --

[PATCH v5 24/30] tcg/ppc: Reorg tcg_out_tlb_read

Allocate TCG_REG_TMP2. Use R0, TMP1, TMP2 instead of any of the normally allocated registers for the tlb load. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 84 1 file changed, 51 insertions(+), 33

[PATCH v5 00/30] tcg: Simplify calls to load/store helpers

There are several changes to the load/store helpers coming, and making sure that those changes are properly reflected across all of the backends was harrowing. I have gone back and restarted by hoisting the code out of the backends and into tcg.c. We already have all of the parameters for the

[PATCH v5 03/30] tcg/aarch64: Introduce prepare_host_addr

Merge tcg_out_tlb_load, add_qemu_ldst_label, tcg_out_test_alignment, and some code that lived in both tcg_out_qemu_ld and tcg_out_qemu_st into one function that returns HostAddress and TCGLabelQemuLdst structures. Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.c.inc | 313

[PATCH v5 22/30] tcg/mips: Reorg tlb load within prepare_host_addr

Compare the address vs the tlb entry with sign-extended values. This simplifies the page+alignment mask constant, and the generation of the last byte address for the misaligned test. Move the tlb addend load up, and the zero-extension down. This frees up a register, which allows us use TMP3 as

[PATCH v5 02/30] tcg/i386: Use indexed addressing for softmmu fast path

Since tcg_out_{ld,st}_helper_args, the slow path no longer requires the address argument to be set up by the tlb load sequence. Use a plain load for the addend and indexed addressing with the original input address register. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 25

[PATCH v5 07/30] tcg/ppc: Introduce prepare_host_addr

Merge tcg_out_tlb_load, add_qemu_ldst_label, tcg_out_test_alignment, and some code that lived in both tcg_out_qemu_ld and tcg_out_qemu_st into one function that returns HostAddress and TCGLabelQemuLdst structures. Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c.inc | 377

[PATCH v5 01/30] tcg/i386: Introduce prepare_host_addr

Merge tcg_out_tlb_load, add_qemu_ldst_label, tcg_out_test_alignment, and some code that lived in both tcg_out_qemu_ld and tcg_out_qemu_st into one function that returns HostAddress and TCGLabelQemuLdst structures. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c.inc | 344

[PATCH v5 14/30] tcg/arm: Convert tcg_out_qemu_{ld,st}_slow_path

Use tcg_out_ld_helper_args, tcg_out_ld_helper_ret, and tcg_out_st_helper_args. This allows our local tcg_out_arg_* infrastructure to be removed. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.c.inc | 140 +-- 1 file changed, 18 insertions(+), 122

[PATCH v5 19/30] tcg/s390x: Convert tcg_out_qemu_{ld,st}_slow_path

Use tcg_out_ld_helper_args, tcg_out_ld_helper_ret, and tcg_out_st_helper_args. Signed-off-by: Richard Henderson --- tcg/s390x/tcg-target.c.inc | 35 ++- 1 file changed, 10 insertions(+), 25 deletions(-) diff --git a/tcg/s390x/tcg-target.c.inc

[PATCH v5 23/30] tcg/mips: Simplify constraints on qemu_ld/st

The softmmu tlb uses TCG_REG_TMP[0-3], not any of the normally available registers. Now that we handle overlap betwen inputs and helper arguments, and have eliminated use of A0, we can allow any allocatable reg. Signed-off-by: Richard Henderson --- tcg/mips/tcg-target-con-set.h | 13

[PATCH v5 05/30] tcg/loongarch64: Introduce prepare_host_addr

Merge tcg_out_tlb_load, add_qemu_ldst_label, tcg_out_test_alignment, tcg_out_zext_addr_if_32_bit, and some code that lived in both tcg_out_qemu_ld and tcg_out_qemu_st into one function that returns HostAddress and TCGLabelQemuLdst structures. Signed-off-by: Richard Henderson ---

[PATCH v5 18/30] tcg/riscv: Convert tcg_out_qemu_{ld,st}_slow_path

Use tcg_out_ld_helper_args, tcg_out_ld_helper_ret, and tcg_out_st_helper_args. Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- tcg/riscv/tcg-target.c.inc | 37 ++--- 1 file changed, 10 insertions(+), 27 deletions(-) diff --git

Re: [PATCH v3 05/10] qapi: make the vcpu parameters deprecated for 8.1

Alex Bennée writes: > I don't think I can remove the parameters directly but certainly mark > them as deprecated. > > Message-Id: <20230420150009.1675181-6-alex.ben...@linaro.org> > Reviewed-by: Stefan Hajnoczi > Reviewed-by: Richard Henderson > Signed-off-by: Alex Bennée > Message-Id:

[PATCH] docs/devel: remind developers to run CI container pipeline when updating images

When new dependencies and packages are added to containers, its important to run CI container generation pipelines on gitlab to make sure that there are no obvious conflicts between packages that are being added and those that are already present. Running CI container pipelines will make sure that

Re: [PULL 00/42] tcg patch queue

On 5/5/23 22:24, Richard Henderson wrote: The following changes since commit a9fe9e191b4305b88c356a1ed9ac3baf89eb18aa: Merge tag 'pull-riscv-to-apply-20230505-1' ofhttps://github.com/alistair23/qemu into staging (2023-05-05 09:25:13 +0100) are available in the Git repository at:

Re: [PULL 0/6] ppc queue

On 5/5/23 17:34, Daniel Henrique Barboza wrote: The following changes since commit a9fe9e191b4305b88c356a1ed9ac3baf89eb18aa: Merge tag 'pull-riscv-to-apply-20230505-1' ofhttps://github.com/alistair23/qemu into staging (2023-05-05 09:25:13 +0100) are available in the Git repository at:

[PATCH v2] target/ppc: Fix fallback to MFSS for MFFS* instructions on pre 3.0 ISAs

The following commits changed the code such that the fallback to MFSS for MFFSCRN, MFFSCRNI, MFFSCE and MFFSL on pre 3.0 ISAs was removed and became an illegal instruction: bf8adfd88b547680aa857c46098f3a1e94373160 - target/ppc: Move mffscrn[i] to decodetree

[PULL v2 20/45] target/loongarch: Implement vmskltz/vmskgez/vmsknz

This patch includes: - VMSKLTZ.{B/H/W/D}; - VMSKGEZ.B; - VMSKNZ.B. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-21-gaos...@loongson.cn> --- target/loongarch/disas.c| 7 ++ target/loongarch/helper.h | 7 ++

[PULL v2 43/45] target/loongarch: Use {set/get}_gpr replace to cpu_fpr

Introduce set_fpr() and get_fpr() and remove cpu_fpr. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-44-gaos...@loongson.cn> --- .../loongarch/insn_trans/trans_farith.c.inc | 72 +++ target/loongarch/insn_trans/trans_fcmp.c.inc |

[PULL v2 08/45] target/loongarch: Implement vhaddw/vhsubw

This patch includes: - VHADDW.{H.B/W.H/D.W/Q.D/HU.BU/WU.HU/DU.WU/QU.DU}; - VHSUBW.{H.B/W.H/D.W/Q.D/HU.BU/WU.HU/DU.WU/QU.DU}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-9-gaos...@loongson.cn> --- target/loongarch/disas.c| 17

[PULL v2 09/45] target/loongarch: Implement vaddw/vsubw

This patch includes: - VADDW{EV/OD}.{H.B/W.H/D.W/Q.D}[U]; - VSUBW{EV/OD}.{H.B/W.H/D.W/Q.D}[U]; - VADDW{EV/OD}.{H.BU.B/W.HU.H/D.WU.W/Q.DU.D}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-10-gaos...@loongson.cn> --- target/loongarch/disas.c

[PULL v2 21/45] target/loongarch: Implement LSX logic instructions

This patch includes: - V{AND/OR/XOR/NOR/ANDN/ORN}.V; - V{AND/OR/XOR/NOR}I.B. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-22-gaos...@loongson.cn> --- target/loongarch/disas.c| 12 + target/loongarch/helper.h

[PULL v2 14/45] target/loongarch: Implement vmul/vmuh/vmulw{ev/od}

This patch includes: - VMUL.{B/H/W/D}; - VMUH.{B/H/W/D}[U]; - VMULW{EV/OD}.{H.B/W.H/D.W/Q.D}[U]; - VMULW{EV/OD}.{H.BU.B/W.HU.H/D.WU.W/Q.DU.D}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-15-gaos...@loongson.cn> --- target/loongarch/disas.c

[PULL v2 36/45] target/loongarch: Implement vfcmp

This patch includes: - VFCMP.cond.{S/D}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-37-gaos...@loongson.cn> --- target/loongarch/disas.c| 94 + target/loongarch/helper.h | 5 ++

[PULL v2 10/45] target/loongarch: Implement vavg/vavgr

This patch includes: - VAVG.{B/H/W/D}[U]; - VAVGR.{B/H/W/D}[U]. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-11-gaos...@loongson.cn> --- target/loongarch/disas.c| 17 ++ target/loongarch/helper.h | 18 ++

[PULL v2 34/45] target/loongarch: Implement LSX fpu fcvt instructions

This patch includes: - VFCVT{L/H}.{S.H/D.S}; - VFCVT.{H.S/S.D}; - VFRINT[{RNE/RZ/RP/RM}].{S/D}; - VFTINT[{RNE/RZ/RP/RM}].{W.S/L.D}; - VFTINT[RZ].{WU.S/LU.D}; - VFTINT[{RNE/RZ/RP/RM}].W.D; - VFTINT[{RNE/RZ/RP/RM}]{L/H}.L.S; - VFFINT.{S.W/D.L}[U]; - VFFINT.S.L, VFFINT{L/H}.D.W. Reviewed-by: Richard

[PULL v2 25/45] target/loongarch: Implement vsrln vsran

This patch includes: - VSRLN.{B.H/H.W/W.D}; - VSRAN.{B.H/H.W/W.D}; - VSRLNI.{B.H/H.W/W.D/D.Q}; - VSRANI.{B.H/H.W/W.D/D.Q}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-26-gaos...@loongson.cn> --- target/loongarch/disas.c| 16

[PULL v2 31/45] target/loongarch: Implement vbitclr vbitset vbitrev

This patch includes: - VBITCLR[I].{B/H/W/D}; - VBITSET[I].{B/H/W/D}; - VBITREV[I].{B/H/W/D}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-32-gaos...@loongson.cn> --- target/loongarch/disas.c| 25 ++ target/loongarch/helper.h

[PULL v2 44/45] target/loongarch: CPUCFG support LSX

Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-45-gaos...@loongson.cn> --- target/loongarch/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 55d7f9255e..c0afc21b2f 100644 ---

[PULL v2 41/45] target/loongarch: Implement vld vst

This patch includes: - VLD[X], VST[X]; - VLDREPL.{B/H/W/D}; - VSTELM.{B/H/W/D}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-42-gaos...@loongson.cn> --- target/loongarch/disas.c| 34 +

[PULL v2 22/45] target/loongarch: Implement vsll vsrl vsra vrotr

This patch includes: - VSLL[I].{B/H/W/D}; - VSRL[I].{B/H/W/D}; - VSRA[I].{B/H/W/D}; - VROTR[I].{B/H/W/D}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-23-gaos...@loongson.cn> --- target/loongarch/disas.c| 36

[PULL v2 38/45] target/loongarch: Implement vinsgr2vr vpickve2gr vreplgr2vr

This patch includes: - VINSGR2VR.{B/H/W/D}; - VPICKVE2GR.{B/H/W/D}[U]; - VREPLGR2VR.{B/H/W/D}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-39-gaos...@loongson.cn> --- target/loongarch/disas.c| 33 ++

[PULL v2 03/45] target/loongarch: Add CHECK_SXE maccro for check LSX enable

Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-4-gaos...@loongson.cn> --- target/loongarch/cpu.c | 2 ++ target/loongarch/cpu.h | 2 ++ target/loongarch/insn_trans/trans_lsx.c.inc | 11 +++ 3 files

[PULL v2 18/45] target/loongarch: Implement vexth

This patch includes: - VEXTH.{H.B/W.H/D.W/Q.D}; - VEXTH.{HU.BU/WU.HU/DU.WU/QU.DU}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-19-gaos...@loongson.cn> --- target/loongarch/disas.c| 9 ++ target/loongarch/helper.h

[PULL v2 29/45] target/loongarch: Implement vclo vclz

This patch includes: - VCLO.{B/H/W/D}; - VCLZ.{B/H/W/D}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-30-gaos...@loongson.cn> --- target/loongarch/disas.c| 9 ++ target/loongarch/helper.h | 9 ++

[PULL v2 45/45] hw/intc: don't use target_ulong for LoongArch ipi

From: Alex Bennée The calling function is already working with hwaddr and uint64_t so lets avoid bringing target_ulong in if we don't need to. Signed-off-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Song Gao Message-Id: <20230404132711.2563638-1-alex.ben...@linaro.org>

[PULL v2 40/45] target/loongarch: Implement vilvl vilvh vextrins vshuf

This patch includes: - VILV{L/H}.{B/H/W/D}; - VSHUF.{B/H/W/D}; - VSHUF4I.{B/H/W/D}; - VPERMI.W; - VEXTRINS.{B/H/W/D}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-41-gaos...@loongson.cn> --- target/loongarch/disas.c| 25

[PULL v2 37/45] target/loongarch: Implement vbitsel vset

This patch includes: - VBITSEL.V; - VBITSELI.B; - VSET{EQZ/NEZ}.V; - VSETANYEQZ.{B/H/W/D}; - VSETALLNEZ.{B/H/W/D}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-38-gaos...@loongson.cn> --- target/loongarch/disas.c| 20 ++

[PULL v2 27/45] target/loongarch: Implement vssrln vssran

This patch includes: - VSSRLN.{B.H/H.W/W.D}; - VSSRAN.{B.H/H.W/W.D}; - VSSRLN.{BU.H/HU.W/WU.D}; - VSSRAN.{BU.H/HU.W/WU.D}; - VSSRLNI.{B.H/H.W/W.D/D.Q}; - VSSRANI.{B.H/H.W/W.D/D.Q}; - VSSRLNI.{BU.H/HU.W/WU.D/DU.Q}; - VSSRANI.{BU.H/HU.W/WU.D/DU.Q}. Reviewed-by: Richard Henderson Signed-off-by:

[PULL v2 13/45] target/loongarch: Implement vmax/vmin

This patch includes: - VMAX[I].{B/H/W/D}[U]; - VMIN[I].{B/H/W/D}[U]. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-14-gaos...@loongson.cn> --- target/loongarch/disas.c| 33 target/loongarch/helper.h | 18

[PULL v2 07/45] target/loongarch: Implement vsadd/vssub

This patch includes: - VSADD.{B/H/W/D}[U]; - VSSUB.{B/H/W/D}[U]. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-8-gaos...@loongson.cn> --- target/loongarch/disas.c| 17 + target/loongarch/insn_trans/trans_lsx.c.inc

[PULL v2 15/45] target/loongarch: Implement vmadd/vmsub/vmaddw{ev/od}

This patch includes: - VMADD.{B/H/W/D}; - VMSUB.{B/H/W/D}; - VMADDW{EV/OD}.{H.B/W.H/D.W/Q.D}[U]; - VMADDW{EV/OD}.{H.BU.B/W.HU.H/D.WU.W/Q.DU.D}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-16-gaos...@loongson.cn> --- target/loongarch/disas.c

[PULL v2 02/45] target/loongarch: meson.build support build LSX

Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-3-gaos...@loongson.cn> --- target/loongarch/insn_trans/trans_lsx.c.inc | 5 + target/loongarch/lsx_helper.c | 6 ++ target/loongarch/meson.build| 1 +

[PULL v2 23/45] target/loongarch: Implement vsllwil vextl

This patch includes: - VSLLWIL.{H.B/W.H/D.W}; - VSLLWIL.{HU.BU/WU.HU/DU.WU}; - VEXTL.Q.D, VEXTL.QU.DU. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-24-gaos...@loongson.cn> --- target/loongarch/disas.c| 9 +

[PULL v2 39/45] target/loongarch: Implement vreplve vpack vpick

This patch includes: - VREPLVE[I].{B/H/W/D}; - VBSLL.V, VBSRL.V; - VPACK{EV/OD}.{B/H/W/D}; - VPICK{EV/OD}.{B/H/W/D}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-40-gaos...@loongson.cn> --- target/loongarch/disas.c| 35 +

[PULL v2 11/45] target/loongarch: Implement vabsd

This patch includes: - VABSD.{B/H/W/D}[U]. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-12-gaos...@loongson.cn> --- target/loongarch/disas.c| 9 ++ target/loongarch/helper.h | 9 ++

[PULL v2 30/45] target/loongarch: Implement vpcnt

This patch includes: - VPCNT.{B/H/W/D}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-31-gaos...@loongson.cn> --- target/loongarch/disas.c| 5 + target/loongarch/helper.h | 5 +

[PULL v2 33/45] target/loongarch: Implement LSX fpu arith instructions

This patch includes: - VF{ADD/SUB/MUL/DIV}.{S/D}; - VF{MADD/MSUB/NMADD/NMSUB}.{S/D}; - VF{MAX/MIN}.{S/D}; - VF{MAXA/MINA}.{S/D}; - VFLOGB.{S/D}; - VFCLASS.{S/D}; - VF{SQRT/RECIP/RSQRT}.{S/D}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id:

[PULL v2 01/45] target/loongarch: Add LSX data type VReg

Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-2-gaos...@loongson.cn> --- linux-user/loongarch64/signal.c | 4 +- target/loongarch/cpu.c | 2 +- target/loongarch/cpu.h | 21 - target/loongarch/gdbstub.c | 4 +-

[PULL v2 17/45] target/loongarch: Implement vsat

This patch includes: - VSAT.{B/H/W/D}[U]. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-18-gaos...@loongson.cn> --- target/loongarch/disas.c| 9 ++ target/loongarch/helper.h | 9 ++

[PULL v2 19/45] target/loongarch: Implement vsigncov

This patch includes: - VSIGNCOV.{B/H/W/D}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-20-gaos...@loongson.cn> --- target/loongarch/disas.c| 5 ++ target/loongarch/helper.h | 5 ++

[PULL v2 16/45] target/loongarch: Implement vdiv/vmod

This patch includes: - VDIV.{B/H/W/D}[U]; - VMOD.{B/H/W/D}[U]. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-17-gaos...@loongson.cn> --- target/loongarch/disas.c| 17 ++ target/loongarch/helper.h | 17

[PULL v2 42/45] target/loongarch: Implement vldi

This patch includes: - VLDI. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-43-gaos...@loongson.cn> --- target/loongarch/disas.c| 7 + target/loongarch/insn_trans/trans_lsx.c.inc | 137

[PULL v2 24/45] target/loongarch: Implement vsrlr vsrar

This patch includes: - VSRLR[I].{B/H/W/D}; - VSRAR[I].{B/H/W/D}. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-25-gaos...@loongson.cn> --- target/loongarch/disas.c| 18 target/loongarch/helper.h | 18

[PULL v2 32/45] target/loongarch: Implement vfrstp

This patch includes: - VFRSTP[I].{B/H}. Acked-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-33-gaos...@loongson.cn> --- target/loongarch/disas.c| 5 +++ target/loongarch/helper.h | 5 +++

[PULL v2 05/45] target/loongarch: Implement vaddi/vsubi

This patch includes: - VADDI.{B/H/W/D}U; - VSUBI.{B/H/W/D}U. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-6-gaos...@loongson.cn> --- target/loongarch/disas.c| 14 target/loongarch/insn_trans/trans_lsx.c.inc | 37

[PULL v2 35/45] target/loongarch: Implement vseq vsle vslt

This patch includes: - VSEQ[I].{B/H/W/D}; - VSLE[I].{B/H/W/D}[U]; - VSLT[I].{B/H/W/D/}[U]. Reviewed-by: Richard Henderson Signed-off-by: Song Gao Message-Id: <20230504122810.4094787-36-gaos...@loongson.cn> --- target/loongarch/disas.c| 43 + target/loongarch/helper.h

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