Philippe Mathieu-Daudé writes:
> Ping?
>
> On 5/7/23 13:44, Philippe Mathieu-Daudé wrote:
>> Hi Alex,
>> On 17/11/22 18:25, Alex Bennée wrote:
>>> The bullet points are quite long and contain process tips. Move those
>>> bits of the bullet to the relevant sections and link to them. Use a
>>>
15.08.2023 19:22, Eric Blake wrote:
On Sat, Aug 12, 2023 at 03:47:55PM +0300, Michael Tokarev wrote:
Signed-off-by: Michael Tokarev
---
include/sysemu/os-posix.h | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
Reviewed-by: Eric Blake
Eric, thank you very much for the review!
On Mon, Jul 10, 2023 at 6:44 PM Alex Bennée wrote:
> Instead of requiring all the information up front allow the
> vhost_dev_init to complete and then see what information we have from
> the backend.
>
> This does change the order around somewhat.
>
> Signed-off-by: Alex Bennée
> ---
>
25.08.2023 06:36, Zhao Liu wrote:
From: Zhao Liu
Hi all,
This patchset is the follow up tests of previous topology fixes in
smbios [1].
In this patchset, add these test cases:
1. Add the case to test 2 newly added topology helpers (patch 1):
* machine_topo_get_cores_per_socket()
*
Switch to the latest v8.06 release which introduces interesting
changes for the AST2600 I2C and I3C models. Also take the AST2600 A2
images instead of the default since QEMU tries to model The AST2600 A3
SoC.
Signed-off-by: Cédric Le Goater
Reviewed-by: Joel Stanley
Signed-off-by: Cédric Le
From: Philippe Mathieu-Daudé
Add 2 command handler arrays in SDProto, for CMD and ACMD.
Have sd_normal_command() / sd_app_command() use these arrays:
if an command handler is registered, call it, otherwise fall
back to current code base.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Bin
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
[ clg: Update cmd_abbrev ]
Message-Id: <20210624142209.1193073-9-f4...@amsat.org>
Signed-off-by: Cédric Le Goater
---
hw/sd/sd.c | 18 +-
hw/sd/sdmmc-internal.c | 2 +-
2 files changed, 10
From: Joel Stanley
Signed-off-by: Joel Stanley
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Cédric Le Goater
---
hw/sd/sd.c | 28 +---
1 file changed, 17 insertions(+), 11 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index b46072424108..00a59450b726 100644
Boards will use this new property to identify the device CS line and
wire the SPI controllers accordingly.
Cc: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Joel Stanley
Signed-off-by: Cédric Le Goater
---
include/hw/ssi/ssi.h | 3 +++
hw/ssi/ssi.c | 7 +++
2
and replace the SDState::spi attribute with a test checking the
SDProto array of commands.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Cédric Le Goater
---
include/hw/sd/sd.h | 3 +++
hw/arm/stellaris.c | 3 +--
hw/riscv/sifive_u.c | 3 +--
hw/sd/sd.c | 54
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
[ clg: Fix redundant assignment of .cmd ]
Message-Id: <20210624142209.1193073-7-f4...@amsat.org>
Signed-off-by: Cédric Le Goater
---
hw/sd/sd.c | 21 -
1 file changed, 12 insertions(+), 9 deletions(-)
diff
Currently, a set of default flash devices is created at machine init
and drives defined on the QEMU command line are associated to the FMC
and SPI controllers in sequence :
-drive file,format=raw,if=mtd
-drive file,format=raw,if=mtd
The CS lines are wired in the same creation loop. This
From: Hang Yu
Fixed inconsistency between the regisiter bit field definition header file
and the ast2600 datasheet. The reg name is I2CD1C:Pool Buffer Control
Register in old register mode and I2CC0C: Master/Slave Pool Buffer Control
Register in new register mode. They share bit field
From: Philippe Mathieu-Daudé
Introduce a new structure to hold the bus protocol specific
fields: SDProto. The first field is the protocol name.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Bin Meng
Message-Id: <20210624142209.1193073-4-f4...@amsat.org>
Signed-off-by: Cédric Le Goater
From: Philippe Mathieu-Daudé
Add the sd_version_str() helper.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Cédric Le Goater
---
hw/sd/sd.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 4412559c05be..20e62aff70b6
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Cédric Le Goater
---
hw/sd/sd.c | 30 --
1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 00a59450b726..d1c0b132c227 100644
---
From: Philippe Mathieu-Daudé
Log illegal commands as GUEST_ERROR.
Note: we are logging back the SDIO commands (CMD5, CMD52-54).
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Bin Meng
Message-Id: <20210624142209.1193073-6-f4...@amsat.org>
Signed-off-by: Cédric Le Goater
---
hw/sd/sd.c
From: Philippe Mathieu-Daudé
We report the card is in an inconsistent state, but don't precise
in which state it is. Add this information, as it is useful when
debugging problems.
Since we will reuse this code, extract as sd_invalid_state_for_cmd()
helper.
Signed-off-by: Philippe Mathieu-Daudé
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Bin Meng
Message-Id: <20210624142209.1193073-8-f4...@amsat.org>
Signed-off-by: Cédric Le Goater
---
hw/sd/sd.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git
It will help in getting rid of some drive_get(IF_MTD) calls by
retrieving the BlockBackend directly from the m25p80 device.
Cc: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Joel Stanley
Signed-off-by: Cédric Le Goater
---
include/hw/block/flash.h | 4
When the -nodefaults option is set, flash devices should be created
with :
-blockdev node-name=fmc0,driver=file,filename=./flash.img \
-device mx66u51235f,cs=0x0,bus=ssi.0,drive=fmc0 \
To be noted that in this case, the ROM will not be installed and the
initial boot sequence (U-Boot
Simple routine to retrieve a DeviceState object on a SPI bus using its
CS index. It will be useful for the board to wire the CS lines.
Cc: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Joel Stanley
Signed-off-by: Cédric Le Goater
---
include/hw/ssi/ssi.h | 2 ++
From: Hang Yu
According to the ast2600 datasheet and the linux aspeed i2c driver,
the TXBUF transmission start position should be TXBUF[0] instead
of TXBUF[1],so the arg pool_start is useless,and the address is not
included in TXBUF.So even if Tx Count equals zero,there is at least
1 byte data
This to avoid indexes conflicts on the same SSI bus. Adapt machines
using multiple devices on the same bus to avoid breakage.
Cc: "Edgar E. Iglesias"
Cc: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Joel Stanley
Signed-off-by: Cédric Le Goater
---
hw/arm/stellaris.c
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Bin Meng
Message-Id: <20210624142209.1193073-11-f4...@amsat.org>
Signed-off-by: Cédric Le Goater
---
hw/sd/sd.c | 28 +++-
1 file changed, 15 insertions(+), 13 deletions(-)
diff --git
From: Hang Yu
Added support for the buffer organization option in pool buffer control
register.when set to 1,The buffer is split into two parts: Lower 16 bytes
for Tx and higher 16 bytes for Rx.
Signed-off-by: Hang Yu
Reviewed-by: Cédric Le Goater
[ clg: checkpatch fixes ]
Signed-off-by:
and get rid of an unnecessary drive_get(IF_MTD) call.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Joel Stanley
Signed-off-by: Cédric Le Goater
---
hw/arm/aspeed.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index
From: Philippe Mathieu-Daudé
CMD19 (SEND_TUNING_BLOCK) and CMD23 (SET_BLOCK_COUNT) were
added in the Physical Layer Simplified Specification v3.01.
When earlier spec version is requested, we should return ILLEGAL.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Bin Meng
Message-Id:
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Bin Meng
Message-Id: <20210624142209.1193073-10-f4...@amsat.org>
Signed-off-by: Cédric Le Goater
---
hw/sd/sd.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git
On 32-bit hosts, RAM has a 2047 MB limit. Use a macro to define the
default ram size of machines (AST2600 SoC) that can have 2 GB.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alex Bennée
Signed-off-by: Cédric Le Goater
---
hw/arm/aspeed.c | 21 +
1 file changed, 9
The following changes since commit 17780edd81d27fcfdb7a802efc870a99788bd2fc:
Merge tag 'quick-fix-pull-request' of https://gitlab.com/bsdimp/qemu into
staging (2023-08-31 10:06:29 -0400)
are available in the Git repository at:
https://github.com/legoater/qemu/ tags/pull-aspeed-20230901
Lower the following ops:
- and_vec
- andc_vec
- or_vec
- orc_vec
- xor_vec
- nor_vec
- not_vec
Signed-off-by: Jiajie Chen
---
tcg/loongarch64/tcg-target-con-set.h | 2 ++
tcg/loongarch64/tcg-target.c.inc | 44
tcg/loongarch64/tcg-target.h | 8 ++---
3
LSX support on host cpu is detected via hwcap.
Lower the following ops to LSX:
- dup_vec
- dupi_vec
- dupm_vec
- ld_vec
- st_vec
Signed-off-by: Jiajie Chen
---
tcg/loongarch64/tcg-target-con-set.h | 2 +
tcg/loongarch64/tcg-target-con-str.h | 1 +
tcg/loongarch64/tcg-target.c.inc |
Lower the following ops:
- smin_vec
- smax_vec
- umin_vec
- umax_vec
Signed-off-by: Jiajie Chen
Reviewed-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 32
tcg/loongarch64/tcg-target.h | 2 +-
2 files changed, 33 insertions(+), 1 deletion(-)
Lower the following ops:
- add_vec
- sub_vec
Signed-off-by: Jiajie Chen
---
tcg/loongarch64/tcg-target-con-set.h | 1 +
tcg/loongarch64/tcg-target.c.inc | 58
2 files changed, 59 insertions(+)
diff --git a/tcg/loongarch64/tcg-target-con-set.h
Signed-off-by: Jiajie Chen
Reviewed-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 8
tcg/loongarch64/tcg-target.h | 2 +-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index
Lower the following ops:
- shlv_vec
- shrv_vec
- sarv_vec
Signed-off-by: Jiajie Chen
Reviewed-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 24
tcg/loongarch64/tcg-target.h | 2 +-
2 files changed, 25 insertions(+), 1 deletion(-)
diff --git
This patch series allows qemu to utilize LSX instructions on LoongArch
machines to execute TCG vector ops.
Passed tcg tests with x86_64 and aarch64 cross compilers.
Changes since v1:
- Optimize dupi_vec/st_vec/ld_vec/cmp_vec/add_vec/sub_vec generation
- Lower not_vec/shi_vec/roti_vec/rotv_vec
Signed-off-by: Jiajie Chen
Reviewed-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 8
tcg/loongarch64/tcg-target.h | 2 +-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index
Lower the following ops:
- ssadd_vec
- usadd_vec
- sssub_vec
- ussub_vec
Signed-off-by: Jiajie Chen
Reviewed-by: Richard Henderson
---
tcg/loongarch64/tcg-target.c.inc | 32
tcg/loongarch64/tcg-target.h | 2 +-
2 files changed, 33 insertions(+), 1
Lower the following ops:
- rotrv_vec
- rotlv_vec
Signed-off-by: Jiajie Chen
---
tcg/loongarch64/tcg-target.c.inc | 14 ++
tcg/loongarch64/tcg-target.h | 2 +-
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/tcg/loongarch64/tcg-target.c.inc
Signed-off-by: Jiajie Chen
---
tcg/loongarch64/tcg-target.c.inc | 21 +
tcg/loongarch64/tcg-target.h | 2 +-
2 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 6fe319a77e..c4e9e0309e
Signed-off-by: Jiajie Chen
Reviewed-by: Richard Henderson
---
tcg/loongarch64/tcg-target-con-set.h | 1 +
tcg/loongarch64/tcg-target.c.inc | 11 ++-
tcg/loongarch64/tcg-target.h | 2 +-
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git
Lower the following ops:
- shli_vec
- shrv_vec
- sarv_vec
Signed-off-by: Jiajie Chen
---
tcg/loongarch64/tcg-target.c.inc | 21 +
tcg/loongarch64/tcg-target.h | 2 +-
2 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/tcg/loongarch64/tcg-target.c.inc
Signed-off-by: Jiajie Chen
---
tcg/loongarch64/tcg-target-con-set.h | 1 +
tcg/loongarch64/tcg-target.c.inc | 60
2 files changed, 61 insertions(+)
diff --git a/tcg/loongarch64/tcg-target-con-set.h
b/tcg/loongarch64/tcg-target-con-set.h
index
On Thu, 31 Aug 2023 12:59:24 -0400
Gregory Price wrote:
> On Mon, Aug 07, 2023 at 03:56:09PM +0100, Jonathan Cameron wrote:
> > On Fri, 21 Jul 2023 12:35:08 -0400
> > Gregory Price wrote:
> >
> > > Implement the MHD GET_INFO cci command and add a shared memory
> > > region to the type3
ping!
Hi,Philippe Mathieu-Daudé:
Would like to know if there is any progress in the discussion on this issue?
In addition, is the compilation of our UEFI done on the fedora38
operating system
or on a later version of fedora?
The loongarch cross-compilation tool on the fedora38 operating
Eric Blake writes:
> On Thu, Aug 31, 2023 at 03:25:46PM +0200, Markus Armbruster wrote:
>
> [This paragraph written last: Bear with my stream of consciousness
> review below, where I end up duplicating some of the conslusions you
> reached before the point where I saw where the patch was headed]
On Thu, 31 Aug 2023 at 21:13, Cédric Le Goater wrote:
>
> When the -nodefaults option is set, flash devices should be created
> with :
>
> -blockdev node-name=fmc0,driver=file,filename=./flash.img \
> -device mx66u51235f,cs=0x0,bus=ssi.0,drive=fmc0 \
>
> To be noted that in this case,
On Fri, Sep 01, 2023 at 02:55:08PM +0800, Wang, Lei wrote:
> On 8/3/2023 23:53, Peter Xu wrote:
> > Migration bandwidth is a very important value to live migration. It's
> > because it's one of the major factors that we'll make decision on when to
> > switchover to destination in a precopy
On Thu, Aug 31, 2023 at 6:03 PM Alex Bennée wrote:
>
> Albert Esteve writes:
>
> > Sorry to bring up this post, it's been a while since you posted.
> > But I have been testing the patch the last couple of days.
> >
> > On Mon, Jul 10, 2023 at 9:58 PM Michael S. Tsirkin
> wrote:
> >
> > On
Hi Babu,
On Wed, Aug 23, 2023 at 12:18:30PM -0500, Moger, Babu wrote:
> Date: Wed, 23 Aug 2023 12:18:30 -0500
> From: "Moger, Babu"
> Subject: Re: [PATCH v3 14/17] i386: Use CPUCacheInfo.share_level to encode
> CPUID[4]
>
> Hi Zhao,
>
> On 8/18/23 02:37, Zhao Liu wrote:
> > Hi Babu,
> >
> >
From: zhenwei pi
'bool is_write' style is obsolete from throttle framework, adapt
block throttle groups to the new style:
- use ThrottleDirection instead of 'bool is_write'. Ex,
schedule_next_request(ThrottleGroupMember *tgm, bool is_write)
-> schedule_next_request(ThrottleGroupMember *tgm,
From: zhenwei pi
Reviewed-by: Alberto Garcia
Reviewed-by: Hanna Czenczek
Signed-off-by: zhenwei pi
Message-Id: <20230728022006.1098509-5-pizhen...@bytedance.com>
Signed-off-by: Hanna Czenczek
---
tests/unit/test-throttle.c | 66 ++
1 file changed, 66
From: zhenwei pi
enum ThrottleDirection is already there, use ThrottleDirection instead
of 'bool is_write' for throttle API, also modify related codes from
block, fsdev, cryptodev and tests.
Reviewed-by: Hanna Czenczek
Signed-off-by: zhenwei pi
Message-Id:
We must check that zone information is present before running
update_zones_wp().
Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=2234374
Fixes: Coverity CID 1512459
Signed-off-by: Hanna Czenczek
Message-Id: <20230824155345.109765-4-hre...@redhat.com>
Reviewed-by: Sam Li
---
This is a regression test for
https://bugzilla.redhat.com/show_bug.cgi?id=2234374.
All this test needs to do is trigger an I/O error inside of file-posix
(specifically raw_co_prw()). One reliable way to do this without
requiring special privileges is to use a FUSE export, which allows us to
We duplicate the same condition three times here, pull it out to the top
level.
Signed-off-by: Hanna Czenczek
Message-Id: <20230824155345.109765-5-hre...@redhat.com>
Reviewed-by: Sam Li
---
block/file-posix.c | 18 +-
1 file changed, 5 insertions(+), 13 deletions(-)
diff --git
Instead of checking bs->wps or bs->bl.zone_size for whether zone
information is present, check bs->bl.zoned. That is the flag that
raw_refresh_zoned_limits() reliably sets to indicate zone support. If
it is set to something other than BLK_Z_NONE, other values and objects
like bs->wps and
From: zhenwei pi
'bool is_write' style is obsolete from throttle framework, adapt
fsdev to the new style.
Cc: Greg Kurz
Reviewed-by: Hanna Czenczek
Signed-off-by: zhenwei pi
Message-Id: <20230728022006.1098509-9-pizhen...@bytedance.com>
Reviewed-by: Greg Kurz
Signed-off-by: Hanna Czenczek
From: zhenwei pi
Use enum ThrottleDirection instead in the throttle test codes.
Reviewed-by: Alberto Garcia
Reviewed-by: Hanna Czenczek
Signed-off-by: zhenwei pi
Message-Id: <20230728022006.1098509-3-pizhen...@bytedance.com>
Signed-off-by: Hanna Czenczek
---
tests/unit/test-throttle.c | 6
bs->bl.zoned is what indicates whether the zone information is present
and valid; it is the only thing that raw_refresh_zoned_limits() sets if
CONFIG_BLKZONED is not defined, and it is also the only thing that it
sets if CONFIG_BLKZONED is defined, but there are no zones.
Make sure that it is
From: zhenwei pi
Use enum ThrottleDirection instead of number index.
Reviewed-by: Alberto Garcia
Reviewed-by: Hanna Czenczek
Signed-off-by: zhenwei pi
Message-Id: <20230728022006.1098509-2-pizhen...@bytedance.com>
Signed-off-by: Hanna Czenczek
---
include/qemu/throttle.h | 11 ---
The following changes since commit f5fe7c17ac4e309e47e78f0f9761aebc8d2f2c81:
Merge tag 'pull-tcg-20230823-2' of https://gitlab.com/rth7680/qemu into
staging (2023-08-28 16:07:04 -0400)
are available in the Git repository at:
https://gitlab.com/hreitz/qemu.git tags/pull-block-2023-09-01
From: zhenwei pi
Operations on a cryptodev are considered as *write* only, the callback
of read direction is never invoked. Use NULL instead of an unreachable
path(cryptodev_backend_throttle_timer_cb on read direction).
The dummy read timer(never invoked) is already removed here, it means
that
From: zhenwei pi
The first dimension of both to_check and
bucket_types_size/bucket_types_units is used as throttle direction,
use THROTTLE_MAX instead of hard coded number. Also use ARRAY_SIZE()
to avoid hard coded number for the second dimension.
Hanna noticed that the two array should be
From: zhenwei pi
Only one direction is necessary in several scenarios:
- a read-only disk
- operations on a device are considered as *write* only. For example,
encrypt/decrypt/sign/verify operations on a cryptodev use a single
*write* timer(read timer callback is defined, but never invoked).
Richard Henderson writes:
> On 8/31/23 06:25, Markus Armbruster wrote:
>> +#define PASTE(a, b) a##b
>
> We already have glue() in qemu/compiler.h.
Missed it, will fix.
> The rest of it looks quite sensible.
Thanks!
Peter Maydell writes:
> On Thu, 31 Aug 2023 at 14:25, Markus Armbruster wrote:
>>
>> Local variables shadowing other local variables or parameters make the
>> code needlessly hard to understand. Tracked down with -Wshadow=local.
>> Clean up: delete inner declarations when they are actually
Markus Armbruster writes:
> Local variables shadowing other local variables or parameters make the
> code needlessly hard to understand. Bugs love to hide in such code.
> Evidence: PATCH 1.
>
> Enabling -Wshadow would prevent bugs like this one. But we'd have to
> clean up all the offenders
Philippe Mathieu-Daudé writes:
> For rational see Markus cover on
> https://lore.kernel.org/qemu-devel/20230831132546.3525721-1-arm...@redhat.com/
>
> This series contains few more, my take.
>
> Based-on: <20230831132546.3525721-1-arm...@redhat.com>
Awesome, thanks!
On Thu, Aug 31, 2023 at 07:00:52PM +, Colton Lewis wrote:
> Due to recent KVM changes, QEMU is setting a ptimer offset resulting
> in unintended trap and emulate access and a consequent performance
> hit. Filter out the PTIMER_CNT register to restore trapless ptimer
> access.
>
> Quoting
On 2023/09/01 7:56, Philippe Mathieu-Daudé wrote:
Fix:
net/eth.c:435:20: error: declaration shadows a local variable
[-Werror,-Wshadow]
size_t input_size = iov_size(pkt, pkt_frags);
^
net/eth.c:413:16: note: previous declaration is here
size_t
On 30/08/2023 17:14, Alexander Graf wrote:
Hi Alex,
Apple defines a new "vmapple" machine type as part of its proprietary
macOS Virtualization.Framework vmm. This machine type is similar to the
virt one, but with subtle differences in base devices, a few special
vmapple device additions and a
On 8/3/2023 23:53, Peter Xu wrote:
> Migration bandwidth is a very important value to live migration. It's
> because it's one of the major factors that we'll make decision on when to
> switchover to destination in a precopy process.
>
> This value is currently estimated by QEMU during the whole
On 30/08/2023 17:14, Alexander Graf wrote:
Hi Alex,
Apple has its own virtio-blk PCI device ID where it deviates from the
official virtio-pci spec slightly: It puts a new "apple type"
field at a static offset in config space and introduces a new barrier
command.
This patch first creates a
On 8/31/23 18:21, Marc Hartmayer wrote:
On Wed, Aug 23, 2023 at 04:22 PM +0200, Steffen Eiden
wrote:
From: Janosch Frank
Bound APQNs have to be reset before tearing down the secure config via
s390_machine_unprotect(). Otherwise the Ultravisor will return a error
code.
So let's switch the
When memory region is ram, the lower TARGET_PAGE_BITS is not the
physical section number. Instead, its value is always 0.
Add comment and assert to make it clear.
Signed-off-by: LIU Zhiwei
---
accel/tcg/cputlb.c | 11 +++
include/exec/cpu-defs.h | 12 ++--
2 files changed,
FRED CPU states are managed in 10 FRED MSRs, in addtion to a few existing
CPU registers and MSRs, e.g., the CR4.FRED bit.
Add the 10 new FRED MSRs to x86 CPUArchState for live migration support.
Tested-by: Shan Kang
Signed-off-by: Xin Li
---
target/i386/cpu.h | 24 +++
Allow VMX nested-exception support to be exposed in KVM guests, thus
nested KVM guests can enumerate it.
Tested-by: Shan Kang
Signed-off-by: Xin Li
---
target/i386/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 3dba6b46d9..ba579e1fb7
This patch set adds support for the Intel flexible return and event delivery
(FRED) architecture to allow Qemu to run KVM guests with FRED enabled.
The FRED architecture defines simple new transitions that change privilege
level (ring transitions). The FRED architecture was designed with the
The CR4.FRED bit, i.e., CR4[32], is no longer a reserved bit when FRED
is exposed to guests, otherwise it is still a reserved bit.
Tested-by: Shan Kang
Signed-off-by: Xin Li
---
target/i386/cpu.h | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.h
FRED, i.e., the Intel flexible return and event delivery architecture,
defines simple new transitions that change privilege level (ring
transitions).
In addition to these transitions, the FRED architecture defines a new
instruction (LKGS) for managing the state of the GS segment register.
The
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