On 1/30/24 02:44, Philippe Mathieu-Daudé wrote:
Do not accept any Object for CPUArchId::cpu field,
restrict it to CPUState type.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/boards.h| 2 +-
hw/core/machine.c | 4 ++--
hw/i386/x86.c | 2 +-
hw/loongarch/
Check if a file argument is a cover letter patch produced by
git-format-patch --cover-letter; It is initialized with subject suffix "
*** SUBJECT HERE ***" and body prefix " *** BLURB HERE ***". If they
exist, warn the user.
Signed-off-by: Manos Pitsidianakis
---
scripts/checkpatch.pl | 14 +
On 1/30/24 02:44, Philippe Mathieu-Daudé wrote:
When a variable is initialized to &struct->field, use it
in place. Rationale: while this makes the code more concise,
this also helps static analyzers.
Mechanical change using the following Coccinelle spatch script:
@@
type S, F;
identifier
On 3/11/23 18:38, Richard Henderson wrote:
Use them for trans_FMOVq.
Signed-off-by: Richard Henderson
---
target/sparc/translate.c | 25 +++--
1 file changed, 19 insertions(+), 6 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 3/11/23 18:38, Richard Henderson wrote:
Replace with tcg_temp_new_i32.
Signed-off-by: Richard Henderson
---
target/sparc/translate.c | 17 ++---
1 file changed, 6 insertions(+), 11 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 1/26/24 20:26, Alex Bennée wrote:
Pierrick Bouvier writes:
Now we have a thread-safe equivalent of inline operation, and that all
plugins were changed to use it, there is no point to keep the old API.
In more, it will help when we implement more functionality (conditional
callbacks), as we
On 1/26/24 20:31, Alex Bennée wrote:
Pierrick Bouvier writes:
‘g_pattern_match_string’ is deprecated,
Use 'g_pattern_spec_match_string' instead.
Unfortunately this isn't enough as we can still build on older glibs:
/* Ask for warnings for anything that was marked deprecated in
* the
On 29/1/24 17:45, Philippe Mathieu-Daudé wrote:
Mechanical patch produced running the command documented
in scripts/coccinelle/cpu_env.cocci_template header.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/sparc/cpu.c | 17 +
target/s
On 1/30/24 17:46, Philippe Mathieu-Daudé wrote:
Hi Richard,
On 30/1/24 00:30, Richard Henderson wrote:
To be used after all targets have populated the hook.
Signed-off-by: Richard Henderson
---
include/hw/core/cpu.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/hw/core/cpu
On 1/26/24 20:05, Alex Bennée wrote:
Pierrick Bouvier writes:
For now, it simply performs instruction, bb and mem count, and ensure
that inline vs callback versions have the same result. Later, we'll
extend it when new inline operations are added.
Use existing plugins to test everything works
I wanted to express my gratitude for your insightful solution concerning
the INVSTATE fault I was encountering. After recompiling my code with the
-mthumb compiler flag, the exception is no longer being raised, which marks
a significant step forward in my project.
However, I've encountered another
On 29/1/24 21:26, Paolo Bonzini wrote:
On Mon, Jan 29, 2024 at 8:49 PM Bernhard Beschow wrote:
Don't we prefer a macro for below code? While touching the code we could use
it. (Sorry I can't recall its name from the top of my head and I don't have
access to the code right now).
Ah yeah, OBJ
Hi Richard,
On 30/1/24 00:30, Richard Henderson wrote:
To be used after all targets have populated the hook.
Signed-off-by: Richard Henderson
---
include/hw/core/cpu.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 2c284d6397..4385
On 1/30/24 00:30, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
target/hppa/cpu.h | 7 ++-
target/hppa/cpu.c | 12
2 files changed, 14 insertions(+), 5 deletions(-)
Reviewed-by: Helge Deller
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 6a
On 1/26/24 19:14, Alex Bennée wrote:
Pierrick Bouvier writes:
We introduce a cpu local storage, automatically managed (and extended)
by QEMU itself. Plugin allocate a scoreboard, and don't have to deal
with how many cpus are launched.
This API will be used by new inline functions but callback
In cases where a device tries to read more bytes than the block device
contains, the error is vague: "device requires X bytes, block backend
provides Y bytes".
This patch changes the errors of this function to include the block
backend name, the device id and device type name where appropriate.
R
Add a simple method to return some kind of human readable identifier for
use in error messages.
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Manos Pitsidianakis
---
include/hw/qdev-core.h | 14 ++
hw/core/qdev.c | 8
2 files changed, 22 insertions(+)
diff --git a/i
In cases where a device tries to read more bytes than the block device
contains with the blk_check_size_and_read_all() function, the error is
vague: "device requires X bytes, block backend provides Y bytes".
This patch changes the errors of this function to include the block
backend name, the devi
On 1/30/2024 2:31 AM, Philippe Mathieu-Daudé wrote:
While re-indenting code in host_memory_backend_memory_complete(),
we triggered various "Block comments use a leading /* on a separate
line" warnings from checkpatch.pl. Correct the comments style.
Fixes: e199f7ad4d ("backends: Simplify host_mem
> On 29-Jan-2024, at 13:33, Akihiko Odaki wrote:
>
> qemu_smbios_type11_opts did not have the list terminator and that
> resulted in out-of-bound memory access. It also needs to have an element
> for the type option.
>
> Cc: qemu-sta...@nongnu.org
> Fixes: 2d6dcbf93fb0 ("smbios: support setti
> On 29-Jan-2024, at 13:33, Akihiko Odaki wrote:
>
> qemu_smbios_type8_opts did not have the list terminator and that
> resulted in out-of-bound memory access. It also needs to have an element
> for the type option.
>
> Cc: qemu-sta...@nongnu.org
> Fixes: fd8caa253c56 ("hw/smbios: support for
On 29/01/2024 20.28, Thomas Weißschuh wrote:
Validate that a shutdown via the pvpanic device emits the correct
QMP events.
Signed-off-by: Thomas Weißschuh
---
tests/qtest/pvpanic-pci-test.c | 39 +++
tests/qtest/pvpanic-test.c | 29
On Tue, 30 Jan 2024 03:26, Gurchetan Singh wrote:
On Mon, Jan 29, 2024 at 7:46 AM Manos Pitsidianakis <
manos.pitsidiana...@linaro.org> wrote:
When the Rutabaga GPU device frees resources, it calls
rutabaga_resource_unref for that resource_id. However, when the generic
VirtIOGPU functions dest
On 29/01/2024 18.00, Philippe Mathieu-Daudé wrote:
Include missing headers in order to avoid when refactoring
unrelated headers:
hw/hyperv/hyperv.c:33:18: error: field ‘msg_page_mr’ has incomplete type
33 | MemoryRegion msg_page_mr;
| ^~~
hw/hyperv
30.01.2024 04:35, Peter Xu:
..
This seems like a stable material too, - please let me know if it is not.
Yes it is. I used to be more careful on copying stable at least in the
commit message when I post patches, but forgot to do so when start picking
up..
Note that it's already merged in maste
On 29/01/2024 18.05, Philippe Mathieu-Daudé wrote:
Include missing headers in order to avoid when refactoring
unrelated headers:
hw/intc/xics.c: In function 'icp_realize':
hw/intc/xics.c:304:5: error: unknown type name 'PowerPCCPU'
304 | PowerPCCPU *cpu;
| ^~
Hi Alex, Eric,
> > > Recent updates in OVMF and Seabios have resulted in MMIO regions
> > > being placed at the upper end of the physical address space. As a
> > > result, when a Host device is assigned to the Guest via VFIO, the
> > > following mapping failures occur when VFIO tries to map the M
On Mon, Jan 29, 2024 at 02:20:35PM +0200, Avihai Horon wrote:
>
> On 29/01/2024 6:17, Peter Xu wrote:
> > External email: Use caution opening links or attachments
> >
> >
> > On Sun, Jan 28, 2024 at 05:43:52PM +0200, Avihai Horon wrote:
> > > On 25/01/2024 22:57, Fabiano Rosas wrote:
> > > > Ext
From: Hyman Huang
Expand the signature of qcrypto_block_create to enable the
formation of LUKS volumes with detachable headers. To accomplish
that, introduce QCryptoBlockCreateFlags to instruct the creation
process to set the payload_offset_sector to 0.
Signed-off-by: Hyman Huang
---
block/cry
From: Hyman Huang
Sorry for the late post of version 4. The modifications are as follows:
v4:
- Rebase on master
- squash [PATCH v3 02/10] to [PATCH v3 01/10]
- refactor the logic of block_crypto_open_generic in [PATCH v3 02/10]
as Daniel suggestted:
a. drop the invalid parameter check for
From: Hyman Huang
When querying the LUKS disk with the qemu-img tool or other APIs,
add information about whether the LUKS header is detached.
Additionally, update the test case with the appropriate
modification.
Signed-off-by: Hyman Huang
---
crypto/block-luks.c| 2 ++
qapi/crypto.js
From: Hyman Huang
By enhancing the LUKS driver, it is possible to implement
the LUKS volume with a detached header.
Normally a LUKS volume has a layout:
disk: | header | key material | disk payload data |
With a detached LUKS header, you need 2 disks so getting:
disk1: | header | key mate
From: Hyman Huang
Also, add a section to the MAINTAINERS file for detached
LUKS header, it only has a test case in it currently.
Signed-off-by: Hyman Huang
---
MAINTAINERS | 5 +
tests/qemu-iotests/tests/luks-detached-header | 218 ++
.../tes
From: Hyman Huang
Firstly, enable the ability to choose the block device containing
a detachable LUKS header by adding the 'header' parameter to
BlockdevCreateOptionsLUKS.
Secondly, when formatting the LUKS volume with a detachable header,
truncate the payload volume to length without a header s
From: Hyman Huang
To support detached LUKS header creation, make the existing 'file'
field in BlockdevCreateOptionsLUKS optional.
Signed-off-by: Hyman Huang
Reviewed-by: Daniel P. Berrangé
---
block/crypto.c | 21 ++---
qapi/block-core.json | 5 +++--
2 files changed, 1
From: Hyman Huang
Even though a LUKS header might be created with cryptsetup,
qemu-img should be enhanced to accommodate it as well.
Add the 'detached-header' option to specify the creation of
a detached LUKS header. This is how it is used:
$ qemu-img create --object secret,id=sec0,data=abc123 -
On Mon, Jan 29, 2024 at 03:51:07PM +, Peter Maydell wrote:
> On Mon, 29 Jan 2024 at 15:18, Fabiano Rosas wrote:
> >
> > Peter Maydell writes:
> >
> > > On Mon, 29 Jan 2024 at 13:45, Fabiano Rosas wrote:
> > >>
> > >> Peter Xu writes:
> > >> > Fundamentally, IMHO it's because QEMU as a proje
> -Original Message-
> From: Jonathan Cameron
> Sent: Monday, January 29, 2024 7:08 PM
> To: JeeHeng Sia
> Cc: qemu-devel@nongnu.org; qemu-...@nongnu.org; qemu-ri...@nongnu.org;
> m...@redhat.com; imamm...@redhat.com;
> anisi...@redhat.com; shannon.zha...@gmail.com; peter.mayd...@lina
> -Original Message-
> From: Jonathan Cameron
> Sent: Monday, January 29, 2024 7:03 PM
> To: JeeHeng Sia
> Cc: qemu-devel@nongnu.org; qemu-...@nongnu.org; qemu-ri...@nongnu.org;
> m...@redhat.com; imamm...@redhat.com;
> anisi...@redhat.com; shannon.zha...@gmail.com; peter.mayd...@lina
On Mon, Jan 29, 2024 at 10:44:46AM -0300, Fabiano Rosas wrote:
> > Since we're at it, I would also like to know how you think about whether we
> > should still suggest people using VMSD versioning, as we know that it won't
> > work for backward migrations.
> >
> > My current thoughts is it is still
> -Original Message-
> From: Peter Xu
> Sent: Monday, January 29, 2024 6:43 PM
> To: Liu, Yuan1
> Cc: faro...@suse.de; leob...@redhat.com; qemu-devel@nongnu.org; Zou,
> Nanhai
> Subject: Re: [PATCH v3 0/4] Live Migration Acceleration with IAA
> Compression
>
> On Wed, Jan 03, 2024 at 07
> -Original Message-
> From: Andrew Jones
> Sent: Monday, January 29, 2024 5:19 PM
> To: JeeHeng Sia
> Cc: qemu-...@nongnu.org; qemu-devel@nongnu.org; qemu-ri...@nongnu.org;
> m...@redhat.com; imamm...@redhat.com;
> anisi...@redhat.com; peter.mayd...@linaro.org; shannon.zha...@gmail.c
> -Original Message-
> From: Sunil V L
> Sent: Monday, January 29, 2024 1:13 PM
> To: JeeHeng Sia
> Cc: qemu-...@nongnu.org; qemu-devel@nongnu.org; qemu-ri...@nongnu.org;
> m...@redhat.com; imamm...@redhat.com;
> anisi...@redhat.com; peter.mayd...@linaro.org; shannon.zha...@gmail.com;
With qemu is compiled with option "--target-list=loongarch64-softmmu
--disable-tcg", it passes to run with "make check" command.
Also gdb debug for LoongArch kvm support depends on this.
Tested-by: Bibo Mao
On 2024/1/25 下午2:14, Song Gao wrote:
The cc->sysemu_ops->get_phys_page_debug() is NUL
Hello everyone,
Recently, we are looking to switch the VM’s disks from the qemu driver with the
qcow2 format to a vhost-user-blk driver based on SPDK. Currently, we are able
to copy data into an SPDK-based target using the blockcopy method. We would
like to inquire if there is a theoretical pos
> -Original Message-
> From: Philippe Mathieu-Daudé
> Sent: Monday, January 29, 2024 10:45 AM
> To: qemu-devel@nongnu.org
> Cc: qemu-ri...@nongnu.org; qemu-s3...@nongnu.org; Paolo Bonzini
> ; k...@vger.kernel.org; qemu-...@nongnu.org;
> qemu-...@nongnu.org; Richard Henderson ;
> Philippe
On Mon, Jan 29, 2024 at 11:30:53PM +0300, Michael Tokarev wrote:
> 23.01.2024 09:42, Het Gala:
> > 'uri' argument should be optional, as 'uri' and 'channels'
> > arguments are mutally exclusive in nature.
> >
> > Fixes: 074dbce5fcce (migration: New migrate and
> > migrate-incoming argument 'channe
On Mon, Jan 29, 2024 at 7:46 AM Manos Pitsidianakis <
manos.pitsidiana...@linaro.org> wrote:
> When the Rutabaga GPU device frees resources, it calls
> rutabaga_resource_unref for that resource_id. However, when the generic
> VirtIOGPU functions destroys resources, it only removes the
> virtio_gpu
On Fri, Jan 26, 2024 at 5:54 AM Daniel Henrique Barboza
wrote:
>
> The RVA22U64 and RVA22S64 profiles mandates certain extensions that,
> until now, we were implying that they were available.
>
> We can't do this anymore since named features also has a riscv,isa
> entry. Let's add them to riscv_c
On Fri, Jan 26, 2024 at 6:55 AM Daniel Henrique Barboza
wrote:
>
> Further discussions after the introduction of rva22 support in QEMU
> revealed that what we've been calling 'named features' are actually
> regular extensions, with their respective riscv,isa DTs. This is
> clarified in [1]. [2] is
On Fri, Jan 26, 2024 at 5:54 AM Daniel Henrique Barboza
wrote:
>
> Recent changes in options handling removed the 'mmu' default the bare
> CPUs had, meaning that we must enable 'mmu' by hand when using the
> rva22s64 profile CPU.
>
> Given that this profile is setting a satp mode, it already impli
On Sun, Jan 28, 2024 at 6:29 PM Akihiko Odaki wrote:
>
> This series extracts fixes and refactorings that can be applied
> independently from "[PATCH v9 00/23] plugins: Allow to read registers".
>
> The patch "target/riscv: Move MISA limits to class" was replaced with
> patch "target/riscv: Move m
On Mon, Jan 29, 2024 at 9:59 PM Paolo Bonzini wrote:
>
> Just like all other dependencies, these can be expressed in Kconfig
> files rather than in the default configurations.
>
> Signed-off-by: Paolo Bonzini
Acked-by: Alistair Francis
Alistair
> ---
> configs/devices/m68k-softmmu/default.ma
On Fri, Jan 26, 2024 at 2:35 AM Peter Maydell wrote:
>
> This commit was created with scripts/clean-includes:
> ./scripts/clean-includes --git riscv target/riscv/*.[ch]
>
> All .c should include qemu/osdep.h first. The script performs three
> related cleanups:
>
> * Ensure .c files include qemu/
On Tue, Jan 30, 2024 at 10:03 AM Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 8cbfc7e781..be21fa09
On Tue, Jan 30, 2024 at 9:36 AM Richard Henderson
wrote:
>
> Use the target-specific function name in preference
> to the generic name.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu_helper.c| 4 ++--
> target/riscv/op_helper.c |
On Tue, Jan 30, 2024 at 9:39 AM Richard Henderson
wrote:
>
> Free up the riscv_cpu_mmu_index name for other usage;
> emphasize that the argument is 'env'.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu.h| 4 ++--
> target/riscv/cp
On Tue, Jan 30, 2024 at 2:52 AM Philippe Mathieu-Daudé
wrote:
>
> Mechanical patch produced running the command documented
> in scripts/coccinelle/cpu_env.cocci_template header.
>
> Reviewed-by: Richard Henderson
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
Am 29. Januar 2024 13:34:20 UTC schrieb Paolo Bonzini :
>Calls to is_enabled are bounded to indices that actually exist in
>the SuperIO device. Therefore, the is_enabled functions in
>smc37c669 are not doing anything and they can be removed.
Indeed isa_superio_realize() only considers .count i
The following expression is incorrect because blk_pread_nonzeroes()
deals in units of bytes, not sectors:
bytes = MIN(size - offset, BDRV_REQUEST_MAX_SECTORS)
^^^
BDRV_REQUEST_MAX_BYTES is the appropriate constant.
Fixes: a4b15a8b9ef2 ("pflash:
On Tue, Jan 23, 2024 at 05:35:30PM +0200, Manos Pitsidianakis wrote:
> Add a simple method to return some kind of human readable identifier for
> use in error messages.
>
> Signed-off-by: Manos Pitsidianakis
> ---
> hw/core/qdev.c | 8
> include/hw/qdev-core.h | 14
On Tue, Jan 23, 2024 at 05:35:31PM +0200, Manos Pitsidianakis wrote:
> if (blk_len != size) {
> -error_setg(errp, "device requires %" HWADDR_PRIu " bytes, "
> - "block backend provides %" PRIu64 " bytes",
> - size, blk_len);
> +dev_id = qdev_
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h| 2 +-
include/exec/cpu-common.h | 3 +--
target/sparc/cpu.h| 2 +-
accel/tcg/cputlb.c| 22 +---
semihosting/uaccess.c | 2 +-
target/cris/translate.c
Signed-off-by: Richard Henderson
---
target/xtensa/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index 62020b1f33..79f91819df 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -74,6 +74,11 @@ static bool xtensa_cpu_has_work(C
Signed-off-by: Richard Henderson
---
target/sparc/cpu.h | 34 ++
target/sparc/cpu.c | 29 +
2 files changed, 35 insertions(+), 28 deletions(-)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 12a11ecb26..92c58c92c1 100644
---
Signed-off-by: Richard Henderson
---
target/arm/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 6a96b245f2..1f9ea622bd 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -133,6 +133,11 @@ static bool arm_cpu_has_work(CPUState *cs)
For user-only mode, use MMU_USER_IDX.
For system mode, use CPUClass.mmu_index.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h| 4
include/exec/cpu-common.h | 19 +++
target/alpha/cpu.h| 5 -
target/arm/cpu.h | 13 -
target/
Signed-off-by: Richard Henderson
---
target/microblaze/cpu.h | 13 ++---
target/microblaze/cpu.c | 18 +-
2 files changed, 19 insertions(+), 12 deletions(-)
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index b5374365f5..90ab796de9 100644
--- a/target/mic
Signed-off-by: Richard Henderson
---
target/rx/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index 353132dac2..5205167da1 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -64,6 +64,11 @@ static bool rx_cpu_has_work(CPUState *cs)
(C
Signed-off-by: Richard Henderson
---
target/hppa/cpu.h | 7 ++-
target/hppa/cpu.c | 12
2 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 6a153405d2..04439f247d 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -2
Signed-off-by: Richard Henderson
---
target/tricore/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
index e6d91c74b5..74e8a22b86 100644
--- a/target/tricore/cpu.c
+++ b/target/tricore/cpu.c
@@ -89,6 +89,11 @@ static bool tricore_cpu_has_
Fabiano Rosas writes:
> Peter Xu writes:
>
>> On Fri, Jan 26, 2024 at 11:54:32AM -0300, Fabiano Rosas wrote:
>>> Peter Maydell writes:
>>>
>>> > On Fri, 26 Jan 2024 at 14:36, Fabiano Rosas wrote:
>>> >>
>>> >> pet...@redhat.com writes:
>>> >>
>>> >> > From: Fabiano Rosas
>>> >> >
>>> >> > Th
Signed-off-by: Richard Henderson
---
target/sh4/cpu.h | 16 ++--
target/sh4/cpu.c | 16
2 files changed, 22 insertions(+), 10 deletions(-)
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index 0e6fa65bae..9c5e2b349e 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu
Signed-off-by: Richard Henderson
---
target/i386/cpu.h | 13 ++---
target/i386/cpu.c | 10 ++
2 files changed, 16 insertions(+), 7 deletions(-)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 7f0786e8b9..62bdb02378 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@
Signed-off-by: Richard Henderson
---
target/mips/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index df544ab39b..d644adbc77 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -182,6 +182,11 @@ static bool mips_cpu_has_work(CPUState *c
Signed-off-by: Richard Henderson
---
target/s390x/cpu.h| 4 +++-
target/s390x/tcg/mem_helper.c | 34 ++
2 files changed, 21 insertions(+), 17 deletions(-)
diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h
index fa3aac4f97..f0fed5d6ad 100644
--- a/t
Rather than adjust env->hflags so that the value computed
by cpu_mmu_index() changes, compute the mmu_idx that we
want directly and pass it down.
Introduce symbolic constants for MMU_{KERNEL,ERL}_IDX.
Signed-off-by: Richard Henderson
---
target/mips/cpu.h | 4 +++-
target/mip
Signed-off-by: Richard Henderson
---
target/arm/internals.h | 5 +
target/arm/helper.c | 2 +-
target/arm/tcg/helper-a64.c | 4 ++--
target/arm/tcg/mte_helper.c | 18 +-
target/arm/tcg/sve_helper.c | 8
target/arm/tcg/tlb_helper.c | 2 +-
6 files cha
Signed-off-by: Richard Henderson
---
target/ppc/cpu.h| 7 ++-
target/ppc/cpu_init.c | 2 +-
target/ppc/mem_helper.c | 10 +-
target/ppc/mmu_common.c | 4 ++--
4 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index f8101ff
Signed-off-by: Richard Henderson
---
target/alpha/cpu.h | 7 ++-
target/alpha/translate.c | 2 +-
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index ce806587ca..3beff2738a 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
Use the target-specific function name in preference
to the generic name.
Signed-off-by: Richard Henderson
---
target/riscv/cpu_helper.c| 4 ++--
target/riscv/op_helper.c | 4 ++--
target/riscv/vector_helper.c | 9 +
3 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/t
Compute this value once for each translation.
Signed-off-by: Richard Henderson
---
target/cris/translate.c | 14 +-
target/cris/translate_v10.c.inc | 6 ++
2 files changed, 7 insertions(+), 13 deletions(-)
diff --git a/target/cris/translate.c b/target/cris/translate.c
i
Signed-off-by: Richard Henderson
---
target/cris/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index 6349148b65..163fb05d58 100644
--- a/target/cris/cpu.c
+++ b/target/cris/cpu.c
@@ -56,6 +56,11 @@ static bool cris_cpu_has_work(CPUState *cs)
Signed-off-by: Richard Henderson
---
target/avr/cpu.h | 4 +---
target/avr/cpu.c | 6 ++
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index 7d5dd42575..4595c6bb18 100644
--- a/target/avr/cpu.h
+++ b/target/avr/cpu.h
@@ -184,9 +184,7 @@ sta
Signed-off-by: Richard Henderson
---
target/mips/cpu.h | 7 ++-
target/mips/sysemu/physaddr.c | 2 +-
target/mips/tcg/msa_helper.c| 10 +-
target/mips/tcg/sysemu/cp0_helper.c | 2 +-
target/mips/tcg/sysemu/special_helper.c | 2 +-
ta
Free up the riscv_cpu_mmu_index name for other usage;
emphasize that the argument is 'env'.
Signed-off-by: Richard Henderson
---
target/riscv/cpu.h| 4 ++--
target/riscv/cpu_helper.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/riscv/cpu.h b/target/riscv/
Signed-off-by: Richard Henderson
---
target/loongarch/cpu.h | 6 ++
target/loongarch/cpu.c | 11 +++
2 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index 0fa5e0ca93..5dfcfeb3a4 100644
--- a/target/loongarch/cpu.h
+++ b/
Signed-off-by: Richard Henderson
---
target/m68k/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 44000f5869..8a8392e694 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -56,6 +56,11 @@ static bool m68k_cpu_has_work(CPUState *cs)
Signed-off-by: Richard Henderson
---
target/openrisc/cpu.h | 10 ++
target/openrisc/cpu.c | 13 +
2 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index b454014ddd..7dbed8d8be 100644
--- a/target/openrisc/cpu.h
+++ b
Signed-off-by: Richard Henderson
---
target/s390x/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index 7f123863dc..49a2341acc 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -142,6 +142,11 @@ static bool s390_cpu_has_work(CPUSta
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 12 ++--
target/nios2/cpu.c | 7 +++
2 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index 2d79b5b298..9965ff74c1 100644
--- a/target/nios2/cpu.h
+++ b/target/nios2/cpu.h
Signed-off-by: Richard Henderson
---
target/alpha/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index de705c3703..bf70173a25 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -64,6 +64,11 @@ static bool alpha_cpu_has_work(CPUStat
Signed-off-by: Richard Henderson
---
target/ppc/cpu_init.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 86c8031765..9931372a08 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7105,6 +7105,11 @@ static bool ppc_cpu
Signed-off-by: Richard Henderson
---
target/riscv/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 8cbfc7e781..be21fa09c6 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -867,6 +867,11 @@ static bool riscv_cpu_has_work(CPUSt
While the primary use of mmu_index is for the softmmu index for
system-mode tcg, it has a secondary use in encoding cpu state for
the page table walker, and thus depending on the target may also
be used by memory_rw_debug with kvm et al.
This is why I placed the hook in CPUClass not TCGCPUOps.
r
The expected form is MMU_FOO_IDX, not MMU_IDX_FOO.
Rename to match generic code.
Signed-off-by: Richard Henderson
---
target/loongarch/cpu.h | 8
target/loongarch/cpu.c | 2 +-
target/loongarch/tcg/tlb_helper.c
To be used after all targets have populated the hook.
Signed-off-by: Richard Henderson
---
include/hw/core/cpu.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 2c284d6397..4385ce54c9 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/c
From: Philippe Mathieu-Daudé
tcg_ss[] source set contains target-specific units.
Rename it as 'tcg_specific_ss[]' for clarity.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Reviewed-by: Anton Johansson
Message-Id: <20240124101639.30056-2-phi...@linaro.org>
Signed-off-by
From: Philippe Mathieu-Daudé
In order to make accel/tcg/ target agnostic,
introduce the cpu_exec_halt() handler.
Reviewed-by: Anton Johansson
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20240124101639.30056-9-phi...@linaro.org>
Signed-off-by: Richard Hend
From: Philippe Mathieu-Daudé
Convert packed logic to dumb icount_exit_request() helper.
No functional change intended.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Reviewed-by: Anton Johansson
Message-Id: <20240124101639.30056-5-phi...@linaro.org>
Signed-off-by: Richar
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